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ARM: dts: imx6qdl: Add power-domain information to gpc node
authorPhilipp Zabel <p.zabel@pengutronix.de>
Mon, 23 Feb 2015 17:40:13 +0000 (18:40 +0100)
committerShawn Guo <shawn.guo@linaro.org>
Mon, 30 Mar 2015 08:43:32 +0000 (16:43 +0800)
The PGC that is part of GPC controls isolation and power sequencing of the
power domains. The PU power domain will be handled by the generic pm domain
framework. It needs a phandle to the PU regulator to turn off power when
the domain is disabled, and a list of phandles to all clocks that must be
enabled during powerup for reset propagation.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6qdl.dtsi

index 3a2d054..76f4997 100644 (file)
                                interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
                                             <0 90 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-parent = <&intc>;
+                               pu-supply = <&reg_pu>;
+                               clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
+                                        <&clks IMX6QDL_CLK_GPU3D_SHADER>,
+                                        <&clks IMX6QDL_CLK_GPU2D_CORE>,
+                                        <&clks IMX6QDL_CLK_GPU2D_AXI>,
+                                        <&clks IMX6QDL_CLK_OPENVG_AXI>,
+                                        <&clks IMX6QDL_CLK_VPU_AXI>;
+                               #power-domain-cells = <1>;
                        };
 
                        gpr: iomuxc-gpr@020e0000 {