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irqchip: omap-intc: correct maximum number or MIR registers
author
Felipe Balbi
<balbi@ti.com>
Mon, 15 Sep 2014 21:15:08 +0000
(16:15 -0500)
committer
Tony Lindgren
<tony@atomide.com>
Tue, 16 Sep 2014 21:45:01 +0000
(14:45 -0700)
maximum number of MIR register is 4, rather than 3.
Fix that.
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
drivers/irqchip/irq-omap-intc.c
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diff --git
a/drivers/irqchip/irq-omap-intc.c
b/drivers/irqchip/irq-omap-intc.c
index
dfa2d9d
..
976d4c1
100644
(file)
--- a/
drivers/irqchip/irq-omap-intc.c
+++ b/
drivers/irqchip/irq-omap-intc.c
@@
-49,7
+49,7
@@
#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
#define INTCPS_NR_ILR_REGS 128
-#define INTCPS_NR_MIR_REGS
3
+#define INTCPS_NR_MIR_REGS
4
#define INTC_IDLE_FUNCIDLE (1 << 0)
#define INTC_IDLE_TURBO (1 << 1)