OSDN Git Service

drm/i915: move has_hdcp to runtime info
authorJani Nikula <jani.nikula@intel.com>
Fri, 19 Aug 2022 12:02:45 +0000 (15:02 +0300)
committerJani Nikula <jani.nikula@intel.com>
Wed, 24 Aug 2022 08:45:26 +0000 (11:45 +0300)
If it's modified runtime, it's runtime info.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b146250e02a4b2f086e7e587dd1742589e0e8fba.1660910433.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_hdcp.c
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.c
drivers/gpu/drm/i915/intel_device_info.h

index c5e9e86..73b9b4c 100644 (file)
@@ -1110,8 +1110,8 @@ static void intel_hdcp_prop_work(struct work_struct *work)
 
 bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port)
 {
-       return INTEL_INFO(dev_priv)->display.has_hdcp &&
-                       (DISPLAY_VER(dev_priv) >= 12 || port < PORT_E);
+       return RUNTIME_INFO(dev_priv)->has_hdcp &&
+               (DISPLAY_VER(dev_priv) >= 12 || port < PORT_E);
 }
 
 static int
index 365cbb8..818c18b 100644 (file)
@@ -656,7 +656,7 @@ static const struct intel_device_info chv_info = {
        GEN9_DEFAULT_PAGE_SIZES, \
        .display.has_dmc = 1, \
        .has_gt_uc = 1, \
-       .display.has_hdcp = 1, \
+       .__runtime.has_hdcp = 1, \
        .display.has_ipc = 1, \
        .display.has_psr = 1, \
        .display.has_psr_hw_tracking = 1, \
@@ -708,7 +708,7 @@ static const struct intel_device_info skl_gt4_info = {
        .display.has_ddi = 1, \
        .display.has_fpga_dbg = 1, \
        .__runtime.fbc_mask = BIT(INTEL_FBC_A), \
-       .display.has_hdcp = 1, \
+       .__runtime.has_hdcp = 1, \
        .display.has_psr = 1, \
        .display.has_psr_hw_tracking = 1, \
        .has_runtime_pm = 1, \
@@ -958,7 +958,7 @@ static const struct intel_device_info adl_s_info = {
        .display.has_dsc = 1,                                                   \
        .__runtime.fbc_mask = BIT(INTEL_FBC_A),                                 \
        .display.has_fpga_dbg = 1,                                              \
-       .display.has_hdcp = 1,                                                  \
+       .__runtime.has_hdcp = 1,                                                \
        .display.has_hotplug = 1,                                               \
        .display.has_ipc = 1,                                                   \
        .display.has_psr = 1,                                                   \
index 91ac149..c5367b8 100644 (file)
@@ -126,6 +126,8 @@ void intel_device_info_print(const struct intel_device_info *info,
        DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
 #undef PRINT_FLAG
 
+       drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
+
        drm_printf(p, "rawclk rate: %u kHz\n", runtime->rawclk_freq);
 }
 
@@ -395,7 +397,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
                }
 
                if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
-                       info->display.has_hdcp = 0;
+                       runtime->has_hdcp = 0;
 
                if (dfsm & SKL_DFSM_DISPLAY_PM_DISABLE)
                        runtime->fbc_mask = 0;
index 3601d37..2af5fdd 100644 (file)
@@ -185,7 +185,6 @@ enum intel_ppgtt_type {
        func(has_dsc); \
        func(has_fpga_dbg); \
        func(has_gmch); \
-       func(has_hdcp); \
        func(has_hotplug); \
        func(has_hti); \
        func(has_ipc); \
@@ -240,6 +239,8 @@ struct intel_runtime_info {
                u8 num_scalers[I915_MAX_PIPES];
 
                u8 fbc_mask;
+
+               bool has_hdcp;
        };
 };