EDAC/amd64: Set memory type per DIMM

Current AMD systems allow mixing of DIMM types within a system. However,
DIMMs within a channel, i.e. managed by a single Unified Memory
Controller (UMC), must be of the same type.

Handle this possible configuration by checking and setting the memory
type for each individual "UMC" structure.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: William Roche <william.roche@oracle.com>
Link: https://lore.kernel.org/r/20220202144307.2678405-2-yazen.ghannam@amd.com

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index fba609a..388b072 100644 (file)
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1429,7 +1429,7 @@ static void __dump_misc_regs_df(struct amd64_pvt *pvt)
                edac_dbg(1, "UMC%d x16 DIMMs present: %s\n",
                                i, (umc->dimm_cfg & BIT(7)) ? "yes" : "no");
 
-               if (pvt->dram_type == MEM_LRDDR4) {
+               if (umc->dram_type == MEM_LRDDR4) {
                        amd_smn_read(pvt->mc_node_id, umc_base + UMCCH_ADDR_CFG, &tmp);
                        edac_dbg(1, "UMC%d LRDIMM %dx rank multiply\n",
                                        i, 1 << ((tmp >> 4) & 0x3));
@@ -1616,19 +1616,36 @@ static void read_dct_base_mask(struct amd64_pvt *pvt)
        }
 }
 
-static void determine_memory_type(struct amd64_pvt *pvt)
+static void determine_memory_type_df(struct amd64_pvt *pvt)
 {
-       u32 dram_ctrl, dcsm;
+       struct amd64_umc *umc;
+       u32 i;
 
-       if (pvt->umc) {
-               if ((pvt->umc[0].dimm_cfg | pvt->umc[1].dimm_cfg) & BIT(5))
-                       pvt->dram_type = MEM_LRDDR4;
-               else if ((pvt->umc[0].dimm_cfg | pvt->umc[1].dimm_cfg) & BIT(4))
-                       pvt->dram_type = MEM_RDDR4;
+       for_each_umc(i) {
+               umc = &pvt->umc[i];
+
+               if (!(umc->sdp_ctrl & UMC_SDP_INIT)) {
+                       umc->dram_type = MEM_EMPTY;
+                       continue;
+               }
+
+               if (umc->dimm_cfg & BIT(5))
+                       umc->dram_type = MEM_LRDDR4;
+               else if (umc->dimm_cfg & BIT(4))
+                       umc->dram_type = MEM_RDDR4;
                else
-                       pvt->dram_type = MEM_DDR4;
-               return;
+                       umc->dram_type = MEM_DDR4;
+
+               edac_dbg(1, "  UMC%d DIMM type: %s\n", i, edac_mem_types[umc->dram_type]);
        }
+}
+
+static void determine_memory_type(struct amd64_pvt *pvt)
+{
+       u32 dram_ctrl, dcsm;
+
+       if (pvt->umc)
+               return determine_memory_type_df(pvt);
 
        switch (pvt->fam) {
        case 0xf:
@@ -3452,7 +3469,9 @@ skip:
        read_dct_base_mask(pvt);
 
        determine_memory_type(pvt);
-       edac_dbg(1, "  DIMM type: %s\n", edac_mem_types[pvt->dram_type]);
+
+       if (!pvt->umc)
+               edac_dbg(1, "  DIMM type: %s\n", edac_mem_types[pvt->dram_type]);
 
        determine_ecc_sym_sz(pvt);
 }
@@ -3548,7 +3567,7 @@ static int init_csrows_df(struct mem_ctl_info *mci)
                                        pvt->mc_node_id, cs);
 
                        dimm->nr_pages = get_csrow_nr_pages(pvt, umc, cs);
-                       dimm->mtype = pvt->dram_type;
+                       dimm->mtype = pvt->umc[umc].dram_type;
                        dimm->edac_mode = edac_mode;
                        dimm->dtype = dev_type;
                        dimm->grain = 64;

diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 352bda9..6b87423 100644 (file)
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -344,6 +344,9 @@ struct amd64_umc {
        u32 sdp_ctrl;           /* SDP Control reg */
        u32 ecc_ctrl;           /* DRAM ECC Control reg */
        u32 umc_cap_hi;         /* Capabilities High reg */
+
+       /* cache the dram_type */
+       enum mem_type dram_type;
 };
 
 struct amd64_pvt {
@@ -391,7 +394,12 @@ struct amd64_pvt {
        /* place to store error injection parameters prior to issue */
        struct error_injection injection;
 
-       /* cache the dram_type */
+       /*
+        * cache the dram_type
+        *
+        * NOTE: Don't use this for Family 17h and later.
+        *       Use dram_type in struct amd64_umc instead.
+        */
        enum mem_type dram_type;
 
        struct amd64_umc *umc;  /* UMC registers */