drm/i915/adl_s: Load DMC

Load DMC on ADL_S v2.01. This is the first offcial
release of DMC for ADL_S.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210129182945.217078-6-aditya.swarup@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c
index 67dc64d..db9f219 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_csr.c
+++ b/drivers/gpu/drm/i915/display/intel_csr.c
@@ -40,6 +40,10 @@
 
 #define GEN12_CSR_MAX_FW_SIZE          ICL_CSR_MAX_FW_SIZE
 
+#define ADLS_CSR_PATH                  "i915/adls_dmc_ver2_01.bin"
+#define ADLS_CSR_VERSION_REQUIRED      CSR_VERSION(2, 1)
+MODULE_FIRMWARE(ADLS_CSR_PATH);
+
 #define DG1_CSR_PATH                   "i915/dg1_dmc_ver2_02.bin"
 #define DG1_CSR_VERSION_REQUIRED       CSR_VERSION(2, 2)
 MODULE_FIRMWARE(DG1_CSR_PATH);
@@ -689,7 +693,11 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
         */
        intel_csr_runtime_pm_get(dev_priv);
 
-       if (IS_DG1(dev_priv)) {
+       if (IS_ALDERLAKE_S(dev_priv)) {
+               csr->fw_path = ADLS_CSR_PATH;
+               csr->required_version = ADLS_CSR_VERSION_REQUIRED;
+               csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
+       } else if (IS_DG1(dev_priv)) {
                csr->fw_path = DG1_CSR_PATH;
                csr->required_version = DG1_CSR_VERSION_REQUIRED;
                csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;