OSDN Git Service

drm/amdgpu/mes: zero the sdma_hqd_mask of 2nd SDMA engine for SDMA 6.0.1
authorYifan Zhang <yifan1.zhang@amd.com>
Tue, 30 Aug 2022 15:18:47 +0000 (23:18 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 1 Sep 2022 19:10:35 +0000 (15:10 -0400)
there is only one SDMA engine in SDMA 6.0.1, the sdma_hqd_mask has to be
zeroed for the 2nd engine, otherwise MES scheduler will consider 2nd
engine exists and map/unmap SDMA queues to the non-existent engine.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

index fe82b8b..0c54624 100644 (file)
@@ -181,6 +181,9 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
        for (i = 0; i < AMDGPU_MES_MAX_SDMA_PIPES; i++) {
                if (adev->ip_versions[SDMA0_HWIP][0] < IP_VERSION(6, 0, 0))
                        adev->mes.sdma_hqd_mask[i] = i ? 0 : 0x3fc;
+               /* zero sdma_hqd_mask for non-existent engine */
+               else if (adev->sdma.num_instances == 1)
+                       adev->mes.sdma_hqd_mask[i] = i ? 0 : 0xfc;
                else
                        adev->mes.sdma_hqd_mask[i] = 0xfc;
        }