[WebAssembly] Handle CopyToReg nodes with flag results in LowerCopyToReg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261457 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 7b3649b..8f94f30 100644 (file)
--- a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -558,16 +558,20 @@ SDValue WebAssemblyTargetLowering::LowerCopyToReg(SDValue Op,
     // need to insert some kind of instruction that can take an FI operand and
     // produces a value usable by CopyToReg (i.e. in a vreg). So insert a dummy
     // copy_local between Op and its FI operand.
+    SDValue Chain = Op.getOperand(0);
     SDLoc DL(Op);
+    unsigned Reg = cast<RegisterSDNode>(Op.getOperand(1))->getReg();
     EVT VT = Src.getValueType();
     SDValue Copy(
         DAG.getMachineNode(VT == MVT::i32 ? WebAssembly::COPY_LOCAL_I32
                                           : WebAssembly::COPY_LOCAL_I64,
                            DL, VT, Src),
         0);
-    return DAG.getCopyToReg(Op.getOperand(0), DL,
-                            cast<RegisterSDNode>(Op.getOperand(1))->getReg(),
-                            Copy);
+    return Op.getNode()->getNumValues() == 1
+               ? DAG.getCopyToReg(Chain, DL, Reg, Copy)
+               : DAG.getCopyToReg(Chain, DL, Reg, Copy, Op.getNumOperands() == 4
+                                                            ? Op.getOperand(3)
+                                                            : SDValue());
   }
   return SDValue();
 }

diff --git a/test/CodeGen/WebAssembly/userstack.ll b/test/CodeGen/WebAssembly/userstack.ll
index f4f9e1c..69cc038 100644 (file)
--- a/test/CodeGen/WebAssembly/userstack.ll
+++ b/test/CodeGen/WebAssembly/userstack.ll
@@ -217,4 +217,16 @@ define void @frameaddress_1() {
   ret void
 }
 
+; Test a stack address passed to an inline asm.
+; CHECK-LABEL: inline_asm:
+; CHECK:       __stack_pointer
+; CHECK:       #APP
+; CHECK-NEXT:  # %{{[0-9]+}}{{$}}
+; CHECK-NEXT:  #NO_APP
+define void @inline_asm() {
+  %tmp = alloca i8
+  call void asm sideeffect "# %0", "r"(i8* %tmp)
+  ret void
+}
+
 ; TODO: test over-aligned alloca