clk: qcom: smd-rpm: rename some msm8974 active-only clocks

Rename msm8974_diff_a_clk, msm8974_div_a_clk1 and msm8974_div_a_clk2 to
move the _a suffix to the end of the name. This follows the pattern used
by other active-only clocks and thus makes it possible to simplify clock
definitions.
This changes the userspace-visible names for this clocks.

Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221209164855.128798-14-dmitry.baryshkov@linaro.org

diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
index 98d82d1..b32fc7c 100644 (file)
--- a/drivers/clk/qcom/clk-smd-rpm.c
+++ b/drivers/clk/qcom/clk-smd-rpm.c
@@ -474,9 +474,9 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a0, cxo_a0_a, 4, 19200000);
 DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a1, cxo_a1_a, 5, 19200000);
 DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8974, cxo_a2, cxo_a2_a, 6, 19200000);
 
-DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_a_clk, 7, 19200000);
-DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_a_clk1, 11, 19200000);
-DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_a_clk2, 12, 19200000);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, diff_clk, diff_clk_a, 7, 19200000);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk1, div_clk1_a, 11, 19200000);
+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8974, div_clk2, div_clk2_a, 12, 19200000);
 DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, div_clk3_a, 13, 19200000);
 
 static struct clk_smd_rpm *msm8909_clks[] = {
@@ -607,11 +607,11 @@ static struct clk_smd_rpm *msm8974_clks[] = {
        [RPM_SMD_CXO_A2]                = &msm8974_cxo_a2,
        [RPM_SMD_CXO_A2_A]              = &msm8974_cxo_a2_a,
        [RPM_SMD_DIFF_CLK]              = &msm8974_diff_clk,
-       [RPM_SMD_DIFF_A_CLK]            = &msm8974_diff_a_clk,
+       [RPM_SMD_DIFF_A_CLK]            = &msm8974_diff_clk_a,
        [RPM_SMD_DIV_CLK1]              = &msm8974_div_clk1,
-       [RPM_SMD_DIV_A_CLK1]            = &msm8974_div_a_clk1,
+       [RPM_SMD_DIV_A_CLK1]            = &msm8974_div_clk1_a,
        [RPM_SMD_DIV_CLK2]              = &msm8974_div_clk2,
-       [RPM_SMD_DIV_A_CLK2]            = &msm8974_div_a_clk2,
+       [RPM_SMD_DIV_A_CLK2]            = &msm8974_div_clk2_a,
        [RPM_SMD_CXO_D0_PIN]            = &msm8974_cxo_d0_pin,
        [RPM_SMD_CXO_D0_A_PIN]          = &msm8974_cxo_d0_a_pin,
        [RPM_SMD_CXO_D1_PIN]            = &msm8974_cxo_d1_pin,
@@ -653,7 +653,7 @@ static struct clk_smd_rpm *msm8976_clks[] = {
        [RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
        [RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
        [RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
-       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
+       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
        [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
        [RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
 };
@@ -687,9 +687,9 @@ static struct clk_smd_rpm *msm8992_clks[] = {
        [RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
        [RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
        [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
-       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
+       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
        [RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
-       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
+       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
        [RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
        [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
        [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
@@ -745,9 +745,9 @@ static struct clk_smd_rpm *msm8994_clks[] = {
        [RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin,
        [RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin,
        [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
-       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
+       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
        [RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
-       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
+       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
        [RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
        [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
        [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
@@ -813,9 +813,9 @@ static struct clk_smd_rpm *msm8996_clks[] = {
        [RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
        [RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
        [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
-       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
+       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
        [RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
-       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
+       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
        [RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
        [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
        [RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
@@ -875,9 +875,9 @@ static struct clk_smd_rpm *msm8998_clks[] = {
        [RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
        [RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
        [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
-       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
+       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
        [RPM_SMD_DIV_CLK2] = &msm8974_div_clk2,
-       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_a_clk2,
+       [RPM_SMD_DIV_A_CLK2] = &msm8974_div_clk2_a,
        [RPM_SMD_DIV_CLK3] = &msm8992_div_clk3,
        [RPM_SMD_DIV_A_CLK3] = &msm8992_div_clk3_a,
        [RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
@@ -945,7 +945,7 @@ static struct clk_smd_rpm *sdm660_clks[] = {
        [RPM_SMD_RF_CLK1] = &msm8916_rf_clk1,
        [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
        [RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
-       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_a_clk1,
+       [RPM_SMD_DIV_A_CLK1] = &msm8974_div_clk1_a,
        [RPM_SMD_LN_BB_CLK] = &msm8998_ln_bb_clk1,
        [RPM_SMD_LN_BB_A_CLK] = &msm8998_ln_bb_clk1_a,
        [RPM_SMD_LN_BB_CLK2] = &msm8998_ln_bb_clk2,
@@ -1013,7 +1013,7 @@ static struct clk_smd_rpm *msm8953_clks[] = {
        [RPM_SMD_RF_CLK3]               = &qcs404_ln_bb_clk,
        [RPM_SMD_RF_CLK3_A]             = &qcs404_ln_bb_clk_a,
        [RPM_SMD_DIV_CLK2]              = &msm8974_div_clk2,
-       [RPM_SMD_DIV_A_CLK2]            = &msm8974_div_a_clk2,
+       [RPM_SMD_DIV_A_CLK2]            = &msm8974_div_clk2_a,
        [RPM_SMD_BB_CLK1_PIN]           = &msm8916_bb_clk1_pin,
        [RPM_SMD_BB_CLK1_A_PIN]         = &msm8916_bb_clk1_a_pin,
        [RPM_SMD_BB_CLK2_PIN]           = &msm8916_bb_clk2_pin,