OSDN Git Service

ASoC: sdm660_cdc: fix HPH CnP on sdm660 internal codec
authorLaxminath Kasam <lkasam@codeaurora.org>
Tue, 14 Mar 2017 07:07:20 +0000 (12:37 +0530)
committerGerrit - the friendly Code Review server <code-review@localhost>
Wed, 22 Mar 2017 07:42:11 +0000 (00:42 -0700)
Enable digital clock bits before digital codec reset.
Also update HD2 settings as per latest HW sequences.

CRs-Fixed: 2018603
Change-Id: I270a324ffebc8b84ef23ff6b209efcde724f9b37
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
sound/soc/codecs/sdm660_cdc/msm-analog-cdc.c
sound/soc/codecs/sdm660_cdc/msm-digital-cdc.c

index 0444026..bf048d8 100644 (file)
@@ -1436,11 +1436,11 @@ static int msm_anlg_cdc_codec_enable_clock_block(struct snd_soc_codec *codec,
        if (enable) {
                snd_soc_update_bits(codec,
                        MSM89XX_PMIC_ANALOG_MASTER_BIAS_CTL, 0x30, 0x30);
+               msm_anlg_cdc_dig_notifier_call(codec, DIG_CDC_EVENT_CLK_ON);
                snd_soc_update_bits(codec,
                        MSM89XX_PMIC_DIGITAL_CDC_RST_CTL, 0x80, 0x80);
                snd_soc_update_bits(codec,
                        MSM89XX_PMIC_DIGITAL_CDC_TOP_CLK_CTL, 0x0C, 0x0C);
-               msm_anlg_cdc_dig_notifier_call(codec, DIG_CDC_EVENT_CLK_ON);
        } else {
                snd_soc_update_bits(codec,
                        MSM89XX_PMIC_DIGITAL_CDC_TOP_CLK_CTL, 0x0C, 0x00);
index 1b56ef4..3aa502b 100644 (file)
@@ -1028,7 +1028,7 @@ static int msm_dig_cdc_event_notify(struct notifier_block *block,
                break;
        case DIG_CDC_EVENT_PRE_RX1_INT_ON:
                snd_soc_update_bits(codec,
-                               MSM89XX_CDC_CORE_RX1_B3_CTL, 0x1C, 0x14);
+                               MSM89XX_CDC_CORE_RX1_B3_CTL, 0x3C, 0x28);
                snd_soc_update_bits(codec,
                                MSM89XX_CDC_CORE_RX1_B4_CTL, 0x18, 0x10);
                snd_soc_update_bits(codec,
@@ -1036,7 +1036,7 @@ static int msm_dig_cdc_event_notify(struct notifier_block *block,
                break;
        case DIG_CDC_EVENT_PRE_RX2_INT_ON:
                snd_soc_update_bits(codec,
-                               MSM89XX_CDC_CORE_RX2_B3_CTL, 0x1C, 0x14);
+                               MSM89XX_CDC_CORE_RX2_B3_CTL, 0x3C, 0x28);
                snd_soc_update_bits(codec,
                                MSM89XX_CDC_CORE_RX2_B4_CTL, 0x18, 0x10);
                snd_soc_update_bits(codec,
@@ -1044,7 +1044,7 @@ static int msm_dig_cdc_event_notify(struct notifier_block *block,
                break;
        case DIG_CDC_EVENT_POST_RX1_INT_OFF:
                snd_soc_update_bits(codec,
-                               MSM89XX_CDC_CORE_RX1_B3_CTL, 0x1C, 0x00);
+                               MSM89XX_CDC_CORE_RX1_B3_CTL, 0x3C, 0x00);
                snd_soc_update_bits(codec,
                                MSM89XX_CDC_CORE_RX1_B4_CTL, 0x18, 0xFF);
                snd_soc_update_bits(codec,
@@ -1052,7 +1052,7 @@ static int msm_dig_cdc_event_notify(struct notifier_block *block,
                break;
        case DIG_CDC_EVENT_POST_RX2_INT_OFF:
                snd_soc_update_bits(codec,
-                               MSM89XX_CDC_CORE_RX2_B3_CTL, 0x1C, 0x00);
+                               MSM89XX_CDC_CORE_RX2_B3_CTL, 0x3C, 0x00);
                snd_soc_update_bits(codec,
                                MSM89XX_CDC_CORE_RX2_B4_CTL, 0x18, 0xFF);
                snd_soc_update_bits(codec,