drm/amd/display: Add swizzle visual confirm mode

[Why]
To support a new visual confirm mode: swizzle to show the specific
color at the screen border according to different surface swizzle mode.
Currently we only support the Linear mode with red color.

Signed-off-by: Po-Ting Chen <robin.chen@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
index ee3eef5..15f987a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c
@@ -403,3 +403,24 @@ void get_hdr_visual_confirm_color(
                break;
        }
 }
+
+void get_surface_tile_visual_confirm_color(
+               struct pipe_ctx *pipe_ctx,
+               struct tg_color *color)
+{
+       uint32_t color_value = MAX_TG_COLOR_VALUE;
+       /* Determine the overscan color based on the top-most (desktop) plane's context */
+       struct pipe_ctx *top_pipe_ctx  = pipe_ctx;
+
+       while (top_pipe_ctx->top_pipe != NULL)
+               top_pipe_ctx = top_pipe_ctx->top_pipe;
+
+       switch (top_pipe_ctx->plane_state->tiling_info.gfx9.swizzle) {
+       case DC_SW_LINEAR:
+               /* LINEAR Surface - set border color to red */
+               color->color_r_cr = color_value;
+               break;
+       default:
+               break;
+       }
+}

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 5a53630..39a5e37 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -318,6 +318,7 @@ enum visual_confirm {
        VISUAL_CONFIRM_HDR = 2,
        VISUAL_CONFIRM_MPCTREE = 4,
        VISUAL_CONFIRM_PSR = 5,
+       VISUAL_CONFIRM_SWIZZLE = 9,
 };
 
 enum dcc_option {

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index be5287e..3b175af 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2433,6 +2433,8 @@ void dcn10_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx,
                get_hdr_visual_confirm_color(pipe_ctx, color);
        else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SURFACE)
                get_surface_visual_confirm_color(pipe_ctx, color);
+       else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SWIZZLE)
+               get_surface_tile_visual_confirm_color(pipe_ctx, color);
        else
                color_space_to_black_color(
                                dc, pipe_ctx->stream->output_color_space, color);

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index f3ac0cf..d0d6a94 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -2290,6 +2290,8 @@ void dcn20_update_visual_confirm_color(struct dc *dc, struct pipe_ctx *pipe_ctx,
                get_surface_visual_confirm_color(pipe_ctx, color);
        else if (dc->debug.visual_confirm == VISUAL_CONFIRM_MPCTREE)
                get_mpctree_visual_confirm_color(pipe_ctx, color);
+       else if (dc->debug.visual_confirm == VISUAL_CONFIRM_SWIZZLE)
+               get_surface_tile_visual_confirm_color(pipe_ctx, color);
 
        if (mpc->funcs->set_bg_color)
                mpc->funcs->set_bg_color(mpc, color, mpcc_id);

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index 5b22958..e3ab4e4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -268,5 +268,7 @@ void get_hdr_visual_confirm_color(
 void get_mpctree_visual_confirm_color(
                struct pipe_ctx *pipe_ctx,
                struct tg_color *color);
-
+void get_surface_tile_visual_confirm_color(
+               struct pipe_ctx *pipe_ctx,
+               struct tg_color *color);
 #endif /* __DC_HW_SEQUENCER_H__ */