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drm/amdgpu: add partition ID track in ring
authorJames Zhu <James.Zhu@amd.com>
Mon, 15 Aug 2022 20:45:12 +0000 (16:45 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:59:30 +0000 (09:59 -0400)
Keep track partition ID in ring.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c

index d2b1a88..4a4c9f8 100644 (file)
@@ -252,6 +252,7 @@ struct amdgpu_ring {
        uint32_t                buf_mask;
        u32                     idx;
        u32                     xcc_id;
+       u32                     xcp_id;
        u32                     me;
        u32                     pipe;
        u32                     queue;
index 97011e7..c90ea34 100644 (file)
@@ -61,6 +61,47 @@ void aqua_vanjaram_doorbell_index_init(struct amdgpu_device *adev)
        adev->doorbell_index.max_assignment = AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT << 1;
 }
 
+static void aqua_vanjaram_set_xcp_id(struct amdgpu_device *adev,
+                            uint32_t inst_idx, struct amdgpu_ring *ring)
+{
+       int xcp_id;
+       enum AMDGPU_XCP_IP_BLOCK ip_blk;
+       uint32_t inst_mask;
+
+       ring->xcp_id = ~0;
+       if (adev->xcp_mgr->mode == AMDGPU_XCP_MODE_NONE)
+               return;
+
+       inst_mask = 1 << inst_idx;
+
+       switch (ring->funcs->type) {
+       case AMDGPU_HW_IP_GFX:
+       case AMDGPU_RING_TYPE_COMPUTE:
+       case AMDGPU_RING_TYPE_KIQ:
+               ip_blk = AMDGPU_XCP_GFX;
+               break;
+       case AMDGPU_RING_TYPE_SDMA:
+               ip_blk = AMDGPU_XCP_SDMA;
+               break;
+       case AMDGPU_RING_TYPE_VCN_ENC:
+       case AMDGPU_RING_TYPE_VCN_JPEG:
+               ip_blk = AMDGPU_XCP_VCN;
+               if (adev->xcp_mgr->mode == AMDGPU_CPX_PARTITION_MODE)
+                       inst_mask = 1 << (inst_idx * 2);
+               break;
+       default:
+               DRM_ERROR("Not support ring type %d!", ring->funcs->type);
+               return;
+       }
+
+       for (xcp_id = 0; xcp_id < adev->xcp_mgr->num_xcps; xcp_id++) {
+               if (adev->xcp_mgr->xcp[xcp_id].ip[ip_blk].inst_mask & inst_mask) {
+                       ring->xcp_id = xcp_id;
+                       break;
+               }
+       }
+}
+
 static int8_t aqua_vanjaram_logical_to_dev_inst(struct amdgpu_device *adev,
                                         enum amd_hw_ip_block_type block,
                                         int8_t inst)