Attempt to make the bit-twiddling readable resulted in the binary value being

overwritten.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121337 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMAsmBackend.cpp b/lib/Target/ARM/ARMAsmBackend.cpp
index 8e809f0..581ac91 100644 (file)
--- a/lib/Target/ARM/ARMAsmBackend.cpp
+++ b/lib/Target/ARM/ARMAsmBackend.cpp
@@ -152,10 +152,11 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
     // Note that the halfwords are stored high first, low second; so we need
     // to transpose the fixup value here to map properly.
     unsigned isNeg = (int64_t(Value) < 0) ? 1 : 0;
-    uint32_t Binary = 0x3fffff & ((Value - 4) >> 1);
-    Binary  = (Binary & 0x7ff) << 16;    // Low imm11 value.
-    Binary |= (Binary & 0x1ffc00) >> 11; // High imm10 value.
-    Binary |= isNeg << 10;               // Sign bit.
+    uint32_t Binary = 0;
+    Value = 0x3fffff & ((Value - 4) >> 1);
+    Binary  = (Value & 0x7ff) << 16;    // Low imm11 value.
+    Binary |= (Value & 0x1ffc00) >> 11; // High imm10 value.
+    Binary |= isNeg << 10;              // Sign bit.
     return Binary;
   }
   case ARM::fixup_arm_thumb_blx: {
@@ -169,10 +170,11 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
     // Note that the halfwords are stored high first, low second; so we need
     // to transpose the fixup value here to map properly.
     unsigned isNeg = (int64_t(Value) < 0) ? 1 : 0;
-    uint32_t Binary = 0xfffff & ((Value - 2) >> 2);
-    Binary  = (Binary & 0x3ff) << 17;    // Low imm10L value.
-    Binary |= (Binary & 0xffc00) >> 10;  // High imm10H value.
-    Binary |= isNeg << 10;               // Sign bit.
+    uint32_t Binary = 0;
+    Value = 0xfffff & ((Value - 2) >> 2);
+    Binary  = (Value & 0x3ff) << 17;    // Low imm10L value.
+    Binary |= (Value & 0xffc00) >> 10;  // High imm10H value.
+    Binary |= isNeg << 10;              // Sign bit.
     return Binary;
   }
   case ARM::fixup_arm_thumb_cp: