Some SOCs(System-on-chip) S/W configurations restricts the access
to particular set of the GIC registers to prevent invalid
accesses for the security reasons. Provide a configuration
option for the GICv3 driver and also restrict the access
of the GICR_WAKER registers from the non-secure world.
If this Kconfig option is not selected then it means that
access control configuration is enabled from the secure world.
CRs-Fixed: 958251
Change-Id: I91f06484b6b6bf58d05e6b621ee84610a71fe3e7
[abhimany: minor merge conflict resolution]
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
bool
select PCI_MSI_IRQ_DOMAIN
+config ARM_GIC_V3_NO_ACCESS_CONTROL
+ bool "GICv3 No Access Control Configuration"
+ depends on ARM_GIC_V3
+ help
+ On some SOCs with the access control configurations it is
+ not allowed to access certain set of the GIC registers
+ from non-secure world. Provide a common flag to protect
+ those functionalities and compile them out for such
+ configurations, so that specific registers are not touched.
+
+ For production kernels, you should say 'N' here.
+
config ARM_NVIC
bool
select IRQ_DOMAIN
}
#endif
+#ifdef CONFIG_ARM_GIC_V3_NO_ACCESS_CONTROL
static void gic_enable_redist(bool enable)
{
void __iomem *rbase;
pr_err_ratelimited("redistributor failed to %s...\n",
enable ? "wakeup" : "sleep");
}
+#else
+static void gic_enable_redist(bool enable) { }
+#endif
/*
* Routines to disable, enable, EOI and route interrupts