project(timidity41)
+set(TIM41_USE_AVX2 FALSE CACHE BOOL "Enable use of Intel AVX2 enhanced instructions")
+
set(CMAKE_RUNTIME_OUTPUT_DIRECTORY_DEBUG "${CMAKE_BINARY_DIR}/Debug/bin")
set(CMAKE_RUNTIME_OUTPUT_DIRECTORY_RELEASE "${CMAKE_BINARY_DIR}/Release/bin")
set(CMAKE_RUNTIME_OUTPUT_DIRECTORY_RELWITHDEBINFO "${CMAKE_BINARY_DIR}/RelWithDebInfo/bin")
-D_CRT_SECURE_NO_WARNINGS
)
+if(TIM41_USE_AVX2)
+ add_definitions(-DUSE_AVX2)
+else()
+ add_definitions(-DUSE_SSE42)
+endif()
+
if(MSVC)
add_compile_options(/W4 /Zi /GS /fp:fast /permissive- /MP /Qspectre)
+
+ if(TIM41_USE_AVX2)
+ add_compile_options(/arch:AVX2)
+ endif()
+
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} /EHsc /std:c++17")
set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} /GL /guard:cf")
-DSTDOUT_FILENO=1
)
else()
- add_compile_options(-Wall -Wextra -ffast-math -msse4.2)
+ add_compile_options(-Wall -Wextra -ffast-math)
+
+ if(TIM41_USE_AVX2)
+ add_compile_options(-mavx2)
+ else()
+ add_compile_options(-msse4.2)
+ endif()
+
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++17")
set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -flto")
set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} -flto")
#undef USE_PENTIUM_4
#endif
-#define USE_SSE // \83e\83X\83g\97p
-#define USE_SSE2 // \83e\83X\83g\97p
-#define USE_SSE3 // \83e\83X\83g\97p
-#define USE_SSSE3 // \83e\83X\83g\97p
-#define USE_SSE41 // \83e\83X\83g\97p
-#define USE_SSE42 // \83e\83X\83g\97p
+//#define USE_SSE // \83e\83X\83g\97p
+//#define USE_SSE2 // \83e\83X\83g\97p
+//#define USE_SSE3 // \83e\83X\83g\97p
+//#define USE_SSSE3 // \83e\83X\83g\97p
+//#define USE_SSE41 // \83e\83X\83g\97p
+//#define USE_SSE42 // \83e\83X\83g\97p
//#define USE_AVX // \83e\83X\83g\97p
//#define USE_AVX2 // \83e\83X\83g\97p
#define MM_FMA3_PD(v00, v01, v10, v11, v20, v21) _mm_fmadd_pd(v20, v21, _mm_fmadd_pd(v10, v11, _mm_mul_pd(v00, v01)) )
#define MM_FMA4_PD(v00, v01, v10, v11, v20, v21, v30, v31) _mm_add_pd(\
_mm_fmadd_pd(v30, v31, _mm_mul_pd(v20, v21)), _mm_fmadd_pd(v10, v11, _mm_mul_pd(v00, v01)) )
-#define MM_FMA5_PD(v00, v01, v10, v11, v20, v21, v30, v31, v40, v41) _mm_fmadd_pd(v40, v41, \
- _mm_fmadd_pd(v30, v31, _mm_mul_pd(v20, v21)), _mm_fmadd_pd(v10, v11, _mm_mul_pd(v00, v01)) )
+#define MM_FMA5_PD(v00, v01, v10, v11, v20, v21, v30, v31, v40, v41) _mm_add_pd(_mm_fmadd_pd(v40, v41, \
+ _mm_fmadd_pd(v30, v31, _mm_mul_pd(v20, v21))), _mm_fmadd_pd(v10, v11, _mm_mul_pd(v00, v01)) )
#define MM_FMA6_PD(v00, v01, v10, v11, v20, v21, v30, v31, v40, v41, v50, v51) _mm_add_pd(\
_mm_fmadd_pd(v50, v51, _mm_fmadd_pd(v40, v41, _mm_mul_pd(v30, v31))), \
_mm_fmadd_pd(v20, v21, _mm_fmadd_pd(v10, v11, _mm_mul_pd(v00, v01))) )
double tmp;
for (i = 0; i < gauss_n; i += 8){
#if (USE_X86_EXT_INTRIN >= 9)
- __m256i vec32 = _mm256_cvtepi16_epi32(_mm256_loadu_si256((__m128i *)&sptr[i])); // low i16*8 > i32*8
+ __m256i vec32 = _mm256_cvtepi16_epi32(_mm_loadu_si128((__m128i *)&sptr[i])); // low i16*8 > i32*8
__m128i vec1 = _mm256_extracti128_si256(vec32, 0x0);
__m128i vec2 = _mm256_extracti128_si256(vec32, 0x1);
#else
__m128d sum1, sum2;
for (i = 0; i < width; i += 8){
#if (USE_X86_EXT_INTRIN >= 9)
- __m256i vec32 = _mm256_cvtepi16_epi32(_mm256_loadu_si256((__m128i *)&v1[i])); // low i16*8 > i32*8
+ __m256i vec32 = _mm256_cvtepi16_epi32(_mm_loadu_si128((__m128i *)&v1[i])); // low i16*8 > i32*8
__m128i vec1 = _mm256_extracti128_si256(vec32, 0x0);
__m128i vec2 = _mm256_extracti128_si256(vec32, 0x1);
#else