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x86/cpu: Add definitions for the Intel Hardware Feedback Interface
authorRicardo Neri <ricardo.neri-calderon@linux.intel.com>
Thu, 27 Jan 2022 19:34:49 +0000 (11:34 -0800)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Thu, 3 Feb 2022 18:50:49 +0000 (19:50 +0100)
Add the CPUID feature bit and the model-specific registers needed to
identify and configure the Intel Hardware Feedback Interface.

Acked-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
arch/x86/include/asm/cpufeatures.h
arch/x86/include/asm/msr-index.h

index 6db4e29..b39f510 100644 (file)
 #define X86_FEATURE_HWP_ACT_WINDOW     (14*32+ 9) /* HWP Activity Window */
 #define X86_FEATURE_HWP_EPP            (14*32+10) /* HWP Energy Perf. Preference */
 #define X86_FEATURE_HWP_PKG_REQ                (14*32+11) /* HWP Package Level Request */
+#define X86_FEATURE_HFI                        (14*32+19) /* Hardware Feedback Interface */
 
 /* AMD SVM Feature Identification, CPUID level 0x8000000a (EDX), word 15 */
 #define X86_FEATURE_NPT                        (15*32+ 0) /* Nested Page Table support */
index 3faf0f9..89e0a1d 100644 (file)
 
 #define PACKAGE_THERM_STATUS_PROCHOT           (1 << 0)
 #define PACKAGE_THERM_STATUS_POWER_LIMIT       (1 << 10)
+#define PACKAGE_THERM_STATUS_HFI_UPDATED       (1 << 26)
 
 #define MSR_IA32_PACKAGE_THERM_INTERRUPT       0x000001b2
 
 #define PACKAGE_THERM_INT_HIGH_ENABLE          (1 << 0)
 #define PACKAGE_THERM_INT_LOW_ENABLE           (1 << 1)
 #define PACKAGE_THERM_INT_PLN_ENABLE           (1 << 24)
+#define PACKAGE_THERM_INT_HFI_ENABLE           (1 << 25)
 
 /* Thermal Thresholds Support */
 #define THERM_INT_THRESHOLD0_ENABLE    (1 << 15)
 #define MSR_VM_IGNNE                    0xc0010115
 #define MSR_VM_HSAVE_PA                 0xc0010117
 
+/* Hardware Feedback Interface */
+#define MSR_IA32_HW_FEEDBACK_PTR        0x17d0
+#define MSR_IA32_HW_FEEDBACK_CONFIG     0x17d1
+
 #endif /* _ASM_X86_MSR_INDEX_H */