ARM: dts: dra7: add OCP2SCP3 and SATA nodes

Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.

[Roger Q] Clean up. Updated IRQ for interrupt crossbar.

CC: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 37a0595..ffbcd4d 100644 (file)
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -776,6 +776,45 @@
                        interrupts = <0 343 0x4>;
                        status = "disabled";
                };
+
+               omap_control_sata: control-phy@4a002374 {
+                       compatible = "ti,control-phy-pipe3";
+                       reg = <0x4a002374 0x4>;
+                       reg-names = "power";
+                       clocks = <&sys_clkin1>;
+                       clock-names = "sysclk";
+               };
+
+               /* OCP2SCP3 */
+               ocp2scp@4a090000 {
+                       compatible = "ti,omap-ocp2scp";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+                       reg = <0x4a090000 0x20>;
+                       ti,hwmods = "ocp2scp3";
+                       sata_phy: phy@4A096000 {
+                               compatible = "ti,phy-pipe3-sata";
+                               reg = <0x4A096000 0x80>, /* phy_rx */
+                                     <0x4A096400 0x64>, /* phy_tx */
+                                     <0x4A096800 0x40>; /* pll_ctrl */
+                               reg-names = "phy_rx", "phy_tx", "pll_ctrl";
+                               ctrl-module = <&omap_control_sata>;
+                               clocks = <&sys_clkin1>;
+                               clock-names = "sysclk";
+                               #phy-cells = <0>;
+                       };
+               };
+
+               sata: sata@4a141100 {
+                       compatible = "snps,dwc-ahci";
+                       reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;
+                       interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+                       phys = <&sata_phy>;
+                       phy-names = "sata-phy";
+                       clocks = <&sata_ref_clk>;
+                       ti,hwmods = "sata";
+               };
        };
 };