Index: opcodes

* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.

Index: gas

* config/tc-mep.c (md_begin): Check coprocessor type.
(md_check_parallel64_scheduling): Use memset to initialize the buffer.
(md_check_parallel32_scheduling): Likewise.
(slot_ok): New.
(mep_check_ivc2_scheduling): New.
(mep_check_parallel_scheduling): Call it.
(mep_process_saved_insns): Add IVC2 slot support.
(md_assemble): Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index ade42dd..2591b09 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2009-04-29  DJ Delorie  <dj@redhat.com>
+
+       * config/tc-mep.c (md_begin): Check coprocessor type.
+       (md_check_parallel64_scheduling): Use memset to initialize the buffer.
+       (md_check_parallel32_scheduling): Likewise.
+       (slot_ok): New.
+       (mep_check_ivc2_scheduling): New.
+       (mep_check_parallel_scheduling): Call it.
+       (mep_process_saved_insns): Add IVC2 slot support.
+       (md_assemble): Likewise.
+
 2009-04-30  Nick Clifton  <nickc@redhat.com>
 
        * config/obj-elf.c (obj_elf_type): Add support for a

diff --git a/gas/config/tc-mep.c b/gas/config/tc-mep.c
index eb43492..6ad6877 100644 (file)
--- a/gas/config/tc-mep.c
+++ b/gas/config/tc-mep.c
@@ -57,6 +57,7 @@ static int mode = CORE; /* Start in core mode. */
 static int pluspresent = 0;
 static int allow_disabled_registers = 0;
 static int library_flag = 0;
+static int mep_cop = EF_MEP_COP_NONE;
 
 /* We're going to need to store all of the instructions along with
    their fixups so that we can parallelization grouping rules. */
@@ -465,6 +466,8 @@ md_begin ()
   else
     MEP_OMASK = (MEP_OMASK & ~optbitset) | optbits;
 
+  mep_cop = mep_config_map[mep_config_index].cpu_flag & EF_MEP_COP_MASK;
+
   /* Set the machine number and endian.  */
   gas_cgen_cpu_desc = mep_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
                                         CGEN_CPU_OPEN_ENDIAN,
@@ -769,11 +772,9 @@ mep_check_parallel64_scheduling (void)
        {
          char *errmsg;
          mep_insn insn;
-          int i;
 
           /* Initialize the insn buffer.  */
-          for (i = 0; i < 64; i++)
-             insn.buffer[i] = '\0';
+         memset (insn.buffer, 0, sizeof(insn.buffer));
 
          /* We have a coprocessor insn.  At this point in time there
             are is 32-bit core nop.  There is only a 16-bit core
@@ -834,11 +835,9 @@ mep_check_parallel64_scheduling (void)
        {
          char * errmsg;
          mep_insn insn;
-          int i;
 
           /* Initialize the insn buffer */
-          for (i = 0; i < 64; i++)
-             insn.buffer[i] = '\0';
+         memset (insn.buffer, 0, sizeof(insn.buffer));
 
          /* We have a core insn.  We have to handle all possible nop
             lengths.  If a coprocessor doesn't have a nop of a certain
@@ -888,6 +887,238 @@ mep_check_parallel64_scheduling (void)
     }
 }
 
+#ifdef MEP_IVC2_SUPPORTED
+
+/* IVC2 packing is different than other VLIW coprocessors.  Many of
+   the COP insns can be placed in any of three different types of
+   slots, and each bundle can hold up to three insns - zero or one
+   core insns and one or two IVC2 insns.  The insns in CGEN are tagged
+   with which slots they're allowed in, and we have to decide based on
+   that whether or not the user had given us a possible bundling.  */
+
+static int
+slot_ok (int idx, int slot)
+{
+  const CGEN_INSN *insn = saved_insns[idx].insn;
+  return CGEN_ATTR_CGEN_INSN_SLOTS_VALUE (CGEN_INSN_ATTRS (insn)) & (1 << slot);
+}
+
+static void
+mep_check_ivc2_scheduling (void)
+{
+  /* VLIW modes:
+
+     V1 [-----core-----][--------p0s-------][------------p1------------]
+     V2 [-------------core-------------]xxxx[------------p1------------]
+     V3 1111[--p0--]0111[--------p0--------][------------p1------------]
+  */
+
+  int slots[5]; /* Indexed off the SLOTS_ATTR enum.  */
+  int corelength;
+  int i;
+  bfd_byte temp[4];
+  bfd_byte *f;
+  int e = target_big_endian ? 0 : 1;
+
+  /* If there are no insns saved, that's ok.  Just return.  This will
+     happen when mep_process_saved_insns is called when the end of the
+     source file is reached and there are no insns left to be processed.  */
+  if (num_insns_saved == 0)
+    return;
+
+  for (i=0; i<5; i++)
+    slots[i] = -1;
+
+  if (slot_ok (0, SLOTS_CORE))
+    {
+      slots[SLOTS_CORE] = 0;
+      corelength = CGEN_FIELDS_BITSIZE (& saved_insns[0].fields);
+    }
+  else
+    corelength = 0;
+
+  if (corelength == 16)
+    {
+      /* V1 mode: we need a P0S slot and a P1 slot.  */
+      switch (num_insns_saved)
+       {
+       case 1:
+         /* No other insns, fill with NOPs. */
+         break;
+
+       case 2:
+         if (slot_ok (1, SLOTS_P1))
+           slots[SLOTS_P1] = 1;
+         else if (slot_ok (1, SLOTS_P0S))
+           slots[SLOTS_P0S] = 1;
+         else
+           as_bad ("cannot pack %s with a 16-bit insn",
+                   CGEN_INSN_NAME (saved_insns[1].insn));
+         break;
+
+       case 3:
+         if (slot_ok (1, SLOTS_P0S)
+             && slot_ok (2, SLOTS_P1))
+           {
+             slots[SLOTS_P0S] = 1;
+             slots[SLOTS_P1] = 2;
+           }
+         else if (slot_ok (1, SLOTS_P1)
+             && slot_ok (2, SLOTS_P0S))
+           {
+             slots[SLOTS_P1] = 1;
+             slots[SLOTS_P0S] = 2;
+           }
+         else
+           as_bad ("cannot pack %s and %s together with a 16-bit insn",
+                   CGEN_INSN_NAME (saved_insns[1].insn),
+                   CGEN_INSN_NAME (saved_insns[2].insn));
+         break;
+
+       default:
+         as_bad ("too many IVC2 insns to pack with a 16-bit core insn");
+         break;
+       }
+    }
+  else if (corelength == 32)
+    {
+      /* V2 mode: we need a P1 slot.  */
+      switch (num_insns_saved)
+       {
+       case 1:
+         /* No other insns, fill with NOPs. */
+         break;
+       case 2:
+         /* The other insn must allow P1.  */
+         if (!slot_ok (1, SLOTS_P1))
+           as_bad ("cannot pack %s into slot P1",
+                   CGEN_INSN_NAME (saved_insns[1].insn));
+         else
+           slots[SLOTS_P1] = 1;
+         break;
+       default:
+         as_bad ("too many IVC2 insns to pack with a 32-bit core insn");
+         break;
+       }
+    }
+  else if (corelength == 0)
+    {
+      /* V3 mode: we need a P0 slot and a P1 slot, or a P0S+P1 with a
+        core NOP.  */
+      switch (num_insns_saved)
+       {
+       case 1:
+         if (slot_ok (0, SLOTS_P0))
+           slots[SLOTS_P0] = 0;
+         else if (slot_ok (0, SLOTS_P1))
+           slots[SLOTS_P1] = 0;
+         else if (slot_ok (0, SLOTS_P0S))
+           slots[SLOTS_P0S] = 0;
+         else
+           as_bad ("unable to pack %s by itself?",
+                   CGEN_INSN_NAME (saved_insns[0].insn));
+         break;
+
+       case 2:
+         if (slot_ok (0, SLOTS_P0)
+             && slot_ok (1, SLOTS_P1))
+           {
+             slots[SLOTS_P0] = 0;
+             slots[SLOTS_P1] = 1;
+           }
+         else if (slot_ok (0, SLOTS_P1)
+             && slot_ok (1, SLOTS_P0))
+           {
+             slots[SLOTS_P1] = 0;
+             slots[SLOTS_P0] = 1;
+           }
+         else if (slot_ok (0, SLOTS_P0S)
+             && slot_ok (1, SLOTS_P1))
+           {
+             slots[SLOTS_P0S] = 0;
+             slots[SLOTS_P1] = 1;
+           }
+         else if (slot_ok (0, SLOTS_P1)
+             && slot_ok (1, SLOTS_P0S))
+           {
+             slots[SLOTS_P1] = 0;
+             slots[SLOTS_P0S] = 1;
+           }
+         else
+           as_bad ("cannot pack %s and %s together",
+                   CGEN_INSN_NAME (saved_insns[0].insn),
+                   CGEN_INSN_NAME (saved_insns[1].insn));
+         break;
+
+       default:
+         as_bad ("too many IVC2 insns to pack together");
+         break;
+       }
+    }
+
+  /* The core insn needs to be done normally so that fixups,
+     relaxation, etc are done.  Other IVC2 insns need only be resolved
+     to bit patterns; there are no relocations for them.  */
+  if (slots[SLOTS_CORE] != -1)
+    {
+      gas_cgen_restore_fixups (0);
+      gas_cgen_finish_insn (saved_insns[0].insn, saved_insns[0].buffer,
+                           CGEN_FIELDS_BITSIZE (& saved_insns[0].fields),
+                           1, NULL);
+    }
+
+  /* Allocate whatever bytes remain in our insn word.  Adjust the
+     pointer to point (as if it were) to the beginning of the whole
+     word, so that we don't have to adjust for it elsewhere.  */
+  f = (bfd_byte *) frag_more (8 - corelength / 8);
+  /* Unused slots are filled with NOPs, which happen to be all zeros.  */
+  memset (f, 0, 8 - corelength / 8);
+  f -= corelength / 8;
+
+  for (i=1; i<5; i++)
+    {
+      mep_insn *m;
+
+      if (slots[i] == -1)
+       continue;
+
+      m = & saved_insns[slots[i]];
+
+#if CGEN_INT_INSN_P
+      cgen_put_insn_value (gas_cgen_cpu_desc, (unsigned char *) temp, 32,
+                          m->buffer[0]);
+#else
+      memcpy (temp, m->buffer, byte_len);
+#endif
+
+      switch (i)
+       {
+       case SLOTS_P0S:
+         f[2^e] = temp[1^e];
+         f[3^e] = temp[2^e];
+         f[4^e] |= temp[3^e] & 0xf0;
+         break;
+       case SLOTS_P0:
+         f[0^e] = 0xf0 | temp[0^e] >> 4;
+         f[1^e] = temp[0^e] << 4 | 0x07;
+         f[2^e] = temp[1^e];
+         f[3^e] = temp[2^e];
+         f[4^e] |= temp[3^e] & 0xf0;
+         break;
+       case SLOTS_P1:
+         f[4^e] |= temp[0^e] >> 4;
+         f[5^e] = temp[0^e] << 4 | temp[1^e] >> 4;
+         f[6^e] = temp[1^e] << 4 | temp[2^e] >> 4;
+         f[7^e] = temp[2^e] << 4 | temp[3^e] >> 4;
+         break;
+       default:
+         break;
+       }
+    }
+}
+
+#endif /* MEP_IVC2_SUPPORTED */
+
 /* The scheduling functions are just filters for invalid combinations.
    If there is a violation, they terminate assembly.  Otherise they
    just fall through.  Succesful combinations cause no side effects
@@ -898,7 +1129,12 @@ mep_check_parallel_scheduling (void)
 {
   /* This is where we will eventually read the config information
      and choose which scheduling checking function to call.  */   
-  if (MEP_VLIW64)
+#ifdef MEP_IVC2_SUPPORTED
+  if (mep_cop == EF_MEP_COP_IVC2)
+    mep_check_ivc2_scheduling ();
+  else
+#endif /* MEP_IVC2_SUPPORTED */
+    if (MEP_VLIW64)
     mep_check_parallel64_scheduling ();
   else
     mep_check_parallel32_scheduling ();
@@ -908,21 +1144,31 @@ static void
 mep_process_saved_insns (void)
 {
   int i;
+  unsigned j;
 
   gas_cgen_save_fixups (MAX_SAVED_FIXUP_CHAINS - 1);
 
   /* We have to check for valid scheduling here. */
   mep_check_parallel_scheduling ();
 
-  /* If the last call didn't cause assembly to terminate, we have
-     a valid vliw insn/insn pair saved. Restore this instructions'
-     fixups and process the insns. */
-  for (i = 0;i<num_insns_saved;i++)
+  /* IVC2 has to pack instructions in a funny way, so it does it
+     itself.  */
+  if (mep_cop != EF_MEP_COP_IVC2)
     {
-      gas_cgen_restore_fixups (i);
-      gas_cgen_finish_insn (saved_insns[i].insn, saved_insns[i].buffer,
-                           CGEN_FIELDS_BITSIZE (& saved_insns[i].fields),
-                           1, NULL);
+      /* If the last call didn't cause assembly to terminate, we have
+        a valid vliw insn/insn pair saved. Restore this instructions'
+        fixups and process the insns. */
+      for (i = 0;i<num_insns_saved;i++)
+       {
+         gas_cgen_restore_fixups (i);
+         gas_cgen_finish_insn (saved_insns[i].insn, saved_insns[i].buffer,
+                               CGEN_FIELDS_BITSIZE (& saved_insns[i].fields),
+                               1, NULL);
+         printf("insn[%d] =", i);
+         for (j=0; j<sizeof(saved_insns[i].buffer); j++)
+           printf(" %02x", saved_insns[i].buffer[j]);
+         printf("\n");
+       }
     }
   gas_cgen_restore_fixups (MAX_SAVED_FIXUP_CHAINS - 1);
 
@@ -984,8 +1230,25 @@ md_assemble (char * str)
          for (i=0; i < CGEN_MAX_INSN_SIZE; i++)
             insn.buffer[i]='\0';
 
-      /* Can't tell core / copro insns apart at parse time! */
-      cgen_bitset_union (isas, & MEP_COP_ISA, isas);
+
+      /* IVC2 has two sets of coprocessor opcodes, one for CORE mode
+        and one for VLIW mode.  They have the same names.  To specify
+        which one we want, we use the COP isas - the 32 bit ISA is
+        for the core instructions (which are always 32 bits), and the
+        other ISAs are for the VLIW ones (which always pack into 64
+        bit insns).  We use other attributes to determine slotting
+        later.  */
+      if (mep_cop == EF_MEP_COP_IVC2)
+       {
+         cgen_bitset_union (isas, & MEP_COP16_ISA, isas);
+         cgen_bitset_union (isas, & MEP_COP48_ISA, isas);
+         cgen_bitset_union (isas, & MEP_COP64_ISA, isas);
+       }
+      else
+       {
+         /* Can't tell core / copro insns apart at parse time! */
+         cgen_bitset_union (isas, & MEP_COP_ISA, isas);
+       }
 
       /* Assemble the insn so we can examine its attributes. */
       insn.insn = mep_cgen_assemble_insn (gas_cgen_cpu_desc, str,
@@ -1068,6 +1331,10 @@ md_assemble (char * str)
       /* Only single instructions are assembled in core mode. */
       mep_insn insn;
 
+      /* See comment in the VLIW clause above about this.  */
+      if (mep_cop & EF_MEP_COP_IVC2)
+       cgen_bitset_union (isas, & MEP_COP32_ISA, isas);
+
       /* If a leading '+' was present, issue an error.
         That's not allowed in core mode. */
       if (pluspresent)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9d4794f..045f0fd 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,13 @@
+2009-04-30  DJ Delorie  <dj@redhat.com>
+
+       * mep-asm.c: Regenerate.
+       * mep-desc.c: Regenerate.
+       * mep-desc.h: Regenerate.
+       * mep-dis.c: Regenerate.
+       * mep-ibld.c: Regenerate.
+       * mep-opc.c: Regenerate.
+       * mep-opc.h: Regenerate.
+
 2009-04-17  DJ Delorie  <dj@redhat.com
 
        * mep-desc.c: Regenerate.

diff --git a/opcodes/mep-asm.c b/opcodes/mep-asm.c
index 41a1f92..1603872 100644 (file)
--- a/opcodes/mep-asm.c
+++ b/opcodes/mep-asm.c
@@ -85,6 +85,32 @@ parse_csrn (CGEN_CPU_DESC cd, const char **strp,
 }
 
 /* begin-cop-ip-parse-handlers */
+static const char *
+parse_ivc2_cr (CGEN_CPU_DESC,
+       const char **,
+       CGEN_KEYWORD *,
+       long *) ATTRIBUTE_UNUSED;
+static const char *
+parse_ivc2_cr (CGEN_CPU_DESC cd,
+       const char **strp,
+       CGEN_KEYWORD *keyword_table  ATTRIBUTE_UNUSED,
+       long *field)
+{
+  return cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_cr_ivc2, field);
+}
+static const char *
+parse_ivc2_ccr (CGEN_CPU_DESC,
+       const char **,
+       CGEN_KEYWORD *,
+       long *) ATTRIBUTE_UNUSED;
+static const char *
+parse_ivc2_ccr (CGEN_CPU_DESC cd,
+       const char **strp,
+       CGEN_KEYWORD *keyword_table  ATTRIBUTE_UNUSED,
+       long *field)
+{
+  return cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_ccr_ivc2, field);
+}
 /* end-cop-ip-parse-handlers */
 
 const char *
@@ -840,6 +866,24 @@ mep_cgen_parse_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_CRNX64 :
       errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_cr64, & fields->f_crnx);
       break;
+    case MEP_OPERAND_CROC :
+      errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_cr64, & fields->f_ivc2_5u7);
+      break;
+    case MEP_OPERAND_CROP :
+      errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_cr64, & fields->f_ivc2_5u23);
+      break;
+    case MEP_OPERAND_CRPC :
+      errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_cr64, & fields->f_ivc2_5u26);
+      break;
+    case MEP_OPERAND_CRPP :
+      errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_cr64, & fields->f_ivc2_5u18);
+      break;
+    case MEP_OPERAND_CRQC :
+      errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_cr64, & fields->f_ivc2_5u21);
+      break;
+    case MEP_OPERAND_CRQP :
+      errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_cr64, & fields->f_ivc2_5u13);
+      break;
     case MEP_OPERAND_CSRN :
       errmsg = parse_csrn (cd, strp, & mep_cgen_opval_h_csr, & fields->f_csrn);
       break;
@@ -861,6 +905,90 @@ mep_cgen_parse_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_HI :
       errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_csr, & junk);
       break;
+    case MEP_OPERAND_IMM16P0 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM16P0, (unsigned long *) (& fields->f_ivc2_imm16p0));
+      break;
+    case MEP_OPERAND_IMM3P12 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM3P12, (unsigned long *) (& fields->f_ivc2_3u12));
+      break;
+    case MEP_OPERAND_IMM3P25 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM3P25, (unsigned long *) (& fields->f_ivc2_3u25));
+      break;
+    case MEP_OPERAND_IMM3P4 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM3P4, (unsigned long *) (& fields->f_ivc2_3u4));
+      break;
+    case MEP_OPERAND_IMM3P5 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM3P5, (unsigned long *) (& fields->f_ivc2_3u5));
+      break;
+    case MEP_OPERAND_IMM3P9 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM3P9, (unsigned long *) (& fields->f_ivc2_3u9));
+      break;
+    case MEP_OPERAND_IMM4P10 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM4P10, (unsigned long *) (& fields->f_ivc2_4u10));
+      break;
+    case MEP_OPERAND_IMM4P4 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM4P4, (unsigned long *) (& fields->f_ivc2_4u4));
+      break;
+    case MEP_OPERAND_IMM4P8 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM4P8, (unsigned long *) (& fields->f_ivc2_4u8));
+      break;
+    case MEP_OPERAND_IMM5P23 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM5P23, (unsigned long *) (& fields->f_ivc2_5u23));
+      break;
+    case MEP_OPERAND_IMM5P3 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM5P3, (unsigned long *) (& fields->f_ivc2_5u3));
+      break;
+    case MEP_OPERAND_IMM5P7 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM5P7, (unsigned long *) (& fields->f_ivc2_5u7));
+      break;
+    case MEP_OPERAND_IMM5P8 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM5P8, (unsigned long *) (& fields->f_ivc2_5u8));
+      break;
+    case MEP_OPERAND_IMM6P2 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM6P2, (unsigned long *) (& fields->f_ivc2_6u2));
+      break;
+    case MEP_OPERAND_IMM6P6 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM6P6, (unsigned long *) (& fields->f_ivc2_6u6));
+      break;
+    case MEP_OPERAND_IMM8P0 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM8P0, (unsigned long *) (& fields->f_ivc2_8u0));
+      break;
+    case MEP_OPERAND_IMM8P20 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM8P20, (unsigned long *) (& fields->f_ivc2_8u20));
+      break;
+    case MEP_OPERAND_IMM8P4 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IMM8P4, (unsigned long *) (& fields->f_ivc2_8u4));
+      break;
+    case MEP_OPERAND_IVC_X_0_2 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IVC_X_0_2, (unsigned long *) (& fields->f_ivc2_2u0));
+      break;
+    case MEP_OPERAND_IVC_X_0_3 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IVC_X_0_3, (unsigned long *) (& fields->f_ivc2_3u0));
+      break;
+    case MEP_OPERAND_IVC_X_0_4 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IVC_X_0_4, (unsigned long *) (& fields->f_ivc2_4u0));
+      break;
+    case MEP_OPERAND_IVC_X_0_5 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IVC_X_0_5, (unsigned long *) (& fields->f_ivc2_5u0));
+      break;
+    case MEP_OPERAND_IVC_X_6_1 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IVC_X_6_1, (unsigned long *) (& fields->f_ivc2_1u6));
+      break;
+    case MEP_OPERAND_IVC_X_6_2 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IVC_X_6_2, (unsigned long *) (& fields->f_ivc2_2u6));
+      break;
+    case MEP_OPERAND_IVC_X_6_3 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IVC_X_6_3, (unsigned long *) (& fields->f_ivc2_3u6));
+      break;
+    case MEP_OPERAND_IVC2CCRN :
+      errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_ccr, & fields->f_ivc2_ccrn);
+      break;
+    case MEP_OPERAND_IVC2CRN :
+      errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_cr64, & fields->f_ivc2_crnx);
+      break;
+    case MEP_OPERAND_IVC2RM :
+      errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_gpr, & fields->f_ivc2_crm);
+      break;
     case MEP_OPERAND_LO :
       errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_csr, & junk);
       break;
@@ -972,12 +1100,21 @@ mep_cgen_parse_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_SIMM16 :
       errmsg = parse_signed16 (cd, strp, MEP_OPERAND_SIMM16, (long *) (& fields->f_16s16));
       break;
+    case MEP_OPERAND_SIMM16P0 :
+      errmsg = cgen_parse_signed_integer (cd, strp, MEP_OPERAND_SIMM16P0, (long *) (& fields->f_ivc2_simm16p0));
+      break;
     case MEP_OPERAND_SIMM6 :
       errmsg = cgen_parse_signed_integer (cd, strp, MEP_OPERAND_SIMM6, (long *) (& fields->f_6s8));
       break;
     case MEP_OPERAND_SIMM8 :
       errmsg = cgen_parse_signed_integer (cd, strp, MEP_OPERAND_SIMM8, (long *) (& fields->f_8s8));
       break;
+    case MEP_OPERAND_SIMM8P0 :
+      errmsg = cgen_parse_signed_integer (cd, strp, MEP_OPERAND_SIMM8P0, (long *) (& fields->f_ivc2_8s0));
+      break;
+    case MEP_OPERAND_SIMM8P4 :
+      errmsg = cgen_parse_signed_integer (cd, strp, MEP_OPERAND_SIMM8P4, (long *) (& fields->f_ivc2_8s4));
+      break;
     case MEP_OPERAND_SP :
       errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_gpr, & junk);
       break;

diff --git a/opcodes/mep-desc.c b/opcodes/mep-desc.c
index 9225cad..dc64c7a 100644 (file)
--- a/opcodes/mep-desc.c
+++ b/opcodes/mep-desc.c
@@ -57,6 +57,10 @@ static const CGEN_ATTR_ENTRY ISA_attr[] ATTRIBUTE_UNUSED =
 {
   { "mep", ISA_MEP },
   { "ext_core1", ISA_EXT_CORE1 },
+  { "ext_cop1_16", ISA_EXT_COP1_16 },
+  { "ext_cop1_32", ISA_EXT_COP1_32 },
+  { "ext_cop1_48", ISA_EXT_COP1_48 },
+  { "ext_cop1_64", ISA_EXT_COP1_64 },
   { "max", ISA_MAX },
   { 0, 0 }
 };
@@ -97,6 +101,16 @@ static const CGEN_ATTR_ENTRY CONFIG_attr[] ATTRIBUTE_UNUSED =
   { 0, 0 }
 };
 
+static const CGEN_ATTR_ENTRY SLOTS_attr[] ATTRIBUTE_UNUSED =
+{
+  { "core", SLOTS_CORE },
+  { "c3", SLOTS_C3 },
+  { "p0s", SLOTS_P0S },
+  { "p0", SLOTS_P0 },
+  { "p1", SLOTS_P1 },
+  { 0, 0 }
+};
+
 const CGEN_ATTR_TABLE mep_cgen_ifield_attr_table[] =
 {
   { "MACH", & MACH_attr[0], & MACH_attr[0] },
@@ -146,6 +160,7 @@ const CGEN_ATTR_TABLE mep_cgen_insn_attr_table[] =
   { "ISA", & ISA_attr[0], & ISA_attr[0] },
   { "LATENCY", & LATENCY_attr[0], & LATENCY_attr[0] },
   { "CONFIG", & CONFIG_attr[0], & CONFIG_attr[0] },
+  { "SLOTS", & SLOTS_attr[0], & SLOTS_attr[0] },
   { "ALIAS", &bool_attr[0], &bool_attr[0] },
   { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
   { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
@@ -186,6 +201,10 @@ const CGEN_ATTR_TABLE mep_cgen_insn_attr_table[] =
 static const CGEN_ISA mep_cgen_isa_table[] = {
   { "mep", 32, 32, 16, 32 },
   { "ext_core1", 32, 32, 16, 32 },
+  { "ext_cop1_16", 32, 32, 32, 32 },
+  { "ext_cop1_32", 32, 32, 32, 32 },
+  { "ext_cop1_48", 32, 32, 32, 32 },
+  { "ext_cop1_64", 32, 32, 32, 32 },
   { 0, 0, 0, 0, 0 }
 };
 
@@ -426,6 +445,64 @@ CGEN_KEYWORD mep_cgen_opval_h_ccr =
   0, 0, 0, 0, ""
 };
 
+static CGEN_KEYWORD_ENTRY mep_cgen_opval_h_cr_ivc2_entries[] =
+{
+  { "$c0", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "$c1", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "$c2", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "$c3", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "$c4", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "$c5", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "$c6", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "$c7", 7, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD mep_cgen_opval_h_cr_ivc2 =
+{
+  & mep_cgen_opval_h_cr_ivc2_entries[0],
+  8,
+  0, 0, 0, 0, ""
+};
+
+static CGEN_KEYWORD_ENTRY mep_cgen_opval_h_ccr_ivc2_entries[] =
+{
+  { "$ivc2_acc0_0", 16, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc0_1", 17, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc0_2", 18, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc0_3", 19, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc0_4", 20, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc0_5", 21, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc0_6", 22, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc0_7", 23, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc1_0", 24, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc1_1", 25, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc1_2", 26, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc1_3", 27, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc1_4", 28, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc1_5", 29, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc1_6", 30, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_acc1_7", 31, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_csar0", 0, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_csar1", 15, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_cc", 1, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_cofr0", 4, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_cofr1", 5, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_cofa0", 6, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_cofa1", 7, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_ccr2", 2, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_ccr3", 3, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_ccr12", 12, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_ccr13", 13, {0, {{{0, 0}}}}, 0, 0 },
+  { "$ivc2_ccr14", 14, {0, {{{0, 0}}}}, 0, 0 }
+};
+
+CGEN_KEYWORD mep_cgen_opval_h_ccr_ivc2 =
+{
+  & mep_cgen_opval_h_ccr_ivc2_entries[0],
+  28,
+  0, 0, 0, 0, ""
+};
+
 
 /* The hardware table.  */
 
@@ -437,17 +514,21 @@ CGEN_KEYWORD mep_cgen_opval_h_ccr =
 
 const CGEN_HW_ENTRY mep_cgen_hw_table[] =
 {
-  { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-gpr", HW_H_GPR, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_gpr, { 0|A(PROFILE)|A(CACHE_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-csr", HW_H_CSR, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_csr, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-cr64", HW_H_CR64, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_cr64, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-cr", HW_H_CR, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_cr, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
-  { "h-ccr", HW_H_CCR, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_ccr, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } } },
+  { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-gpr", HW_H_GPR, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_gpr, { 0|A(PROFILE)|A(CACHE_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-csr", HW_H_CSR, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_csr, { 0|A(PROFILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-cr64", HW_H_CR64, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_cr64, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-cr64-w", HW_H_CR64_W, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-cr", HW_H_CR, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_cr, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-ccr", HW_H_CCR, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_ccr, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-ccr-w", HW_H_CCR_W, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
+  { "h-cr-ivc2", HW_H_CR_IVC2, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_cr_ivc2, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } } },
+  { "h-ccr-ivc2", HW_H_CCR_IVC2, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_ccr_ivc2, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } } },
   { 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
 };
 
@@ -466,105 +547,157 @@ const CGEN_IFLD mep_cgen_ifld_table[] =
 {
   { MEP_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }  },
   { MEP_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } }  },
-  { MEP_F_MAJOR, "f-major", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_RN, "f-rn", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_RN3, "f-rn3", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_RM, "f-rm", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_RL, "f-rl", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_SUB2, "f-sub2", 0, 32, 14, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_SUB3, "f-sub3", 0, 32, 13, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_SUB4, "f-sub4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_EXT, "f-ext", 0, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_EXT4, "f-ext4", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_EXT62, "f-ext62", 0, 32, 20, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CRN, "f-crn", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CSRN_HI, "f-csrn-hi", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CSRN_LO, "f-csrn-lo", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CSRN, "f-csrn", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CRNX_HI, "f-crnx-hi", 0, 32, 28, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CRNX_LO, "f-crnx-lo", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CRNX, "f-crnx", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_0, "f-0", 0, 32, 0, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_1, "f-1", 0, 32, 1, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_2, "f-2", 0, 32, 2, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_3, "f-3", 0, 32, 3, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_4, "f-4", 0, 32, 4, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_5, "f-5", 0, 32, 5, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_6, "f-6", 0, 32, 6, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_7, "f-7", 0, 32, 7, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_8, "f-8", 0, 32, 8, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_9, "f-9", 0, 32, 9, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_10, "f-10", 0, 32, 10, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_11, "f-11", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_12, "f-12", 0, 32, 12, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_13, "f-13", 0, 32, 13, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_14, "f-14", 0, 32, 14, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_15, "f-15", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_16, "f-16", 0, 32, 16, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_17, "f-17", 0, 32, 17, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_18, "f-18", 0, 32, 18, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_19, "f-19", 0, 32, 19, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_20, "f-20", 0, 32, 20, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_21, "f-21", 0, 32, 21, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_22, "f-22", 0, 32, 22, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_23, "f-23", 0, 32, 23, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24, "f-24", 0, 32, 24, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_25, "f-25", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_26, "f-26", 0, 32, 26, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_27, "f-27", 0, 32, 27, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_28, "f-28", 0, 32, 28, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_29, "f-29", 0, 32, 29, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_30, "f-30", 0, 32, 30, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_31, "f-31", 0, 32, 31, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_8S8A2, "f-8s8a2", 0, 32, 8, 7, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_12S4A2, "f-12s4a2", 0, 32, 4, 11, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_17S16A2, "f-17s16a2", 0, 32, 16, 16, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24S5A2N_HI, "f-24s5a2n-hi", 0, 32, 16, 16, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24S5A2N_LO, "f-24s5a2n-lo", 0, 32, 5, 7, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24S5A2N, "f-24s5a2n", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U5A2N_HI, "f-24u5a2n-hi", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U5A2N_LO, "f-24u5a2n-lo", 0, 32, 5, 7, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U5A2N, "f-24u5a2n", 0, 0, 0, 0,{ 0|A(ABS_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_2U6, "f-2u6", 0, 32, 6, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_7U9, "f-7u9", 0, 32, 9, 7, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_7U9A2, "f-7u9a2", 0, 32, 9, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_7U9A4, "f-7u9a4", 0, 32, 9, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_16S16, "f-16s16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_2U10, "f-2u10", 0, 32, 10, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_3U5, "f-3u5", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_4U8, "f-4u8", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_5U8, "f-5u8", 0, 32, 8, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_5U24, "f-5u24", 0, 32, 24, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_6S8, "f-6s8", 0, 32, 8, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_8S8, "f-8s8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_16U16, "f-16u16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_12U16, "f-12u16", 0, 32, 16, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_3U29, "f-3u29", 0, 32, 29, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CDISP10, "f-cdisp10", 0, 32, 22, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U8A4N_HI, "f-24u8a4n-hi", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U8A4N_LO, "f-24u8a4n-lo", 0, 32, 8, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U8A4N, "f-24u8a4n", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U8N_HI, "f-24u8n-hi", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U8N_LO, "f-24u8n-lo", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U8N, "f-24u8n", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U4N_HI, "f-24u4n-hi", 0, 32, 4, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U4N_LO, "f-24u4n-lo", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_24U4N, "f-24u4n", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CALLNUM, "f-callnum", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CCRN_HI, "f-ccrn-hi", 0, 32, 28, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CCRN_LO, "f-ccrn-lo", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_CCRN, "f-ccrn", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_C5N4, "f-c5n4", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_C5N5, "f-c5n5", 0, 32, 20, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_C5N6, "f-c5n6", 0, 32, 24, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_C5N7, "f-c5n7", 0, 32, 28, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_RL5, "f-rl5", 0, 32, 20, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_12S20, "f-12s20", 0, 32, 20, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_C5_RNM, "f-c5-rnm", 0, 32, 4, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_C5_RM, "f-c5-rm", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_C5_16U16, "f-c5-16u16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_C5_RMUIMM20, "f-c5-rmuimm20", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
-  { MEP_F_C5_RNMUIMM24, "f-c5-rnmuimm24", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } } } }  },
+  { MEP_F_MAJOR, "f-major", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_RN, "f-rn", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_RN3, "f-rn3", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_RM, "f-rm", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_RL, "f-rl", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_SUB2, "f-sub2", 0, 32, 14, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_SUB3, "f-sub3", 0, 32, 13, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_SUB4, "f-sub4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_EXT, "f-ext", 0, 32, 16, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_EXT4, "f-ext4", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_EXT62, "f-ext62", 0, 32, 20, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CRN, "f-crn", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CSRN_HI, "f-csrn-hi", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CSRN_LO, "f-csrn-lo", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CSRN, "f-csrn", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CRNX_HI, "f-crnx-hi", 0, 32, 28, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CRNX_LO, "f-crnx-lo", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CRNX, "f-crnx", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_0, "f-0", 0, 32, 0, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_1, "f-1", 0, 32, 1, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_2, "f-2", 0, 32, 2, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_3, "f-3", 0, 32, 3, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_4, "f-4", 0, 32, 4, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_5, "f-5", 0, 32, 5, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_6, "f-6", 0, 32, 6, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_7, "f-7", 0, 32, 7, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_8, "f-8", 0, 32, 8, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_9, "f-9", 0, 32, 9, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_10, "f-10", 0, 32, 10, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_11, "f-11", 0, 32, 11, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_12, "f-12", 0, 32, 12, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_13, "f-13", 0, 32, 13, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_14, "f-14", 0, 32, 14, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_15, "f-15", 0, 32, 15, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_16, "f-16", 0, 32, 16, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_17, "f-17", 0, 32, 17, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_18, "f-18", 0, 32, 18, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_19, "f-19", 0, 32, 19, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_20, "f-20", 0, 32, 20, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_21, "f-21", 0, 32, 21, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_22, "f-22", 0, 32, 22, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_23, "f-23", 0, 32, 23, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_24, "f-24", 0, 32, 24, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_25, "f-25", 0, 32, 25, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_26, "f-26", 0, 32, 26, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_27, "f-27", 0, 32, 27, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_28, "f-28", 0, 32, 28, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_29, "f-29", 0, 32, 29, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_30, "f-30", 0, 32, 30, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_31, "f-31", 0, 32, 31, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_8S8A2, "f-8s8a2", 0, 32, 8, 7, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_12S4A2, "f-12s4a2", 0, 32, 4, 11, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_17S16A2, "f-17s16a2", 0, 32, 16, 16, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24S5A2N_HI, "f-24s5a2n-hi", 0, 32, 16, 16, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24S5A2N_LO, "f-24s5a2n-lo", 0, 32, 5, 7, { 0|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24S5A2N, "f-24s5a2n", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U5A2N_HI, "f-24u5a2n-hi", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U5A2N_LO, "f-24u5a2n-lo", 0, 32, 5, 7, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U5A2N, "f-24u5a2n", 0, 0, 0, 0,{ 0|A(ABS_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_2U6, "f-2u6", 0, 32, 6, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_7U9, "f-7u9", 0, 32, 9, 7, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_7U9A2, "f-7u9a2", 0, 32, 9, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_7U9A4, "f-7u9a4", 0, 32, 9, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_16S16, "f-16s16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_2U10, "f-2u10", 0, 32, 10, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_3U5, "f-3u5", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_4U8, "f-4u8", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_5U8, "f-5u8", 0, 32, 8, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_5U24, "f-5u24", 0, 32, 24, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_6S8, "f-6s8", 0, 32, 8, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_8S8, "f-8s8", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_16U16, "f-16u16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_12U16, "f-12u16", 0, 32, 16, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_3U29, "f-3u29", 0, 32, 29, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CDISP10, "f-cdisp10", 0, 32, 22, 10, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U8A4N_HI, "f-24u8a4n-hi", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U8A4N_LO, "f-24u8a4n-lo", 0, 32, 8, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U8A4N, "f-24u8a4n", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U8N_HI, "f-24u8n-hi", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U8N_LO, "f-24u8n-lo", 0, 32, 8, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U8N, "f-24u8n", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U4N_HI, "f-24u4n-hi", 0, 32, 4, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U4N_LO, "f-24u4n-lo", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_24U4N, "f-24u4n", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CALLNUM, "f-callnum", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CCRN_HI, "f-ccrn-hi", 0, 32, 28, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CCRN_LO, "f-ccrn-lo", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_CCRN, "f-ccrn", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_C5N4, "f-c5n4", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_C5N5, "f-c5n5", 0, 32, 20, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_C5N6, "f-c5n6", 0, 32, 24, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_C5N7, "f-c5n7", 0, 32, 28, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_RL5, "f-rl5", 0, 32, 20, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_12S20, "f-12s20", 0, 32, 20, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } }  },
+  { MEP_F_C5_RNM, "f-c5-rnm", 0, 32, 4, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_C5_RM, "f-c5-rm", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_C5_16U16, "f-c5-16u16", 0, 32, 16, 16, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_C5_RMUIMM20, "f-c5-rmuimm20", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_C5_RNMUIMM24, "f-c5-rnmuimm24", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_2U4, "f-ivc2-2u4", 0, 32, 4, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_3U4, "f-ivc2-3u4", 0, 32, 4, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_8U4, "f-ivc2-8u4", 0, 32, 4, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_8S4, "f-ivc2-8s4", 0, 32, 4, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_1U6, "f-ivc2-1u6", 0, 32, 6, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_2U6, "f-ivc2-2u6", 0, 32, 6, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_3U6, "f-ivc2-3u6", 0, 32, 6, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_6U6, "f-ivc2-6u6", 0, 32, 6, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U7, "f-ivc2-5u7", 0, 32, 7, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_4U8, "f-ivc2-4u8", 0, 32, 8, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_3U9, "f-ivc2-3u9", 0, 32, 9, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U16, "f-ivc2-5u16", 0, 32, 16, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U21, "f-ivc2-5u21", 0, 32, 21, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U26, "f-ivc2-5u26", 0, 32, 26, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_1U31, "f-ivc2-1u31", 0, 32, 31, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_4U16, "f-ivc2-4u16", 0, 32, 16, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_4U20, "f-ivc2-4u20", 0, 32, 20, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_4U24, "f-ivc2-4u24", 0, 32, 24, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_4U28, "f-ivc2-4u28", 0, 32, 28, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_2U0, "f-ivc2-2u0", 0, 32, 0, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_3U0, "f-ivc2-3u0", 0, 32, 0, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_4U0, "f-ivc2-4u0", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U0, "f-ivc2-5u0", 0, 32, 0, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_8U0, "f-ivc2-8u0", 0, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_8S0, "f-ivc2-8s0", 0, 32, 0, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_6U2, "f-ivc2-6u2", 0, 32, 2, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U3, "f-ivc2-5u3", 0, 32, 3, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_4U4, "f-ivc2-4u4", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_3U5, "f-ivc2-3u5", 0, 32, 5, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U8, "f-ivc2-5u8", 0, 32, 8, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_4U10, "f-ivc2-4u10", 0, 32, 10, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_3U12, "f-ivc2-3u12", 0, 32, 12, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U13, "f-ivc2-5u13", 0, 32, 13, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_2U18, "f-ivc2-2u18", 0, 32, 18, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U18, "f-ivc2-5u18", 0, 32, 18, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_8U20, "f-ivc2-8u20", 0, 32, 20, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_8S20, "f-ivc2-8s20", 0, 32, 20, 8, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_5U23, "f-ivc2-5u23", 0, 32, 23, 5, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_2U23, "f-ivc2-2u23", 0, 32, 23, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_3U25, "f-ivc2-3u25", 0, 32, 25, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_IMM16P0, "f-ivc2-imm16p0", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_SIMM16P0, "f-ivc2-simm16p0", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CRN, "f-ivc2-crn", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CRM, "f-ivc2-crm", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CCRN_H1, "f-ivc2-ccrn-h1", 0, 32, 20, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CCRN_H2, "f-ivc2-ccrn-h2", 0, 32, 20, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CCRN_LO, "f-ivc2-ccrn-lo", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CMOV1, "f-ivc2-cmov1", 0, 32, 8, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CMOV2, "f-ivc2-cmov2", 0, 32, 22, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CMOV3, "f-ivc2-cmov3", 0, 32, 28, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CCRN, "f-ivc2-ccrn", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
+  { MEP_F_IVC2_CRNX, "f-ivc2-crnx", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } }  },
   { 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
 };
 
@@ -585,6 +718,10 @@ const CGEN_MAYBE_MULTI_IFLD MEP_F_CALLNUM_MULTI_IFIELD [];
 const CGEN_MAYBE_MULTI_IFLD MEP_F_CCRN_MULTI_IFIELD [];
 const CGEN_MAYBE_MULTI_IFLD MEP_F_C5_RMUIMM20_MULTI_IFIELD [];
 const CGEN_MAYBE_MULTI_IFLD MEP_F_C5_RNMUIMM24_MULTI_IFIELD [];
+const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_IMM16P0_MULTI_IFIELD [];
+const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_SIMM16P0_MULTI_IFIELD [];
+const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CCRN_MULTI_IFIELD [];
+const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CRNX_MULTI_IFIELD [];
 
 
 /* multi ifield definitions */
@@ -657,6 +794,30 @@ const CGEN_MAYBE_MULTI_IFLD MEP_F_C5_RNMUIMM24_MULTI_IFIELD [] =
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_C5_16U16] } },
     { 0, { (const PTR) 0 } }
 };
+const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_IMM16P0_MULTI_IFIELD [] =
+{
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8U0] } },
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8U20] } },
+    { 0, { (const PTR) 0 } }
+};
+const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_SIMM16P0_MULTI_IFIELD [] =
+{
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8U0] } },
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8U20] } },
+    { 0, { (const PTR) 0 } }
+};
+const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CCRN_MULTI_IFIELD [] =
+{
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_CCRN_H2] } },
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_CCRN_LO] } },
+    { 0, { (const PTR) 0 } }
+};
+const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CRNX_MULTI_IFIELD [] =
+{
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_CCRN_H1] } },
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_CCRN_LO] } },
+    { 0, { (const PTR) 0 } }
+};
 
 /* The operand table.  */
 
@@ -680,331 +841,479 @@ const CGEN_OPERAND mep_cgen_operand_table[] =
 /* r0: register 0 */
   { "r0", MEP_OPERAND_R0, HW_H_GPR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rn: register Rn */
   { "rn", MEP_OPERAND_RN, HW_H_GPR, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rm: register Rm */
   { "rm", MEP_OPERAND_RM, HW_H_GPR, 8, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RM] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rl: register Rl */
   { "rl", MEP_OPERAND_RL, HW_H_GPR, 12, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RL] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rn3: register 0-7 */
   { "rn3", MEP_OPERAND_RN3, HW_H_GPR, 5, 3,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN3] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rma: register Rm holding pointer */
   { "rma", MEP_OPERAND_RMA, HW_H_GPR, 8, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RM] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_POINTER, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_POINTER, 0 } }, { { 1, 0 } } } }  },
 /* rnc: register Rn holding char */
   { "rnc", MEP_OPERAND_RNC, HW_H_GPR, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rnuc: register Rn holding unsigned char */
   { "rnuc", MEP_OPERAND_RNUC, HW_H_GPR, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rns: register Rn holding short */
   { "rns", MEP_OPERAND_RNS, HW_H_GPR, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rnus: register Rn holding unsigned short */
   { "rnus", MEP_OPERAND_RNUS, HW_H_GPR, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rnl: register Rn holding long */
   { "rnl", MEP_OPERAND_RNL, HW_H_GPR, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rnul: register Rn holding unsigned  long */
   { "rnul", MEP_OPERAND_RNUL, HW_H_GPR, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_ULONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_ULONG, 0 } }, { { 1, 0 } } } }  },
 /* rn3c: register 0-7 holding unsigned char */
   { "rn3c", MEP_OPERAND_RN3C, HW_H_GPR, 5, 3,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN3] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rn3uc: register 0-7 holding byte */
   { "rn3uc", MEP_OPERAND_RN3UC, HW_H_GPR, 5, 3,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN3] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rn3s: register 0-7 holding unsigned short */
   { "rn3s", MEP_OPERAND_RN3S, HW_H_GPR, 5, 3,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN3] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rn3us: register 0-7 holding short */
   { "rn3us", MEP_OPERAND_RN3US, HW_H_GPR, 5, 3,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN3] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rn3l: register 0-7 holding unsigned long */
   { "rn3l", MEP_OPERAND_RN3L, HW_H_GPR, 5, 3,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN3] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rn3ul: register 0-7 holding long */
   { "rn3ul", MEP_OPERAND_RN3UL, HW_H_GPR, 5, 3,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN3] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_ULONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_ULONG, 0 } }, { { 1, 0 } } } }  },
 /* lp: link pointer */
   { "lp", MEP_OPERAND_LP, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* sar: shift amount register */
   { "sar", MEP_OPERAND_SAR, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* hi: high result */
   { "hi", MEP_OPERAND_HI, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* lo: low result */
   { "lo", MEP_OPERAND_LO, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* mb0: modulo begin register 0 */
   { "mb0", MEP_OPERAND_MB0, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* me0: modulo end register 0 */
   { "me0", MEP_OPERAND_ME0, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* mb1: modulo begin register 1 */
   { "mb1", MEP_OPERAND_MB1, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* me1: modulo end register 1 */
   { "me1", MEP_OPERAND_ME1, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* psw: program status word */
   { "psw", MEP_OPERAND_PSW, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* epc: exception prog counter */
   { "epc", MEP_OPERAND_EPC, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* exc: exception cause */
   { "exc", MEP_OPERAND_EXC, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* npc: nmi program counter */
   { "npc", MEP_OPERAND_NPC, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* dbg: debug register */
   { "dbg", MEP_OPERAND_DBG, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* depc: debug exception pc */
   { "depc", MEP_OPERAND_DEPC, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* opt: option register */
   { "opt", MEP_OPERAND_OPT, HW_H_CSR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* r1: register 1 */
   { "r1", MEP_OPERAND_R1, HW_H_GPR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* tp: tiny data area pointer */
   { "tp", MEP_OPERAND_TP, HW_H_GPR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* sp: stack pointer */
   { "sp", MEP_OPERAND_SP, HW_H_GPR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* tpr: comment */
   { "tpr", MEP_OPERAND_TPR, HW_H_GPR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* spr: comment */
   { "spr", MEP_OPERAND_SPR, HW_H_GPR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* csrn: control/special register */
   { "csrn", MEP_OPERAND_CSRN, HW_H_CSR, 8, 5,
     { 2, { (const PTR) &MEP_F_CSRN_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_REGNUM, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_REGNUM, 0 } }, { { 1, 0 } } } }  },
 /* csrn-idx: control/special reg idx */
   { "csrn-idx", MEP_OPERAND_CSRN_IDX, HW_H_UINT, 8, 5,
     { 2, { (const PTR) &MEP_F_CSRN_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* crn64: copro Rn (64-bit) */
   { "crn64", MEP_OPERAND_CRN64, HW_H_CR64, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_CRN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_CP_DATA_BUS_INT, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_CP_DATA_BUS_INT, 0 } }, { { 1, 0 } } } }  },
 /* crn: copro Rn (32-bit) */
   { "crn", MEP_OPERAND_CRN, HW_H_CR, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_CRN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_CP_DATA_BUS_INT, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_CP_DATA_BUS_INT, 0 } }, { { 1, 0 } } } }  },
 /* crnx64: copro Rn (0-31, 64-bit) */
   { "crnx64", MEP_OPERAND_CRNX64, HW_H_CR64, 4, 5,
     { 2, { (const PTR) &MEP_F_CRNX_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_CP_DATA_BUS_INT, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_CP_DATA_BUS_INT, 0 } }, { { 1, 0 } } } }  },
 /* crnx: copro Rn (0-31, 32-bit) */
   { "crnx", MEP_OPERAND_CRNX, HW_H_CR, 4, 5,
     { 2, { (const PTR) &MEP_F_CRNX_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_CP_DATA_BUS_INT, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_CP_DATA_BUS_INT, 0 } }, { { 1, 0 } } } }  },
 /* ccrn: copro control reg CCRn */
   { "ccrn", MEP_OPERAND_CCRN, HW_H_CCR, 4, 6,
     { 2, { (const PTR) &MEP_F_CCRN_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_REGNUM, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_REGNUM, 0 } }, { { 1, 0 } } } }  },
 /* cccc: copro flags */
   { "cccc", MEP_OPERAND_CCCC, HW_H_UINT, 8, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RM] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* pcrel8a2: comment */
   { "pcrel8a2", MEP_OPERAND_PCREL8A2, HW_H_SINT, 8, 7,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_8S8A2] } }, 
-    { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
 /* pcrel12a2: comment */
   { "pcrel12a2", MEP_OPERAND_PCREL12A2, HW_H_SINT, 4, 11,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_12S4A2] } }, 
-    { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
 /* pcrel17a2: comment */
   { "pcrel17a2", MEP_OPERAND_PCREL17A2, HW_H_SINT, 16, 16,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_17S16A2] } }, 
-    { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(RELAX)|A(PCREL_ADDR), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
 /* pcrel24a2: comment */
   { "pcrel24a2", MEP_OPERAND_PCREL24A2, HW_H_SINT, 5, 23,
     { 2, { (const PTR) &MEP_F_24S5A2N_MULTI_IFIELD[0] } }, 
-    { 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(PCREL_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
 /* pcabs24a2: comment */
   { "pcabs24a2", MEP_OPERAND_PCABS24A2, HW_H_UINT, 5, 23,
     { 2, { (const PTR) &MEP_F_24U5A2N_MULTI_IFIELD[0] } }, 
-    { 0|A(ABS_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(ABS_ADDR)|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LABEL, 0 } }, { { 1, 0 } } } }  },
 /* sdisp16: comment */
   { "sdisp16", MEP_OPERAND_SDISP16, HW_H_SINT, 16, 16,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_16S16] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* simm16: comment */
   { "simm16", MEP_OPERAND_SIMM16, HW_H_SINT, 16, 16,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_16S16] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* uimm16: comment */
   { "uimm16", MEP_OPERAND_UIMM16, HW_H_UINT, 16, 16,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_16U16] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* code16: uci/dsp code (16 bits) */
   { "code16", MEP_OPERAND_CODE16, HW_H_UINT, 16, 16,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_16U16] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* udisp2: SSARB addend (2 bits) */
   { "udisp2", MEP_OPERAND_UDISP2, HW_H_SINT, 6, 2,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_2U6] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* uimm2: interrupt (2 bits) */
   { "uimm2", MEP_OPERAND_UIMM2, HW_H_UINT, 10, 2,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_2U10] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* simm6: add const (6 bits) */
   { "simm6", MEP_OPERAND_SIMM6, HW_H_SINT, 8, 6,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_6S8] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* simm8: mov const (8 bits) */
   { "simm8", MEP_OPERAND_SIMM8, HW_H_SINT, 8, 8,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_8S8] } }, 
-    { 0|A(RELOC_IMPLIES_OVERFLOW), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(RELOC_IMPLIES_OVERFLOW), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* addr24a4: comment */
   { "addr24a4", MEP_OPERAND_ADDR24A4, HW_H_UINT, 8, 22,
     { 2, { (const PTR) &MEP_F_24U8A4N_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 4, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 4, 0 } } } }  },
 /* code24: coprocessor code */
   { "code24", MEP_OPERAND_CODE24, HW_H_UINT, 4, 24,
     { 2, { (const PTR) &MEP_F_24U4N_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* callnum: system call number */
   { "callnum", MEP_OPERAND_CALLNUM, HW_H_UINT, 5, 4,
     { 4, { (const PTR) &MEP_F_CALLNUM_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* uimm3: bit immediate (3 bits) */
   { "uimm3", MEP_OPERAND_UIMM3, HW_H_UINT, 5, 3,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_3U5] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* uimm4: bCC const (4 bits) */
   { "uimm4", MEP_OPERAND_UIMM4, HW_H_UINT, 8, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_4U8] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* uimm5: bit/shift val (5 bits) */
   { "uimm5", MEP_OPERAND_UIMM5, HW_H_UINT, 8, 5,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_5U8] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* udisp7: comment */
   { "udisp7", MEP_OPERAND_UDISP7, HW_H_UINT, 9, 7,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_7U9] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* udisp7a2: comment */
   { "udisp7a2", MEP_OPERAND_UDISP7A2, HW_H_UINT, 9, 6,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_7U9A2] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 2, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 2, 0 } } } }  },
 /* udisp7a4: comment */
   { "udisp7a4", MEP_OPERAND_UDISP7A4, HW_H_UINT, 9, 5,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_7U9A4] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 4, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 4, 0 } } } }  },
 /* uimm7a4: comment */
   { "uimm7a4", MEP_OPERAND_UIMM7A4, HW_H_UINT, 9, 5,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_7U9A4] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 4, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 4, 0 } } } }  },
 /* uimm24: immediate (24 bits) */
   { "uimm24", MEP_OPERAND_UIMM24, HW_H_UINT, 8, 24,
     { 2, { (const PTR) &MEP_F_24U8N_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* cimm4: cache immed'te (4 bits) */
   { "cimm4", MEP_OPERAND_CIMM4, HW_H_UINT, 4, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RN] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* cimm5: clip immediate (5 bits) */
   { "cimm5", MEP_OPERAND_CIMM5, HW_H_UINT, 24, 5,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_5U24] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* cdisp10: comment */
   { "cdisp10", MEP_OPERAND_CDISP10, HW_H_SINT, 22, 10,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_CDISP10] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* cdisp10a2: comment */
   { "cdisp10a2", MEP_OPERAND_CDISP10A2, HW_H_SINT, 22, 10,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_CDISP10] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* cdisp10a4: comment */
   { "cdisp10a4", MEP_OPERAND_CDISP10A4, HW_H_SINT, 22, 10,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_CDISP10] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* cdisp10a8: comment */
   { "cdisp10a8", MEP_OPERAND_CDISP10A8, HW_H_SINT, 22, 10,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_CDISP10] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* zero: Zero operand */
   { "zero", MEP_OPERAND_ZERO, HW_H_SINT, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* rl5: register Rl c5 */
   { "rl5", MEP_OPERAND_RL5, HW_H_GPR, 20, 4,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_RL5] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* cdisp12: copro addend (12 bits) */
   { "cdisp12", MEP_OPERAND_CDISP12, HW_H_SINT, 20, 12,
     { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_12S20] } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* c5rmuimm20: 20-bit immediate in rm and imm16 */
   { "c5rmuimm20", MEP_OPERAND_C5RMUIMM20, HW_H_UINT, 8, 20,
     { 2, { (const PTR) &MEP_F_C5_RMUIMM20_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* c5rnmuimm24: 24-bit immediate in rn, rm, and imm16 */
   { "c5rnmuimm24", MEP_OPERAND_C5RNMUIMM24, HW_H_UINT, 4, 24,
     { 2, { (const PTR) &MEP_F_C5_RNMUIMM24_MULTI_IFIELD[0] } }, 
-    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
 /* cp_flag: branch condition register */
   { "cp_flag", MEP_OPERAND_CP_FLAG, HW_H_CCR, 0, 0,
     { 0, { (const PTR) 0 } }, 
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* croc: $CRo C3 */
+  { "croc", MEP_OPERAND_CROC, HW_H_CR64, 7, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U7] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* crqc: $CRq C3 */
+  { "crqc", MEP_OPERAND_CRQC, HW_H_CR64, 21, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U21] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* crpc: $CRp C3 */
+  { "crpc", MEP_OPERAND_CRPC, HW_H_CR64, 26, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U26] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* ivc-x-6-1: filler */
+  { "ivc-x-6-1", MEP_OPERAND_IVC_X_6_1, HW_H_UINT, 6, 1,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_1U6] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* ivc-x-6-2: filler */
+  { "ivc-x-6-2", MEP_OPERAND_IVC_X_6_2, HW_H_UINT, 6, 2,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_2U6] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* ivc-x-6-3: filler */
+  { "ivc-x-6-3", MEP_OPERAND_IVC_X_6_3, HW_H_UINT, 6, 3,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_3U6] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm3p4: Imm3p4 */
+  { "imm3p4", MEP_OPERAND_IMM3P4, HW_H_UINT, 4, 3,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_3U4] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm3p9: Imm3p9 */
+  { "imm3p9", MEP_OPERAND_IMM3P9, HW_H_UINT, 9, 3,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_3U9] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm4p8: Imm4p8 */
+  { "imm4p8", MEP_OPERAND_IMM4P8, HW_H_UINT, 8, 4,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_4U8] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm5p7: Imm5p7 */
+  { "imm5p7", MEP_OPERAND_IMM5P7, HW_H_UINT, 7, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U7] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm6p6: Imm6p6 */
+  { "imm6p6", MEP_OPERAND_IMM6P6, HW_H_UINT, 6, 6,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_6U6] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm8p4: Imm8p4 */
+  { "imm8p4", MEP_OPERAND_IMM8P4, HW_H_UINT, 4, 8,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8U4] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* simm8p4: sImm8p4 */
+  { "simm8p4", MEP_OPERAND_SIMM8P4, HW_H_SINT, 4, 8,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8S4] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm3p5: Imm3p5 */
+  { "imm3p5", MEP_OPERAND_IMM3P5, HW_H_UINT, 5, 3,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_3U5] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm3p12: Imm3p12 */
+  { "imm3p12", MEP_OPERAND_IMM3P12, HW_H_UINT, 12, 3,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_3U12] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm4p4: Imm4p4 */
+  { "imm4p4", MEP_OPERAND_IMM4P4, HW_H_UINT, 4, 4,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_4U4] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm4p10: Imm4p10 */
+  { "imm4p10", MEP_OPERAND_IMM4P10, HW_H_UINT, 10, 4,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_4U10] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm5p8: Imm5p8 */
+  { "imm5p8", MEP_OPERAND_IMM5P8, HW_H_UINT, 8, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U8] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm5p3: Imm5p3 */
+  { "imm5p3", MEP_OPERAND_IMM5P3, HW_H_UINT, 3, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U3] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm6p2: Imm6p2 */
+  { "imm6p2", MEP_OPERAND_IMM6P2, HW_H_UINT, 2, 6,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_6U2] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm5p23: Imm5p23 */
+  { "imm5p23", MEP_OPERAND_IMM5P23, HW_H_UINT, 23, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U23] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm3p25: Imm3p25 */
+  { "imm3p25", MEP_OPERAND_IMM3P25, HW_H_UINT, 25, 3,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_3U25] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm8p0: Imm8p0 */
+  { "imm8p0", MEP_OPERAND_IMM8P0, HW_H_UINT, 0, 8,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8U0] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* simm8p0: sImm8p0 */
+  { "simm8p0", MEP_OPERAND_SIMM8P0, HW_H_SINT, 0, 8,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8S0] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm8p20: Imm8p20 */
+  { "imm8p20", MEP_OPERAND_IMM8P20, HW_H_UINT, 20, 8,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8U20] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* crop: $CRo Pn */
+  { "crop", MEP_OPERAND_CROP, HW_H_CR64, 23, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U23] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* crqp: $CRq Pn */
+  { "crqp", MEP_OPERAND_CRQP, HW_H_CR64, 13, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U13] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* crpp: $CRp Pn */
+  { "crpp", MEP_OPERAND_CRPP, HW_H_CR64, 18, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U18] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* ivc-x-0-2: filler */
+  { "ivc-x-0-2", MEP_OPERAND_IVC_X_0_2, HW_H_UINT, 0, 2,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_2U0] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* ivc-x-0-3: filler */
+  { "ivc-x-0-3", MEP_OPERAND_IVC_X_0_3, HW_H_UINT, 0, 3,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_3U0] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* ivc-x-0-4: filler */
+  { "ivc-x-0-4", MEP_OPERAND_IVC_X_0_4, HW_H_UINT, 0, 4,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_4U0] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* ivc-x-0-5: filler */
+  { "ivc-x-0-5", MEP_OPERAND_IVC_X_0_5, HW_H_UINT, 0, 5,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_5U0] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* imm16p0: Imm16p0 */
+  { "imm16p0", MEP_OPERAND_IMM16P0, HW_H_UINT, 0, 16,
+    { 2, { (const PTR) &MEP_F_IVC2_IMM16P0_MULTI_IFIELD[0] } }, 
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* simm16p0: sImm16p0 */
+  { "simm16p0", MEP_OPERAND_SIMM16P0, HW_H_SINT, 0, 16,
+    { 2, { (const PTR) &MEP_F_IVC2_SIMM16P0_MULTI_IFIELD[0] } }, 
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_LONG, 0 } }, { { 1, 0 } } } }  },
+/* ivc2rm: reg Rm */
+  { "ivc2rm", MEP_OPERAND_IVC2RM, HW_H_GPR, 4, 4,
+    { 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_CRM] } }, 
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_REGNUM, 0 } }, { { 1, 0 } } } }  },
+/* ivc2crn: copro Rn (0-31, 64-bit */
+  { "ivc2crn", MEP_OPERAND_IVC2CRN, HW_H_CR64, 0, 5,
+    { 2, { (const PTR) &MEP_F_IVC2_CRNX_MULTI_IFIELD[0] } }, 
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_REGNUM, 0 } }, { { 1, 0 } } } }  },
+/* ivc2ccrn: copro control reg CCRn */
+  { "ivc2ccrn", MEP_OPERAND_IVC2CCRN, HW_H_CCR, 0, 6,
+    { 2, { (const PTR) &MEP_F_IVC2_CCRN_MULTI_IFIELD[0] } }, 
+    { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_REGNUM, 0 } }, { { 1, 0 } } } }  },
 /* sentinel */
   { 0, 0, 0, 0, 0,
     { 0, { (const PTR) 0 } },
@@ -1028,1131 +1337,4566 @@ static const CGEN_IBASE mep_cgen_insn_table[MAX_INSNS] =
   /* Special null first entry.
      A `num' value of zero is thus invalid.
      Also, the special `invalid' insn resides here.  */
-  { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } } },
+  { 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } } },
 /* stcb $rn,($rma) */
   {
     MEP_INSN_STCB_R, "stcb_r", "stcb", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ldcb $rn,($rma) */
   {
     MEP_INSN_LDCB_R, "ldcb_r", "ldcb", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* pref $cimm4,($rma) */
   {
     MEP_INSN_PREF, "pref", "pref", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* pref $cimm4,$sdisp16($rma) */
   {
     MEP_INSN_PREFD, "prefd", "pref", 32,
-    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* casb3 $rl5,$rn,($rm) */
   {
     MEP_INSN_CASB3, "casb3", "casb3", 32,
-    { 0|A(OPTIONAL_BIT_INSN)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_BIT_INSN)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* cash3 $rl5,$rn,($rm) */
   {
     MEP_INSN_CASH3, "cash3", "cash3", 32,
-    { 0|A(OPTIONAL_BIT_INSN)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_BIT_INSN)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* casw3 $rl5,$rn,($rm) */
   {
     MEP_INSN_CASW3, "casw3", "casw3", 32,
-    { 0|A(OPTIONAL_BIT_INSN)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_BIT_INSN)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sbcp $crn,$cdisp12($rma) */
   {
     MEP_INSN_SBCP, "sbcp", "sbcp", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbcp $crn,$cdisp12($rma) */
   {
     MEP_INSN_LBCP, "lbcp", "lbcp", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbucp $crn,$cdisp12($rma) */
   {
     MEP_INSN_LBUCP, "lbucp", "lbucp", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* shcp $crn,$cdisp12($rma) */
   {
     MEP_INSN_SHCP, "shcp", "shcp", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhcp $crn,$cdisp12($rma) */
   {
     MEP_INSN_LHCP, "lhcp", "lhcp", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhucp $crn,$cdisp12($rma) */
   {
     MEP_INSN_LHUCP, "lhucp", "lhucp", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbucpa $crn,($rma+),$cdisp10 */
   {
     MEP_INSN_LBUCPA, "lbucpa", "lbucpa", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhucpa $crn,($rma+),$cdisp10a2 */
   {
     MEP_INSN_LHUCPA, "lhucpa", "lhucpa", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbucpm0 $crn,($rma+),$cdisp10 */
   {
     MEP_INSN_LBUCPM0, "lbucpm0", "lbucpm0", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhucpm0 $crn,($rma+),$cdisp10a2 */
   {
     MEP_INSN_LHUCPM0, "lhucpm0", "lhucpm0", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbucpm1 $crn,($rma+),$cdisp10 */
   {
     MEP_INSN_LBUCPM1, "lbucpm1", "lbucpm1", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhucpm1 $crn,($rma+),$cdisp10a2 */
   {
     MEP_INSN_LHUCPM1, "lhucpm1", "lhucpm1", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* uci $rn,$rm,$uimm16 */
   {
     MEP_INSN_UCI, "uci", "uci", 32,
-    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* dsp $rn,$rm,$uimm16 */
   {
     MEP_INSN_DSP, "dsp", "dsp", 32,
-    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* dsp0 $c5rnmuimm24 */
   {
     -1, "dsp0", "dsp0", 32,
-    { 0|A(ALIAS)|A(NO_DIS)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(ALIAS)|A(NO_DIS)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* dsp1 $rn,$c5rmuimm20 */
   {
     -1, "dsp1", "dsp1", 32,
-    { 0|A(ALIAS)|A(NO_DIS)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(ALIAS)|A(NO_DIS)|A(VOLATILE), { { { (1<<MACH_C5), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sb $rnc,($rma) */
   {
     MEP_INSN_SB, "sb", "sb", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sh $rns,($rma) */
   {
     MEP_INSN_SH, "sh", "sh", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sw $rnl,($rma) */
   {
     MEP_INSN_SW, "sw", "sw", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lb $rnc,($rma) */
   {
     MEP_INSN_LB, "lb", "lb", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lh $rns,($rma) */
   {
     MEP_INSN_LH, "lh", "lh", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lw $rnl,($rma) */
   {
     MEP_INSN_LW, "lw", "lw", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbu $rnuc,($rma) */
   {
     MEP_INSN_LBU, "lbu", "lbu", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhu $rnus,($rma) */
   {
     MEP_INSN_LHU, "lhu", "lhu", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sw $rnl,$udisp7a4($spr) */
   {
     MEP_INSN_SW_SP, "sw-sp", "sw", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lw $rnl,$udisp7a4($spr) */
   {
     MEP_INSN_LW_SP, "lw-sp", "lw", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sb $rn3c,$udisp7($tpr) */
   {
     MEP_INSN_SB_TP, "sb-tp", "sb", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sh $rn3s,$udisp7a2($tpr) */
   {
     MEP_INSN_SH_TP, "sh-tp", "sh", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sw $rn3l,$udisp7a4($tpr) */
   {
     MEP_INSN_SW_TP, "sw-tp", "sw", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lb $rn3c,$udisp7($tpr) */
   {
     MEP_INSN_LB_TP, "lb-tp", "lb", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lh $rn3s,$udisp7a2($tpr) */
   {
     MEP_INSN_LH_TP, "lh-tp", "lh", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lw $rn3l,$udisp7a4($tpr) */
   {
     MEP_INSN_LW_TP, "lw-tp", "lw", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbu $rn3uc,$udisp7($tpr) */
   {
     MEP_INSN_LBU_TP, "lbu-tp", "lbu", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhu $rn3us,$udisp7a2($tpr) */
   {
     MEP_INSN_LHU_TP, "lhu-tp", "lhu", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sb $rnc,$sdisp16($rma) */
   {
     MEP_INSN_SB16, "sb16", "sb", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sh $rns,$sdisp16($rma) */
   {
     MEP_INSN_SH16, "sh16", "sh", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sw $rnl,$sdisp16($rma) */
   {
     MEP_INSN_SW16, "sw16", "sw", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lb $rnc,$sdisp16($rma) */
   {
     MEP_INSN_LB16, "lb16", "lb", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lh $rns,$sdisp16($rma) */
   {
     MEP_INSN_LH16, "lh16", "lh", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lw $rnl,$sdisp16($rma) */
   {
     MEP_INSN_LW16, "lw16", "lw", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbu $rnuc,$sdisp16($rma) */
   {
     MEP_INSN_LBU16, "lbu16", "lbu", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhu $rnus,$sdisp16($rma) */
   {
     MEP_INSN_LHU16, "lhu16", "lhu", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sw $rnl,($addr24a4) */
   {
     MEP_INSN_SW24, "sw24", "sw", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lw $rnl,($addr24a4) */
   {
     MEP_INSN_LW24, "lw24", "lw", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* extb $rn */
   {
     MEP_INSN_EXTB, "extb", "extb", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* exth $rn */
   {
     MEP_INSN_EXTH, "exth", "exth", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* extub $rn */
   {
     MEP_INSN_EXTUB, "extub", "extub", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* extuh $rn */
   {
     MEP_INSN_EXTUH, "extuh", "extuh", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ssarb $udisp2($rm) */
   {
     MEP_INSN_SSARB, "ssarb", "ssarb", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* mov $rn,$rm */
   {
     MEP_INSN_MOV, "mov", "mov", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* mov $rn,$simm8 */
   {
     MEP_INSN_MOVI8, "movi8", "mov", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* mov $rn,$simm16 */
   {
     MEP_INSN_MOVI16, "movi16", "mov", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* movu $rn3,$uimm24 */
   {
     MEP_INSN_MOVU24, "movu24", "movu", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* movu $rn,$uimm16 */
   {
     MEP_INSN_MOVU16, "movu16", "movu", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* movh $rn,$uimm16 */
   {
     MEP_INSN_MOVH, "movh", "movh", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* add3 $rl,$rn,$rm */
   {
     MEP_INSN_ADD3, "add3", "add3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* add $rn,$simm6 */
   {
     MEP_INSN_ADD, "add", "add", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* add3 $rn,$spr,$uimm7a4 */
   {
     MEP_INSN_ADD3I, "add3i", "add3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* advck3 \$0,$rn,$rm */
   {
     MEP_INSN_ADVCK3, "advck3", "advck3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sub $rn,$rm */
   {
     MEP_INSN_SUB, "sub", "sub", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sbvck3 \$0,$rn,$rm */
   {
     MEP_INSN_SBVCK3, "sbvck3", "sbvck3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* neg $rn,$rm */
   {
     MEP_INSN_NEG, "neg", "neg", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* slt3 \$0,$rn,$rm */
   {
     MEP_INSN_SLT3, "slt3", "slt3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sltu3 \$0,$rn,$rm */
   {
     MEP_INSN_SLTU3, "sltu3", "sltu3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* slt3 \$0,$rn,$uimm5 */
   {
     MEP_INSN_SLT3I, "slt3i", "slt3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sltu3 \$0,$rn,$uimm5 */
   {
     MEP_INSN_SLTU3I, "sltu3i", "sltu3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sl1ad3 \$0,$rn,$rm */
   {
     MEP_INSN_SL1AD3, "sl1ad3", "sl1ad3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sl2ad3 \$0,$rn,$rm */
   {
     MEP_INSN_SL2AD3, "sl2ad3", "sl2ad3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* add3 $rn,$rm,$simm16 */
   {
     MEP_INSN_ADD3X, "add3x", "add3", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* slt3 $rn,$rm,$simm16 */
   {
     MEP_INSN_SLT3X, "slt3x", "slt3", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sltu3 $rn,$rm,$uimm16 */
   {
     MEP_INSN_SLTU3X, "sltu3x", "sltu3", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* or $rn,$rm */
   {
     MEP_INSN_OR, "or", "or", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* and $rn,$rm */
   {
     MEP_INSN_AND, "and", "and", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* xor $rn,$rm */
   {
     MEP_INSN_XOR, "xor", "xor", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* nor $rn,$rm */
   {
     MEP_INSN_NOR, "nor", "nor", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* or3 $rn,$rm,$uimm16 */
   {
     MEP_INSN_OR3, "or3", "or3", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* and3 $rn,$rm,$uimm16 */
   {
     MEP_INSN_AND3, "and3", "and3", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* xor3 $rn,$rm,$uimm16 */
   {
     MEP_INSN_XOR3, "xor3", "xor3", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sra $rn,$rm */
   {
     MEP_INSN_SRA, "sra", "sra", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* srl $rn,$rm */
   {
     MEP_INSN_SRL, "srl", "srl", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sll $rn,$rm */
   {
     MEP_INSN_SLL, "sll", "sll", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sra $rn,$uimm5 */
   {
     MEP_INSN_SRAI, "srai", "sra", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* srl $rn,$uimm5 */
   {
     MEP_INSN_SRLI, "srli", "srl", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sll $rn,$uimm5 */
   {
     MEP_INSN_SLLI, "slli", "sll", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sll3 \$0,$rn,$uimm5 */
   {
     MEP_INSN_SLL3, "sll3", "sll3", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* fsft $rn,$rm */
   {
     MEP_INSN_FSFT, "fsft", "fsft", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bra $pcrel12a2 */
   {
     MEP_INSN_BRA, "bra", "bra", 16,
-    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* beqz $rn,$pcrel8a2 */
   {
     MEP_INSN_BEQZ, "beqz", "beqz", 16,
-    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bnez $rn,$pcrel8a2 */
   {
     MEP_INSN_BNEZ, "bnez", "bnez", 16,
-    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* beqi $rn,$uimm4,$pcrel17a2 */
   {
     MEP_INSN_BEQI, "beqi", "beqi", 32,
-    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bnei $rn,$uimm4,$pcrel17a2 */
   {
     MEP_INSN_BNEI, "bnei", "bnei", 32,
-    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* blti $rn,$uimm4,$pcrel17a2 */
   {
     MEP_INSN_BLTI, "blti", "blti", 32,
-    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bgei $rn,$uimm4,$pcrel17a2 */
   {
     MEP_INSN_BGEI, "bgei", "bgei", 32,
-    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* beq $rn,$rm,$pcrel17a2 */
   {
     MEP_INSN_BEQ, "beq", "beq", 32,
-    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bne $rn,$rm,$pcrel17a2 */
   {
     MEP_INSN_BNE, "bne", "bne", 32,
-    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bsr $pcrel12a2 */
   {
     MEP_INSN_BSR12, "bsr12", "bsr", 16,
-    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bsr $pcrel24a2 */
   {
     MEP_INSN_BSR24, "bsr24", "bsr", 32,
-    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* jmp $rm */
   {
     MEP_INSN_JMP, "jmp", "jmp", 16,
-    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* jmp $pcabs24a2 */
   {
     MEP_INSN_JMP24, "jmp24", "jmp", 32,
-    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* jsr $rm */
   {
     MEP_INSN_JSR, "jsr", "jsr", 16,
-    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ret */
   {
     MEP_INSN_RET, "ret", "ret", 16,
-    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* repeat $rn,$pcrel17a2 */
   {
     MEP_INSN_REPEAT, "repeat", "repeat", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* erepeat $pcrel17a2 */
   {
     MEP_INSN_EREPEAT, "erepeat", "erepeat", 32,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* stc $rn,\$lp */
   {
     MEP_INSN_STC_LP, "stc_lp", "stc", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* stc $rn,\$hi */
   {
     MEP_INSN_STC_HI, "stc_hi", "stc", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* stc $rn,\$lo */
   {
     MEP_INSN_STC_LO, "stc_lo", "stc", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* stc $rn,$csrn */
   {
     MEP_INSN_STC, "stc", "stc", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ldc $rn,\$lp */
   {
     MEP_INSN_LDC_LP, "ldc_lp", "ldc", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ldc $rn,\$hi */
   {
     MEP_INSN_LDC_HI, "ldc_hi", "ldc", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ldc $rn,\$lo */
   {
     MEP_INSN_LDC_LO, "ldc_lo", "ldc", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ldc $rn,$csrn */
   {
     MEP_INSN_LDC, "ldc", "ldc", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 2, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* di */
   {
     MEP_INSN_DI, "di", "di", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ei */
   {
     MEP_INSN_EI, "ei", "ei", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* reti */
   {
     MEP_INSN_RETI, "reti", "reti", 16,
-    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* halt */
   {
     MEP_INSN_HALT, "halt", "halt", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sleep */
   {
     MEP_INSN_SLEEP, "sleep", "sleep", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* swi $uimm2 */
   {
     MEP_INSN_SWI, "swi", "swi", 16,
-    { 0|A(VOLATILE)|A(MAY_TRAP), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE)|A(MAY_TRAP), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* break */
   {
     MEP_INSN_BREAK, "break", "break", 16,
-    { 0|A(VOLATILE)|A(MAY_TRAP)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE)|A(MAY_TRAP)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* syncm */
   {
     MEP_INSN_SYNCM, "syncm", "syncm", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* stcb $rn,$uimm16 */
   {
     MEP_INSN_STCB, "stcb", "stcb", 32,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ldcb $rn,$uimm16 */
   {
     MEP_INSN_LDCB, "ldcb", "ldcb", 32,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bsetm ($rma),$uimm3 */
   {
     MEP_INSN_BSETM, "bsetm", "bsetm", 16,
-    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bclrm ($rma),$uimm3 */
   {
     MEP_INSN_BCLRM, "bclrm", "bclrm", 16,
-    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bnotm ($rma),$uimm3 */
   {
     MEP_INSN_BNOTM, "bnotm", "bnotm", 16,
-    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* btstm \$0,($rma),$uimm3 */
   {
     MEP_INSN_BTSTM, "btstm", "btstm", 16,
-    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* tas $rn,($rma) */
   {
     MEP_INSN_TAS, "tas", "tas", 16,
-    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_BIT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* cache $cimm4,($rma) */
   {
     MEP_INSN_CACHE, "cache", "cache", 16,
-    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* mul $rn,$rm */
   {
     MEP_INSN_MUL, "mul", "mul", 16,
-    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* mulu $rn,$rm */
   {
     MEP_INSN_MULU, "mulu", "mulu", 16,
-    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* mulr $rn,$rm */
   {
     MEP_INSN_MULR, "mulr", "mulr", 16,
-    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* mulru $rn,$rm */
   {
     MEP_INSN_MULRU, "mulru", "mulru", 16,
-    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* madd $rn,$rm */
   {
     MEP_INSN_MADD, "madd", "madd", 32,
-    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* maddu $rn,$rm */
   {
     MEP_INSN_MADDU, "maddu", "maddu", 32,
-    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* maddr $rn,$rm */
   {
     MEP_INSN_MADDR, "maddr", "maddr", 32,
-    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* maddru $rn,$rm */
   {
     MEP_INSN_MADDRU, "maddru", "maddru", 32,
-    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MUL_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 3, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* div $rn,$rm */
   {
     MEP_INSN_DIV, "div", "div", 16,
-    { 0|A(MAY_TRAP)|A(OPTIONAL_DIV_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 34, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(MAY_TRAP)|A(OPTIONAL_DIV_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 34, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* divu $rn,$rm */
   {
     MEP_INSN_DIVU, "divu", "divu", 16,
-    { 0|A(MAY_TRAP)|A(OPTIONAL_DIV_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 34, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(MAY_TRAP)|A(OPTIONAL_DIV_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 34, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* dret */
   {
     MEP_INSN_DRET, "dret", "dret", 16,
-    { 0|A(OPTIONAL_DEBUG_INSN)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_DEBUG_INSN)|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* dbreak */
   {
     MEP_INSN_DBREAK, "dbreak", "dbreak", 16,
-    { 0|A(VOLATILE)|A(MAY_TRAP)|A(OPTIONAL_DEBUG_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(VOLATILE)|A(MAY_TRAP)|A(OPTIONAL_DEBUG_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ldz $rn,$rm */
   {
     MEP_INSN_LDZ, "ldz", "ldz", 32,
-    { 0|A(OPTIONAL_LDZ_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_LDZ_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* abs $rn,$rm */
   {
     MEP_INSN_ABS, "abs", "abs", 32,
-    { 0|A(OPTIONAL_ABS_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_ABS_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ave $rn,$rm */
   {
     MEP_INSN_AVE, "ave", "ave", 32,
-    { 0|A(OPTIONAL_AVE_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_AVE_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* min $rn,$rm */
   {
     MEP_INSN_MIN, "min", "min", 32,
-    { 0|A(OPTIONAL_MINMAX_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MINMAX_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* max $rn,$rm */
   {
     MEP_INSN_MAX, "max", "max", 32,
-    { 0|A(OPTIONAL_MINMAX_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MINMAX_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* minu $rn,$rm */
   {
     MEP_INSN_MINU, "minu", "minu", 32,
-    { 0|A(OPTIONAL_MINMAX_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MINMAX_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* maxu $rn,$rm */
   {
     MEP_INSN_MAXU, "maxu", "maxu", 32,
-    { 0|A(OPTIONAL_MINMAX_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_MINMAX_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* clip $rn,$cimm5 */
   {
     MEP_INSN_CLIP, "clip", "clip", 32,
-    { 0|A(OPTIONAL_CLIP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CLIP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* clipu $rn,$cimm5 */
   {
     MEP_INSN_CLIPU, "clipu", "clipu", 32,
-    { 0|A(OPTIONAL_CLIP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CLIP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sadd $rn,$rm */
   {
     MEP_INSN_SADD, "sadd", "sadd", 32,
-    { 0|A(OPTIONAL_SAT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_SAT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ssub $rn,$rm */
   {
     MEP_INSN_SSUB, "ssub", "ssub", 32,
-    { 0|A(OPTIONAL_SAT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_SAT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* saddu $rn,$rm */
   {
     MEP_INSN_SADDU, "saddu", "saddu", 32,
-    { 0|A(OPTIONAL_SAT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_SAT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* ssubu $rn,$rm */
   {
     MEP_INSN_SSUBU, "ssubu", "ssubu", 32,
-    { 0|A(OPTIONAL_SAT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_SAT_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* swcp $crn,($rma) */
   {
     MEP_INSN_SWCP, "swcp", "swcp", 16,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lwcp $crn,($rma) */
   {
     MEP_INSN_LWCP, "lwcp", "lwcp", 16,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* smcp $crn64,($rma) */
   {
     MEP_INSN_SMCP, "smcp", "smcp", 16,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lmcp $crn64,($rma) */
   {
     MEP_INSN_LMCP, "lmcp", "lmcp", 16,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* swcpi $crn,($rma+) */
   {
     MEP_INSN_SWCPI, "swcpi", "swcpi", 16,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lwcpi $crn,($rma+) */
   {
     MEP_INSN_LWCPI, "lwcpi", "lwcpi", 16,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* smcpi $crn64,($rma+) */
   {
     MEP_INSN_SMCPI, "smcpi", "smcpi", 16,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lmcpi $crn64,($rma+) */
   {
     MEP_INSN_LMCPI, "lmcpi", "lmcpi", 16,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* swcp $crn,$sdisp16($rma) */
   {
     MEP_INSN_SWCP16, "swcp16", "swcp", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lwcp $crn,$sdisp16($rma) */
   {
     MEP_INSN_LWCP16, "lwcp16", "lwcp", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* smcp $crn64,$sdisp16($rma) */
   {
     MEP_INSN_SMCP16, "smcp16", "smcp", 32,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lmcp $crn64,$sdisp16($rma) */
   {
     MEP_INSN_LMCP16, "lmcp16", "lmcp", 32,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sbcpa $crn,($rma+),$cdisp10 */
   {
     MEP_INSN_SBCPA, "sbcpa", "sbcpa", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbcpa $crn,($rma+),$cdisp10 */
   {
     MEP_INSN_LBCPA, "lbcpa", "lbcpa", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* shcpa $crn,($rma+),$cdisp10a2 */
   {
     MEP_INSN_SHCPA, "shcpa", "shcpa", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhcpa $crn,($rma+),$cdisp10a2 */
   {
     MEP_INSN_LHCPA, "lhcpa", "lhcpa", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* swcpa $crn,($rma+),$cdisp10a4 */
   {
     MEP_INSN_SWCPA, "swcpa", "swcpa", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lwcpa $crn,($rma+),$cdisp10a4 */
   {
     MEP_INSN_LWCPA, "lwcpa", "lwcpa", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* smcpa $crn64,($rma+),$cdisp10a8 */
   {
     MEP_INSN_SMCPA, "smcpa", "smcpa", 32,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lmcpa $crn64,($rma+),$cdisp10a8 */
   {
     MEP_INSN_LMCPA, "lmcpa", "lmcpa", 32,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sbcpm0 $crn,($rma+),$cdisp10 */
   {
     MEP_INSN_SBCPM0, "sbcpm0", "sbcpm0", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbcpm0 $crn,($rma+),$cdisp10 */
   {
     MEP_INSN_LBCPM0, "lbcpm0", "lbcpm0", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* shcpm0 $crn,($rma+),$cdisp10a2 */
   {
     MEP_INSN_SHCPM0, "shcpm0", "shcpm0", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhcpm0 $crn,($rma+),$cdisp10a2 */
   {
     MEP_INSN_LHCPM0, "lhcpm0", "lhcpm0", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* swcpm0 $crn,($rma+),$cdisp10a4 */
   {
     MEP_INSN_SWCPM0, "swcpm0", "swcpm0", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lwcpm0 $crn,($rma+),$cdisp10a4 */
   {
     MEP_INSN_LWCPM0, "lwcpm0", "lwcpm0", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* smcpm0 $crn64,($rma+),$cdisp10a8 */
   {
     MEP_INSN_SMCPM0, "smcpm0", "smcpm0", 32,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lmcpm0 $crn64,($rma+),$cdisp10a8 */
   {
     MEP_INSN_LMCPM0, "lmcpm0", "lmcpm0", 32,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sbcpm1 $crn,($rma+),$cdisp10 */
   {
     MEP_INSN_SBCPM1, "sbcpm1", "sbcpm1", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbcpm1 $crn,($rma+),$cdisp10 */
   {
     MEP_INSN_LBCPM1, "lbcpm1", "lbcpm1", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* shcpm1 $crn,($rma+),$cdisp10a2 */
   {
     MEP_INSN_SHCPM1, "shcpm1", "shcpm1", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhcpm1 $crn,($rma+),$cdisp10a2 */
   {
     MEP_INSN_LHCPM1, "lhcpm1", "lhcpm1", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* swcpm1 $crn,($rma+),$cdisp10a4 */
   {
     MEP_INSN_SWCPM1, "swcpm1", "swcpm1", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lwcpm1 $crn,($rma+),$cdisp10a4 */
   {
     MEP_INSN_LWCPM1, "lwcpm1", "lwcpm1", 32,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* smcpm1 $crn64,($rma+),$cdisp10a8 */
   {
     MEP_INSN_SMCPM1, "smcpm1", "smcpm1", 32,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lmcpm1 $crn64,($rma+),$cdisp10a8 */
   {
     MEP_INSN_LMCPM1, "lmcpm1", "lmcpm1", 32,
-    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bcpeq $cccc,$pcrel17a2 */
   {
     MEP_INSN_BCPEQ, "bcpeq", "bcpeq", 32,
-    { 0|A(RELAXABLE)|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bcpne $cccc,$pcrel17a2 */
   {
     MEP_INSN_BCPNE, "bcpne", "bcpne", 32,
-    { 0|A(RELAXABLE)|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bcpat $cccc,$pcrel17a2 */
   {
     MEP_INSN_BCPAT, "bcpat", "bcpat", 32,
-    { 0|A(RELAXABLE)|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bcpaf $cccc,$pcrel17a2 */
   {
     MEP_INSN_BCPAF, "bcpaf", "bcpaf", 32,
-    { 0|A(RELAXABLE)|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(RELAXABLE)|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* synccp */
   {
     MEP_INSN_SYNCCP, "synccp", "synccp", 16,
-    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* jsrv $rm */
   {
     MEP_INSN_JSRV, "jsrv", "jsrv", 16,
-    { 0|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* bsrv $pcrel24a2 */
   {
     MEP_INSN_BSRV, "bsrv", "bsrv", 32,
-    { 0|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(OPTIONAL_CP_INSN)|A(COND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
-/* --unused-- */
+/* --syscall-- */
   {
-    MEP_INSN_SIM_SYSCALL, "sim-syscall", "--unused--", 16,
-    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    MEP_INSN_SIM_SYSCALL, "sim-syscall", "--syscall--", 16,
+    { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_0, "ri-0", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_1, "ri-1", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_2, "ri-2", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_3, "ri-3", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_4, "ri-4", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_5, "ri-5", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_6, "ri-6", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_7, "ri-7", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_8, "ri-8", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_9, "ri-9", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_10, "ri-10", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_11, "ri-11", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_12, "ri-12", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_13, "ri-13", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_14, "ri-14", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_15, "ri-15", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_17, "ri-17", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_20, "ri-20", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_21, "ri-21", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_22, "ri-22", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_23, "ri-23", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* --reserved-- */
   {
     MEP_INSN_RI_26, "ri-26", "--reserved--", 16,
-    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(UNCOND_CTI), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
+  },
+/* cmov $crnx64,$rm */
+  {
+    MEP_INSN_CMOV_CRN_RM, "cmov-crn-rm", "cmov", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cmov $rm,$crnx64 */
+  {
+    MEP_INSN_CMOV_RN_CRM, "cmov-rn-crm", "cmov", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cmovc $ccrn,$rm */
+  {
+    MEP_INSN_CMOVC_CCRN_RM, "cmovc-ccrn-rm", "cmovc", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cmovc $rm,$ccrn */
+  {
+    MEP_INSN_CMOVC_RN_CCRM, "cmovc-rn-ccrm", "cmovc", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cmovh $crnx64,$rm */
+  {
+    MEP_INSN_CMOVH_CRN_RM, "cmovh-crn-rm", "cmovh", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cmovh $rm,$crnx64 */
+  {
+    MEP_INSN_CMOVH_RN_CRM, "cmovh-rn-crm", "cmovh", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cmov $ivc2crn,$ivc2rm */
+  {
+    MEP_INSN_CMOV_CRN_RM_P0, "cmov-crn-rm-p0", "cmov", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x8" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0), 0 } } } }
+  },
+/* cmov $ivc2rm,$ivc2crn */
+  {
+    MEP_INSN_CMOV_RN_CRM_P0, "cmov-rn-crm-p0", "cmov", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x8" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0), 0 } } } }
+  },
+/* cmovc $ivc2ccrn,$ivc2rm */
+  {
+    MEP_INSN_CMOVC_CCRN_RM_P0, "cmovc-ccrn-rm-p0", "cmovc", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x8" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0), 0 } } } }
+  },
+/* cmovc $ivc2rm,$ivc2ccrn */
+  {
+    MEP_INSN_CMOVC_RN_CCRM_P0, "cmovc-rn-ccrm-p0", "cmovc", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x8" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0), 0 } } } }
+  },
+/* cmovh $ivc2crn,$ivc2rm */
+  {
+    MEP_INSN_CMOVH_CRN_RM_P0, "cmovh-crn-rm-p0", "cmovh", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x8" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0), 0 } } } }
+  },
+/* cmovh $ivc2rm,$ivc2crn */
+  {
+    MEP_INSN_CMOVH_RN_CRM_P0, "cmovh-rn-crm-p0", "cmovh", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x8" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0), 0 } } } }
+  },
+/* cpadd3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPADD3_B_C3, "cpadd3_b_C3", "cpadd3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpadd3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPADD3_H_C3, "cpadd3_h_C3", "cpadd3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpadd3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPADD3_W_C3, "cpadd3_w_C3", "cpadd3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdadd3 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CDADD3_C3, "cdadd3_C3", "cdadd3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsub3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSUB3_B_C3, "cpsub3_b_C3", "cpsub3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsub3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSUB3_H_C3, "cpsub3_h_C3", "cpsub3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsub3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSUB3_W_C3, "cpsub3_w_C3", "cpsub3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdsub3 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CDSUB3_C3, "cdsub3_C3", "cdsub3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpand3 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPAND3_C3, "cpand3_C3", "cpand3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpor3 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPOR3_C3, "cpor3_C3", "cpor3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpnor3 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPNOR3_C3, "cpnor3_C3", "cpnor3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpxor3 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPXOR3_C3, "cpxor3_C3", "cpxor3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsel $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSEL_C3, "cpsel_C3", "cpsel", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpfsftbi $croc,$crqc,$crpc,$imm3p4 */
+  {
+    MEP_INSN_CPFSFTBI_C3, "cpfsftbi_C3", "cpfsftbi", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpfsftbs0 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPFSFTBS0_C3, "cpfsftbs0_C3", "cpfsftbs0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpfsftbs1 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPFSFTBS1_C3, "cpfsftbs1_C3", "cpfsftbs1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpunpacku.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPUNPACKU_B_C3, "cpunpacku_b_C3", "cpunpacku.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpunpacku.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPUNPACKU_H_C3, "cpunpacku_h_C3", "cpunpacku.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpunpacku.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPUNPACKU_W_C3, "cpunpacku_w_C3", "cpunpacku.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpunpackl.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPUNPACKL_B_C3, "cpunpackl_b_C3", "cpunpackl.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpunpackl.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPUNPACKL_H_C3, "cpunpackl_h_C3", "cpunpackl.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpunpackl.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPUNPACKL_W_C3, "cpunpackl_w_C3", "cpunpackl.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cppacku.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPPACKU_B_C3, "cppacku_b_C3", "cppacku.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cppack.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPPACK_B_C3, "cppack_b_C3", "cppack.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cppack.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPPACK_H_C3, "cppack_h_C3", "cppack.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrl3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSRL3_B_C3, "cpsrl3_b_C3", "cpsrl3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssrl3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSRL3_B_C3, "cpssrl3_b_C3", "cpssrl3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrl3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSRL3_H_C3, "cpsrl3_h_C3", "cpsrl3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssrl3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSRL3_H_C3, "cpssrl3_h_C3", "cpssrl3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrl3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSRL3_W_C3, "cpsrl3_w_C3", "cpsrl3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssrl3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSRL3_W_C3, "cpssrl3_w_C3", "cpssrl3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdsrl3 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CDSRL3_C3, "cdsrl3_C3", "cdsrl3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsra3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSRA3_B_C3, "cpsra3_b_C3", "cpsra3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssra3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSRA3_B_C3, "cpssra3_b_C3", "cpssra3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsra3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSRA3_H_C3, "cpsra3_h_C3", "cpsra3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssra3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSRA3_H_C3, "cpssra3_h_C3", "cpssra3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsra3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSRA3_W_C3, "cpsra3_w_C3", "cpsra3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssra3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSRA3_W_C3, "cpssra3_w_C3", "cpssra3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdsra3 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CDSRA3_C3, "cdsra3_C3", "cdsra3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsll3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSLL3_B_C3, "cpsll3_b_C3", "cpsll3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssll3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSLL3_B_C3, "cpssll3_b_C3", "cpssll3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsll3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSLL3_H_C3, "cpsll3_h_C3", "cpsll3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssll3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSLL3_H_C3, "cpssll3_h_C3", "cpssll3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsll3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSLL3_W_C3, "cpsll3_w_C3", "cpsll3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssll3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSLL3_W_C3, "cpssll3_w_C3", "cpssll3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdsll3 $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CDSLL3_C3, "cdsll3_C3", "cdsll3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsla3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSLA3_H_C3, "cpsla3_h_C3", "cpsla3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsla3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSLA3_W_C3, "cpsla3_w_C3", "cpsla3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsadd3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSADD3_H_C3, "cpsadd3_h_C3", "cpsadd3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsadd3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSADD3_W_C3, "cpsadd3_w_C3", "cpsadd3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssub3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSUB3_H_C3, "cpssub3_h_C3", "cpssub3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssub3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPSSUB3_W_C3, "cpssub3_w_C3", "cpssub3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextuaddu3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPEXTUADDU3_B_C3, "cpextuaddu3_b_C3", "cpextuaddu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextuadd3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPEXTUADD3_B_C3, "cpextuadd3_b_C3", "cpextuadd3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextladdu3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPEXTLADDU3_B_C3, "cpextladdu3_b_C3", "cpextladdu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextladd3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPEXTLADD3_B_C3, "cpextladd3_b_C3", "cpextladd3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextusubu3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPEXTUSUBU3_B_C3, "cpextusubu3_b_C3", "cpextusubu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextusub3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPEXTUSUB3_B_C3, "cpextusub3_b_C3", "cpextusub3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextlsubu3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPEXTLSUBU3_B_C3, "cpextlsubu3_b_C3", "cpextlsubu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextlsub3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPEXTLSUB3_B_C3, "cpextlsub3_b_C3", "cpextlsub3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaveu3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPAVEU3_B_C3, "cpaveu3_b_C3", "cpaveu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpave3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPAVE3_B_C3, "cpave3_b_C3", "cpave3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpave3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPAVE3_H_C3, "cpave3_h_C3", "cpave3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpave3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPAVE3_W_C3, "cpave3_w_C3", "cpave3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddsru3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPADDSRU3_B_C3, "cpaddsru3_b_C3", "cpaddsru3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddsr3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPADDSR3_B_C3, "cpaddsr3_b_C3", "cpaddsr3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddsr3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPADDSR3_H_C3, "cpaddsr3_h_C3", "cpaddsr3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddsr3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPADDSR3_W_C3, "cpaddsr3_w_C3", "cpaddsr3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabsu3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPABSU3_B_C3, "cpabsu3_b_C3", "cpabsu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabs3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPABS3_B_C3, "cpabs3_b_C3", "cpabs3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabs3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPABS3_H_C3, "cpabs3_h_C3", "cpabs3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmaxu3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMAXU3_B_C3, "cpmaxu3_b_C3", "cpmaxu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmax3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMAX3_B_C3, "cpmax3_b_C3", "cpmax3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmax3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMAX3_H_C3, "cpmax3_h_C3", "cpmax3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmaxu3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMAXU3_W_C3, "cpmaxu3_w_C3", "cpmaxu3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmax3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMAX3_W_C3, "cpmax3_w_C3", "cpmax3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpminu3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMINU3_B_C3, "cpminu3_b_C3", "cpminu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmin3.b $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMIN3_B_C3, "cpmin3_b_C3", "cpmin3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmin3.h $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMIN3_H_C3, "cpmin3_h_C3", "cpmin3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpminu3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMINU3_W_C3, "cpminu3_w_C3", "cpminu3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmin3.w $croc,$crqc,$crpc */
+  {
+    MEP_INSN_CPMIN3_W_C3, "cpmin3_w_C3", "cpmin3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovfrcsar0 $croc */
+  {
+    MEP_INSN_CPMOVFRCSAR0_C3, "cpmovfrcsar0_C3", "cpmovfrcsar0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovfrcsar1 $croc */
+  {
+    MEP_INSN_CPMOVFRCSAR1_C3, "cpmovfrcsar1_C3", "cpmovfrcsar1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovfrcc $croc */
+  {
+    MEP_INSN_CPMOVFRCC_C3, "cpmovfrcc_C3", "cpmovfrcc", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovtocsar0 $crqc */
+  {
+    MEP_INSN_CPMOVTOCSAR0_C3, "cpmovtocsar0_C3", "cpmovtocsar0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovtocsar1 $crqc */
+  {
+    MEP_INSN_CPMOVTOCSAR1_C3, "cpmovtocsar1_C3", "cpmovtocsar1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovtocc $crqc */
+  {
+    MEP_INSN_CPMOVTOCC_C3, "cpmovtocc_C3", "cpmovtocc", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmov $croc,$crqc */
+  {
+    MEP_INSN_CPMOV_C3, "cpmov_C3", "cpmov", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabsz.b $croc,$crqc */
+  {
+    MEP_INSN_CPABSZ_B_C3, "cpabsz_b_C3", "cpabsz.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabsz.h $croc,$crqc */
+  {
+    MEP_INSN_CPABSZ_H_C3, "cpabsz_h_C3", "cpabsz.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabsz.w $croc,$crqc */
+  {
+    MEP_INSN_CPABSZ_W_C3, "cpabsz_w_C3", "cpabsz.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpldz.h $croc,$crqc */
+  {
+    MEP_INSN_CPLDZ_H_C3, "cpldz_h_C3", "cpldz.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpldz.w $croc,$crqc */
+  {
+    MEP_INSN_CPLDZ_W_C3, "cpldz_w_C3", "cpldz.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpnorm.h $croc,$crqc */
+  {
+    MEP_INSN_CPNORM_H_C3, "cpnorm_h_C3", "cpnorm.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpnorm.w $croc,$crqc */
+  {
+    MEP_INSN_CPNORM_W_C3, "cpnorm_w_C3", "cpnorm.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cphaddu.b $croc,$crqc */
+  {
+    MEP_INSN_CPHADDU_B_C3, "cphaddu_b_C3", "cphaddu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cphadd.b $croc,$crqc */
+  {
+    MEP_INSN_CPHADD_B_C3, "cphadd_b_C3", "cphadd.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cphadd.h $croc,$crqc */
+  {
+    MEP_INSN_CPHADD_H_C3, "cphadd_h_C3", "cphadd.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cphadd.w $croc,$crqc */
+  {
+    MEP_INSN_CPHADD_W_C3, "cphadd_w_C3", "cphadd.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpccadd.b $crqc */
+  {
+    MEP_INSN_CPCCADD_B_C3, "cpccadd_b_C3", "cpccadd.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpbcast.b $croc,$crqc */
+  {
+    MEP_INSN_CPBCAST_B_C3, "cpbcast_b_C3", "cpbcast.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpbcast.h $croc,$crqc */
+  {
+    MEP_INSN_CPBCAST_H_C3, "cpbcast_h_C3", "cpbcast.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpbcast.w $croc,$crqc */
+  {
+    MEP_INSN_CPBCAST_W_C3, "cpbcast_w_C3", "cpbcast.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextuu.b $croc,$crqc */
+  {
+    MEP_INSN_CPEXTUU_B_C3, "cpextuu_b_C3", "cpextuu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextu.b $croc,$crqc */
+  {
+    MEP_INSN_CPEXTU_B_C3, "cpextu_b_C3", "cpextu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextuu.h $croc,$crqc */
+  {
+    MEP_INSN_CPEXTUU_H_C3, "cpextuu_h_C3", "cpextuu.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextu.h $croc,$crqc */
+  {
+    MEP_INSN_CPEXTU_H_C3, "cpextu_h_C3", "cpextu.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextlu.b $croc,$crqc */
+  {
+    MEP_INSN_CPEXTLU_B_C3, "cpextlu_b_C3", "cpextlu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextl.b $croc,$crqc */
+  {
+    MEP_INSN_CPEXTL_B_C3, "cpextl_b_C3", "cpextl.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextlu.h $croc,$crqc */
+  {
+    MEP_INSN_CPEXTLU_H_C3, "cpextlu_h_C3", "cpextlu.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpextl.h $croc,$crqc */
+  {
+    MEP_INSN_CPEXTL_H_C3, "cpextl_h_C3", "cpextl.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcastub.h $croc,$crqc */
+  {
+    MEP_INSN_CPCASTUB_H_C3, "cpcastub_h_C3", "cpcastub.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcastb.h $croc,$crqc */
+  {
+    MEP_INSN_CPCASTB_H_C3, "cpcastb_h_C3", "cpcastb.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcastub.w $croc,$crqc */
+  {
+    MEP_INSN_CPCASTUB_W_C3, "cpcastub_w_C3", "cpcastub.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcastb.w $croc,$crqc */
+  {
+    MEP_INSN_CPCASTB_W_C3, "cpcastb_w_C3", "cpcastb.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcastuh.w $croc,$crqc */
+  {
+    MEP_INSN_CPCASTUH_W_C3, "cpcastuh_w_C3", "cpcastuh.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcasth.w $croc,$crqc */
+  {
+    MEP_INSN_CPCASTH_W_C3, "cpcasth_w_C3", "cpcasth.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdcastuw $croc,$crqc */
+  {
+    MEP_INSN_CDCASTUW_C3, "cdcastuw_C3", "cdcastuw", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdcastw $croc,$crqc */
+  {
+    MEP_INSN_CDCASTW_C3, "cdcastw_C3", "cdcastw", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpeqz.b $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPEQZ_B_C3, "cpcmpeqz_b_C3", "cpcmpeqz.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpeq.b $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPEQ_B_C3, "cpcmpeq_b_C3", "cpcmpeq.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpeq.h $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPEQ_H_C3, "cpcmpeq_h_C3", "cpcmpeq.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpeq.w $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPEQ_W_C3, "cpcmpeq_w_C3", "cpcmpeq.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpne.b $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPNE_B_C3, "cpcmpne_b_C3", "cpcmpne.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpne.h $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPNE_H_C3, "cpcmpne_h_C3", "cpcmpne.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpne.w $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPNE_W_C3, "cpcmpne_w_C3", "cpcmpne.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpgtu.b $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGTU_B_C3, "cpcmpgtu_b_C3", "cpcmpgtu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpgt.b $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGT_B_C3, "cpcmpgt_b_C3", "cpcmpgt.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpgt.h $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGT_H_C3, "cpcmpgt_h_C3", "cpcmpgt.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpgtu.w $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGTU_W_C3, "cpcmpgtu_w_C3", "cpcmpgtu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpgt.w $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGT_W_C3, "cpcmpgt_w_C3", "cpcmpgt.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpgeu.b $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGEU_B_C3, "cpcmpgeu_b_C3", "cpcmpgeu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpge.b $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGE_B_C3, "cpcmpge_b_C3", "cpcmpge.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpge.h $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGE_H_C3, "cpcmpge_h_C3", "cpcmpge.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpgeu.w $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGEU_W_C3, "cpcmpgeu_w_C3", "cpcmpgeu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpcmpge.w $crqc,$crpc */
+  {
+    MEP_INSN_CPCMPGE_W_C3, "cpcmpge_w_C3", "cpcmpge.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpeq.b $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPEQ_B_C3, "cpacmpeq_b_C3", "cpacmpeq.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpeq.h $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPEQ_H_C3, "cpacmpeq_h_C3", "cpacmpeq.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpeq.w $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPEQ_W_C3, "cpacmpeq_w_C3", "cpacmpeq.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpne.b $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPNE_B_C3, "cpacmpne_b_C3", "cpacmpne.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpne.h $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPNE_H_C3, "cpacmpne_h_C3", "cpacmpne.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpne.w $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPNE_W_C3, "cpacmpne_w_C3", "cpacmpne.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpgtu.b $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGTU_B_C3, "cpacmpgtu_b_C3", "cpacmpgtu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpgt.b $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGT_B_C3, "cpacmpgt_b_C3", "cpacmpgt.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpgt.h $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGT_H_C3, "cpacmpgt_h_C3", "cpacmpgt.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpgtu.w $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGTU_W_C3, "cpacmpgtu_w_C3", "cpacmpgtu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpgt.w $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGT_W_C3, "cpacmpgt_w_C3", "cpacmpgt.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpgeu.b $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGEU_B_C3, "cpacmpgeu_b_C3", "cpacmpgeu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpge.b $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGE_B_C3, "cpacmpge_b_C3", "cpacmpge.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpge.h $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGE_H_C3, "cpacmpge_h_C3", "cpacmpge.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpgeu.w $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGEU_W_C3, "cpacmpgeu_w_C3", "cpacmpgeu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpacmpge.w $crqc,$crpc */
+  {
+    MEP_INSN_CPACMPGE_W_C3, "cpacmpge_w_C3", "cpacmpge.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpeq.b $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPEQ_B_C3, "cpocmpeq_b_C3", "cpocmpeq.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpeq.h $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPEQ_H_C3, "cpocmpeq_h_C3", "cpocmpeq.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpeq.w $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPEQ_W_C3, "cpocmpeq_w_C3", "cpocmpeq.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpne.b $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPNE_B_C3, "cpocmpne_b_C3", "cpocmpne.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpne.h $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPNE_H_C3, "cpocmpne_h_C3", "cpocmpne.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpne.w $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPNE_W_C3, "cpocmpne_w_C3", "cpocmpne.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpgtu.b $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGTU_B_C3, "cpocmpgtu_b_C3", "cpocmpgtu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpgt.b $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGT_B_C3, "cpocmpgt_b_C3", "cpocmpgt.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpgt.h $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGT_H_C3, "cpocmpgt_h_C3", "cpocmpgt.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpgtu.w $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGTU_W_C3, "cpocmpgtu_w_C3", "cpocmpgtu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpgt.w $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGT_W_C3, "cpocmpgt_w_C3", "cpocmpgt.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpgeu.b $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGEU_B_C3, "cpocmpgeu_b_C3", "cpocmpgeu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpge.b $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGE_B_C3, "cpocmpge_b_C3", "cpocmpge.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpge.h $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGE_H_C3, "cpocmpge_h_C3", "cpocmpge.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpgeu.w $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGEU_W_C3, "cpocmpgeu_w_C3", "cpocmpgeu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpocmpge.w $crqc,$crpc */
+  {
+    MEP_INSN_CPOCMPGE_W_C3, "cpocmpge_w_C3", "cpocmpge.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrli3.b $crqc,$crpc,$imm3p9 */
+  {
+    MEP_INSN_CPSRLI3_B_C3, "cpsrli3_b_C3", "cpsrli3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrli3.h $crqc,$crpc,$imm4p8 */
+  {
+    MEP_INSN_CPSRLI3_H_C3, "cpsrli3_h_C3", "cpsrli3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrli3.w $crqc,$crpc,$imm5p7 */
+  {
+    MEP_INSN_CPSRLI3_W_C3, "cpsrli3_w_C3", "cpsrli3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdsrli3 $crqc,$crpc,$imm6p6 */
+  {
+    MEP_INSN_CDSRLI3_C3, "cdsrli3_C3", "cdsrli3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrai3.b $crqc,$crpc,$imm3p9 */
+  {
+    MEP_INSN_CPSRAI3_B_C3, "cpsrai3_b_C3", "cpsrai3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrai3.h $crqc,$crpc,$imm4p8 */
+  {
+    MEP_INSN_CPSRAI3_H_C3, "cpsrai3_h_C3", "cpsrai3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrai3.w $crqc,$crpc,$imm5p7 */
+  {
+    MEP_INSN_CPSRAI3_W_C3, "cpsrai3_w_C3", "cpsrai3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdsrai3 $crqc,$crpc,$imm6p6 */
+  {
+    MEP_INSN_CDSRAI3_C3, "cdsrai3_C3", "cdsrai3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpslli3.b $crqc,$crpc,$imm3p9 */
+  {
+    MEP_INSN_CPSLLI3_B_C3, "cpslli3_b_C3", "cpslli3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpslli3.h $crqc,$crpc,$imm4p8 */
+  {
+    MEP_INSN_CPSLLI3_H_C3, "cpslli3_h_C3", "cpslli3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpslli3.w $crqc,$crpc,$imm5p7 */
+  {
+    MEP_INSN_CPSLLI3_W_C3, "cpslli3_w_C3", "cpslli3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdslli3 $crqc,$crpc,$imm6p6 */
+  {
+    MEP_INSN_CDSLLI3_C3, "cdslli3_C3", "cdslli3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpslai3.h $crqc,$crpc,$imm4p8 */
+  {
+    MEP_INSN_CPSLAI3_H_C3, "cpslai3_h_C3", "cpslai3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpslai3.w $crqc,$crpc,$imm5p7 */
+  {
+    MEP_INSN_CPSLAI3_W_C3, "cpslai3_w_C3", "cpslai3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpclipiu3.w $crqc,$crpc,$imm5p7 */
+  {
+    MEP_INSN_CPCLIPIU3_W_C3, "cpclipiu3_w_C3", "cpclipiu3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpclipi3.w $crqc,$crpc,$imm5p7 */
+  {
+    MEP_INSN_CPCLIPI3_W_C3, "cpclipi3_w_C3", "cpclipi3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdclipiu3 $crqc,$crpc,$imm6p6 */
+  {
+    MEP_INSN_CDCLIPIU3_C3, "cdclipiu3_C3", "cdclipiu3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdclipi3 $crqc,$crpc,$imm6p6 */
+  {
+    MEP_INSN_CDCLIPI3_C3, "cdclipi3_C3", "cdclipi3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovi.b $crqc,$simm8p4 */
+  {
+    MEP_INSN_CPMOVI_B_C3, "cpmovi_b_C3", "cpmovi.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmoviu.h $crqc,$imm8p4 */
+  {
+    MEP_INSN_CPMOVIU_H_C3, "cpmoviu_h_C3", "cpmoviu.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovi.h $crqc,$simm8p4 */
+  {
+    MEP_INSN_CPMOVI_H_C3, "cpmovi_h_C3", "cpmovi.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmoviu.w $crqc,$imm8p4 */
+  {
+    MEP_INSN_CPMOVIU_W_C3, "cpmoviu_w_C3", "cpmoviu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovi.w $crqc,$simm8p4 */
+  {
+    MEP_INSN_CPMOVI_W_C3, "cpmovi_w_C3", "cpmovi.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdmoviu $crqc,$imm8p4 */
+  {
+    MEP_INSN_CDMOVIU_C3, "cdmoviu_C3", "cdmoviu", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cdmovi $crqc,$simm8p4 */
+  {
+    MEP_INSN_CDMOVI_C3, "cdmovi_C3", "cdmovi", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpadda1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPADDA1U_B_C3, "cpadda1u_b_C3", "cpadda1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpadda1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPADDA1_B_C3, "cpadda1_b_C3", "cpadda1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPADDUA1_H_C3, "cpaddua1_h_C3", "cpaddua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPADDLA1_H_C3, "cpaddla1_h_C3", "cpaddla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddaca1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPADDACA1U_B_C3, "cpaddaca1u_b_C3", "cpaddaca1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddaca1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPADDACA1_B_C3, "cpaddaca1_b_C3", "cpaddaca1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddacua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPADDACUA1_H_C3, "cpaddacua1_h_C3", "cpaddacua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpaddacla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPADDACLA1_H_C3, "cpaddacla1_h_C3", "cpaddacla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsuba1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSUBA1U_B_C3, "cpsuba1u_b_C3", "cpsuba1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsuba1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSUBA1_B_C3, "cpsuba1_b_C3", "cpsuba1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsubua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSUBUA1_H_C3, "cpsubua1_h_C3", "cpsubua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsubla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSUBLA1_H_C3, "cpsubla1_h_C3", "cpsubla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsubaca1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSUBACA1U_B_C3, "cpsubaca1u_b_C3", "cpsubaca1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsubaca1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSUBACA1_B_C3, "cpsubaca1_b_C3", "cpsubaca1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsubacua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSUBACUA1_H_C3, "cpsubacua1_h_C3", "cpsubacua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsubacla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSUBACLA1_H_C3, "cpsubacla1_h_C3", "cpsubacla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabsa1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPABSA1U_B_C3, "cpabsa1u_b_C3", "cpabsa1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabsa1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPABSA1_B_C3, "cpabsa1_b_C3", "cpabsa1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabsua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPABSUA1_H_C3, "cpabsua1_h_C3", "cpabsua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpabsla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPABSLA1_H_C3, "cpabsla1_h_C3", "cpabsla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsada1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSADA1U_B_C3, "cpsada1u_b_C3", "cpsada1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsada1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSADA1_B_C3, "cpsada1_b_C3", "cpsada1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsadua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSADUA1_H_C3, "cpsadua1_h_C3", "cpsadua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsadla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSADLA1_H_C3, "cpsadla1_h_C3", "cpsadla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpseta1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSETA1_H_C3, "cpseta1_h_C3", "cpseta1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsetua1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSETUA1_W_C3, "cpsetua1_w_C3", "cpsetua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsetla1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSETLA1_W_C3, "cpsetla1_w_C3", "cpsetla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmova1.b $croc */
+  {
+    MEP_INSN_CPMOVA1_B_C3, "cpmova1_b_C3", "cpmova1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovua1.h $croc */
+  {
+    MEP_INSN_CPMOVUA1_H_C3, "cpmovua1_h_C3", "cpmovua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovla1.h $croc */
+  {
+    MEP_INSN_CPMOVLA1_H_C3, "cpmovla1_h_C3", "cpmovla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovuua1.w $croc */
+  {
+    MEP_INSN_CPMOVUUA1_W_C3, "cpmovuua1_w_C3", "cpmovuua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovula1.w $croc */
+  {
+    MEP_INSN_CPMOVULA1_W_C3, "cpmovula1_w_C3", "cpmovula1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovlua1.w $croc */
+  {
+    MEP_INSN_CPMOVLUA1_W_C3, "cpmovlua1_w_C3", "cpmovlua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovlla1.w $croc */
+  {
+    MEP_INSN_CPMOVLLA1_W_C3, "cpmovlla1_w_C3", "cpmovlla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cppacka1u.b $croc */
+  {
+    MEP_INSN_CPPACKA1U_B_C3, "cppacka1u_b_C3", "cppacka1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cppacka1.b $croc */
+  {
+    MEP_INSN_CPPACKA1_B_C3, "cppacka1_b_C3", "cppacka1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cppackua1.h $croc */
+  {
+    MEP_INSN_CPPACKUA1_H_C3, "cppackua1_h_C3", "cppackua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cppackla1.h $croc */
+  {
+    MEP_INSN_CPPACKLA1_H_C3, "cppackla1_h_C3", "cppackla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cppackua1.w $croc */
+  {
+    MEP_INSN_CPPACKUA1_W_C3, "cppackua1_w_C3", "cppackua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cppackla1.w $croc */
+  {
+    MEP_INSN_CPPACKLA1_W_C3, "cppackla1_w_C3", "cppackla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovhua1.w $croc */
+  {
+    MEP_INSN_CPMOVHUA1_W_C3, "cpmovhua1_w_C3", "cpmovhua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmovhla1.w $croc */
+  {
+    MEP_INSN_CPMOVHLA1_W_C3, "cpmovhla1_w_C3", "cpmovhla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrla1 $crqc */
+  {
+    MEP_INSN_CPSRLA1_C3, "cpsrla1_C3", "cpsrla1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsraa1 $crqc */
+  {
+    MEP_INSN_CPSRAA1_C3, "cpsraa1_C3", "cpsraa1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpslla1 $crqc */
+  {
+    MEP_INSN_CPSLLA1_C3, "cpslla1_C3", "cpslla1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsrlia1 $imm5p7 */
+  {
+    MEP_INSN_CPSRLIA1_P1, "cpsrlia1_P1", "cpsrlia1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsraia1 $imm5p7 */
+  {
+    MEP_INSN_CPSRAIA1_P1, "cpsraia1_P1", "cpsraia1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsllia1 $imm5p7 */
+  {
+    MEP_INSN_CPSLLIA1_P1, "cpsllia1_P1", "cpsllia1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssqa1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSSQA1U_B_C3, "cpssqa1u_b_C3", "cpssqa1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssqa1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSSQA1_B_C3, "cpssqa1_b_C3", "cpssqa1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssda1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSSDA1U_B_C3, "cpssda1u_b_C3", "cpssda1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpssda1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPSSDA1_B_C3, "cpssda1_b_C3", "cpssda1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmula1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPMULA1U_B_C3, "cpmula1u_b_C3", "cpmula1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmula1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPMULA1_B_C3, "cpmula1_b_C3", "cpmula1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPMULUA1_H_C3, "cpmulua1_h_C3", "cpmulua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPMULLA1_H_C3, "cpmulla1_h_C3", "cpmulla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulua1u.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMULUA1U_W_C3, "cpmulua1u_w_C3", "cpmulua1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulla1u.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMULLA1U_W_C3, "cpmulla1u_w_C3", "cpmulla1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulua1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMULUA1_W_C3, "cpmulua1_w_C3", "cpmulua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulla1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMULLA1_W_C3, "cpmulla1_w_C3", "cpmulla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmada1u.b $crqc,$crpc */
+  {
+    MEP_INSN_CPMADA1U_B_C3, "cpmada1u_b_C3", "cpmada1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmada1.b $crqc,$crpc */
+  {
+    MEP_INSN_CPMADA1_B_C3, "cpmada1_b_C3", "cpmada1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmadua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPMADUA1_H_C3, "cpmadua1_h_C3", "cpmadua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmadla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPMADLA1_H_C3, "cpmadla1_h_C3", "cpmadla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmadua1u.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMADUA1U_W_C3, "cpmadua1u_w_C3", "cpmadua1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmadla1u.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMADLA1U_W_C3, "cpmadla1u_w_C3", "cpmadla1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmadua1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMADUA1_W_C3, "cpmadua1_w_C3", "cpmadua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmadla1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMADLA1_W_C3, "cpmadla1_w_C3", "cpmadla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmsbua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPMSBUA1_H_C3, "cpmsbua1_h_C3", "cpmsbua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmsbla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPMSBLA1_H_C3, "cpmsbla1_h_C3", "cpmsbla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmsbua1u.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMSBUA1U_W_C3, "cpmsbua1u_w_C3", "cpmsbua1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmsbla1u.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMSBLA1U_W_C3, "cpmsbla1u_w_C3", "cpmsbla1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmsbua1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMSBUA1_W_C3, "cpmsbua1_w_C3", "cpmsbua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmsbla1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMSBLA1_W_C3, "cpmsbla1_w_C3", "cpmsbla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmadua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSMADUA1_H_C3, "cpsmadua1_h_C3", "cpsmadua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmadla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSMADLA1_H_C3, "cpsmadla1_h_C3", "cpsmadla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmadua1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSMADUA1_W_C3, "cpsmadua1_w_C3", "cpsmadua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmadla1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSMADLA1_W_C3, "cpsmadla1_w_C3", "cpsmadla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmsbua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSMSBUA1_H_C3, "cpsmsbua1_h_C3", "cpsmsbua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmsbla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSMSBLA1_H_C3, "cpsmsbla1_h_C3", "cpsmsbla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmsbua1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSMSBUA1_W_C3, "cpsmsbua1_w_C3", "cpsmsbua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmsbla1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSMSBLA1_W_C3, "cpsmsbla1_w_C3", "cpsmsbla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulslua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPMULSLUA1_H_C3, "cpmulslua1_h_C3", "cpmulslua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulslla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPMULSLLA1_H_C3, "cpmulslla1_h_C3", "cpmulslla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulslua1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMULSLUA1_W_C3, "cpmulslua1_w_C3", "cpmulslua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpmulslla1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPMULSLLA1_W_C3, "cpmulslla1_w_C3", "cpmulslla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmadslua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSMADSLUA1_H_C3, "cpsmadslua1_h_C3", "cpsmadslua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmadslla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSMADSLLA1_H_C3, "cpsmadslla1_h_C3", "cpsmadslla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmadslua1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSMADSLUA1_W_C3, "cpsmadslua1_w_C3", "cpsmadslua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmadslla1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSMADSLLA1_W_C3, "cpsmadslla1_w_C3", "cpsmadslla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmsbslua1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSMSBSLUA1_H_C3, "cpsmsbslua1_h_C3", "cpsmsbslua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmsbslla1.h $crqc,$crpc */
+  {
+    MEP_INSN_CPSMSBSLLA1_H_C3, "cpsmsbslla1_h_C3", "cpsmsbslla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmsbslua1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSMSBSLUA1_W_C3, "cpsmsbslua1_w_C3", "cpsmsbslua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* cpsmsbslla1.w $crqc,$crpc */
+  {
+    MEP_INSN_CPSMSBSLLA1_W_C3, "cpsmsbslla1_w_C3", "cpsmsbslla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x10" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_C3), 0 } } } }
+  },
+/* c0nop */
+  {
+    MEP_INSN_C0NOP_P0_P0S, "c0nop_P0_P0S", "c0nop", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x28" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpadd3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPADD3_B_P0S_P1, "cpadd3_b_P0S_P1", "cpadd3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpadd3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPADD3_H_P0S_P1, "cpadd3_h_P0S_P1", "cpadd3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpadd3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPADD3_W_P0S_P1, "cpadd3_w_P0S_P1", "cpadd3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpunpacku.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPUNPACKU_B_P0S_P1, "cpunpacku_b_P0S_P1", "cpunpacku.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpunpacku.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPUNPACKU_H_P0S_P1, "cpunpacku_h_P0S_P1", "cpunpacku.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpunpacku.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPUNPACKU_W_P0S_P1, "cpunpacku_w_P0S_P1", "cpunpacku.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpunpackl.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPUNPACKL_B_P0S_P1, "cpunpackl_b_P0S_P1", "cpunpackl.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpunpackl.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPUNPACKL_H_P0S_P1, "cpunpackl_h_P0S_P1", "cpunpackl.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpunpackl.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPUNPACKL_W_P0S_P1, "cpunpackl_w_P0S_P1", "cpunpackl.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsel $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSEL_P0S_P1, "cpsel_P0S_P1", "cpsel", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfsftbs0 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBS0_P0S_P1, "cpfsftbs0_P0S_P1", "cpfsftbs0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfsftbs1 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBS1_P0S_P1, "cpfsftbs1_P0S_P1", "cpfsftbs1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmov $crop,$crqp */
+  {
+    MEP_INSN_CPMOV_P0S_P1, "cpmov_P0S_P1", "cpmov", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabsz.b $crop,$crqp */
+  {
+    MEP_INSN_CPABSZ_B_P0S_P1, "cpabsz_b_P0S_P1", "cpabsz.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabsz.h $crop,$crqp */
+  {
+    MEP_INSN_CPABSZ_H_P0S_P1, "cpabsz_h_P0S_P1", "cpabsz.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabsz.w $crop,$crqp */
+  {
+    MEP_INSN_CPABSZ_W_P0S_P1, "cpabsz_w_P0S_P1", "cpabsz.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpldz.h $crop,$crqp */
+  {
+    MEP_INSN_CPLDZ_H_P0S_P1, "cpldz_h_P0S_P1", "cpldz.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpldz.w $crop,$crqp */
+  {
+    MEP_INSN_CPLDZ_W_P0S_P1, "cpldz_w_P0S_P1", "cpldz.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpnorm.h $crop,$crqp */
+  {
+    MEP_INSN_CPNORM_H_P0S_P1, "cpnorm_h_P0S_P1", "cpnorm.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpnorm.w $crop,$crqp */
+  {
+    MEP_INSN_CPNORM_W_P0S_P1, "cpnorm_w_P0S_P1", "cpnorm.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cphaddu.b $crop,$crqp */
+  {
+    MEP_INSN_CPHADDU_B_P0S_P1, "cphaddu_b_P0S_P1", "cphaddu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cphadd.b $crop,$crqp */
+  {
+    MEP_INSN_CPHADD_B_P0S_P1, "cphadd_b_P0S_P1", "cphadd.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cphadd.h $crop,$crqp */
+  {
+    MEP_INSN_CPHADD_H_P0S_P1, "cphadd_h_P0S_P1", "cphadd.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cphadd.w $crop,$crqp */
+  {
+    MEP_INSN_CPHADD_W_P0S_P1, "cphadd_w_P0S_P1", "cphadd.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpccadd.b $crqp */
+  {
+    MEP_INSN_CPCCADD_B_P0S_P1, "cpccadd_b_P0S_P1", "cpccadd.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpbcast.b $crop,$crqp */
+  {
+    MEP_INSN_CPBCAST_B_P0S_P1, "cpbcast_b_P0S_P1", "cpbcast.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpbcast.h $crop,$crqp */
+  {
+    MEP_INSN_CPBCAST_H_P0S_P1, "cpbcast_h_P0S_P1", "cpbcast.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpbcast.w $crop,$crqp */
+  {
+    MEP_INSN_CPBCAST_W_P0S_P1, "cpbcast_w_P0S_P1", "cpbcast.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextuu.b $crop,$crqp */
+  {
+    MEP_INSN_CPEXTUU_B_P0S_P1, "cpextuu_b_P0S_P1", "cpextuu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextu.b $crop,$crqp */
+  {
+    MEP_INSN_CPEXTU_B_P0S_P1, "cpextu_b_P0S_P1", "cpextu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextuu.h $crop,$crqp */
+  {
+    MEP_INSN_CPEXTUU_H_P0S_P1, "cpextuu_h_P0S_P1", "cpextuu.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextu.h $crop,$crqp */
+  {
+    MEP_INSN_CPEXTU_H_P0S_P1, "cpextu_h_P0S_P1", "cpextu.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextlu.b $crop,$crqp */
+  {
+    MEP_INSN_CPEXTLU_B_P0S_P1, "cpextlu_b_P0S_P1", "cpextlu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextl.b $crop,$crqp */
+  {
+    MEP_INSN_CPEXTL_B_P0S_P1, "cpextl_b_P0S_P1", "cpextl.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextlu.h $crop,$crqp */
+  {
+    MEP_INSN_CPEXTLU_H_P0S_P1, "cpextlu_h_P0S_P1", "cpextlu.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextl.h $crop,$crqp */
+  {
+    MEP_INSN_CPEXTL_H_P0S_P1, "cpextl_h_P0S_P1", "cpextl.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcastub.h $crop,$crqp */
+  {
+    MEP_INSN_CPCASTUB_H_P0S_P1, "cpcastub_h_P0S_P1", "cpcastub.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcastb.h $crop,$crqp */
+  {
+    MEP_INSN_CPCASTB_H_P0S_P1, "cpcastb_h_P0S_P1", "cpcastb.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcastub.w $crop,$crqp */
+  {
+    MEP_INSN_CPCASTUB_W_P0S_P1, "cpcastub_w_P0S_P1", "cpcastub.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcastb.w $crop,$crqp */
+  {
+    MEP_INSN_CPCASTB_W_P0S_P1, "cpcastb_w_P0S_P1", "cpcastb.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcastuh.w $crop,$crqp */
+  {
+    MEP_INSN_CPCASTUH_W_P0S_P1, "cpcastuh_w_P0S_P1", "cpcastuh.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcasth.w $crop,$crqp */
+  {
+    MEP_INSN_CPCASTH_W_P0S_P1, "cpcasth_w_P0S_P1", "cpcasth.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdcastuw $crop,$crqp */
+  {
+    MEP_INSN_CDCASTUW_P0S_P1, "cdcastuw_P0S_P1", "cdcastuw", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdcastw $crop,$crqp */
+  {
+    MEP_INSN_CDCASTW_P0S_P1, "cdcastw_P0S_P1", "cdcastw", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovfrcsar0 $crop */
+  {
+    MEP_INSN_CPMOVFRCSAR0_P0S_P1, "cpmovfrcsar0_P0S_P1", "cpmovfrcsar0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovfrcsar1 $crop */
+  {
+    MEP_INSN_CPMOVFRCSAR1_P0S_P1, "cpmovfrcsar1_P0S_P1", "cpmovfrcsar1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovfrcc $crop */
+  {
+    MEP_INSN_CPMOVFRCC_P0S_P1, "cpmovfrcc_P0S_P1", "cpmovfrcc", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovtocsar0 $crqp */
+  {
+    MEP_INSN_CPMOVTOCSAR0_P0S_P1, "cpmovtocsar0_P0S_P1", "cpmovtocsar0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovtocsar1 $crqp */
+  {
+    MEP_INSN_CPMOVTOCSAR1_P0S_P1, "cpmovtocsar1_P0S_P1", "cpmovtocsar1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovtocc $crqp */
+  {
+    MEP_INSN_CPMOVTOCC_P0S_P1, "cpmovtocc_P0S_P1", "cpmovtocc", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpeqz.b $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPEQZ_B_P0S_P1, "cpcmpeqz_b_P0S_P1", "cpcmpeqz.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpeq.b $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPEQ_B_P0S_P1, "cpcmpeq_b_P0S_P1", "cpcmpeq.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpeq.h $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPEQ_H_P0S_P1, "cpcmpeq_h_P0S_P1", "cpcmpeq.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpeq.w $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPEQ_W_P0S_P1, "cpcmpeq_w_P0S_P1", "cpcmpeq.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpne.b $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPNE_B_P0S_P1, "cpcmpne_b_P0S_P1", "cpcmpne.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpne.h $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPNE_H_P0S_P1, "cpcmpne_h_P0S_P1", "cpcmpne.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpne.w $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPNE_W_P0S_P1, "cpcmpne_w_P0S_P1", "cpcmpne.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpgtu.b $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGTU_B_P0S_P1, "cpcmpgtu_b_P0S_P1", "cpcmpgtu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpgt.b $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGT_B_P0S_P1, "cpcmpgt_b_P0S_P1", "cpcmpgt.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpgt.h $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGT_H_P0S_P1, "cpcmpgt_h_P0S_P1", "cpcmpgt.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpgtu.w $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGTU_W_P0S_P1, "cpcmpgtu_w_P0S_P1", "cpcmpgtu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpgt.w $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGT_W_P0S_P1, "cpcmpgt_w_P0S_P1", "cpcmpgt.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpgeu.b $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGEU_B_P0S_P1, "cpcmpgeu_b_P0S_P1", "cpcmpgeu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpge.b $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGE_B_P0S_P1, "cpcmpge_b_P0S_P1", "cpcmpge.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpge.h $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGE_H_P0S_P1, "cpcmpge_h_P0S_P1", "cpcmpge.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpgeu.w $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGEU_W_P0S_P1, "cpcmpgeu_w_P0S_P1", "cpcmpgeu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpcmpge.w $crqp,$crpp */
+  {
+    MEP_INSN_CPCMPGE_W_P0S_P1, "cpcmpge_w_P0S_P1", "cpcmpge.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x24" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpadda0u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPADDA0U_B_P0S, "cpadda0u_b_P0S", "cpadda0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpadda0.b $crqp,$crpp */
+  {
+    MEP_INSN_CPADDA0_B_P0S, "cpadda0_b_P0S", "cpadda0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpaddua0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPADDUA0_H_P0S, "cpaddua0_h_P0S", "cpaddua0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpaddla0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPADDLA0_H_P0S, "cpaddla0_h_P0S", "cpaddla0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpaddaca0u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPADDACA0U_B_P0S, "cpaddaca0u_b_P0S", "cpaddaca0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpaddaca0.b $crqp,$crpp */
+  {
+    MEP_INSN_CPADDACA0_B_P0S, "cpaddaca0_b_P0S", "cpaddaca0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpaddacua0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPADDACUA0_H_P0S, "cpaddacua0_h_P0S", "cpaddacua0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpaddacla0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPADDACLA0_H_P0S, "cpaddacla0_h_P0S", "cpaddacla0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsuba0u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBA0U_B_P0S, "cpsuba0u_b_P0S", "cpsuba0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsuba0.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBA0_B_P0S, "cpsuba0_b_P0S", "cpsuba0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsubua0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBUA0_H_P0S, "cpsubua0_h_P0S", "cpsubua0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsubla0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBLA0_H_P0S, "cpsubla0_h_P0S", "cpsubla0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsubaca0u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBACA0U_B_P0S, "cpsubaca0u_b_P0S", "cpsubaca0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsubaca0.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBACA0_B_P0S, "cpsubaca0_b_P0S", "cpsubaca0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsubacua0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBACUA0_H_P0S, "cpsubacua0_h_P0S", "cpsubacua0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsubacla0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBACLA0_H_P0S, "cpsubacla0_h_P0S", "cpsubacla0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpabsa0u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPABSA0U_B_P0S, "cpabsa0u_b_P0S", "cpabsa0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpabsa0.b $crqp,$crpp */
+  {
+    MEP_INSN_CPABSA0_B_P0S, "cpabsa0_b_P0S", "cpabsa0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpabsua0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPABSUA0_H_P0S, "cpabsua0_h_P0S", "cpabsua0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpabsla0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPABSLA0_H_P0S, "cpabsla0_h_P0S", "cpabsla0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsada0u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSADA0U_B_P0S, "cpsada0u_b_P0S", "cpsada0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsada0.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSADA0_B_P0S, "cpsada0_b_P0S", "cpsada0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsadua0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSADUA0_H_P0S, "cpsadua0_h_P0S", "cpsadua0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsadla0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSADLA0_H_P0S, "cpsadla0_h_P0S", "cpsadla0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpseta0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSETA0_H_P0S, "cpseta0_h_P0S", "cpseta0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsetua0.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSETUA0_W_P0S, "cpsetua0_w_P0S", "cpsetua0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsetla0.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSETLA0_W_P0S, "cpsetla0_w_P0S", "cpsetla0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpmova0.b $crop */
+  {
+    MEP_INSN_CPMOVA0_B_P0S, "cpmova0_b_P0S", "cpmova0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpmovua0.h $crop */
+  {
+    MEP_INSN_CPMOVUA0_H_P0S, "cpmovua0_h_P0S", "cpmovua0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpmovla0.h $crop */
+  {
+    MEP_INSN_CPMOVLA0_H_P0S, "cpmovla0_h_P0S", "cpmovla0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpmovuua0.w $crop */
+  {
+    MEP_INSN_CPMOVUUA0_W_P0S, "cpmovuua0_w_P0S", "cpmovuua0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpmovula0.w $crop */
+  {
+    MEP_INSN_CPMOVULA0_W_P0S, "cpmovula0_w_P0S", "cpmovula0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpmovlua0.w $crop */
+  {
+    MEP_INSN_CPMOVLUA0_W_P0S, "cpmovlua0_w_P0S", "cpmovlua0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpmovlla0.w $crop */
+  {
+    MEP_INSN_CPMOVLLA0_W_P0S, "cpmovlla0_w_P0S", "cpmovlla0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cppacka0u.b $crop */
+  {
+    MEP_INSN_CPPACKA0U_B_P0S, "cppacka0u_b_P0S", "cppacka0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cppacka0.b $crop */
+  {
+    MEP_INSN_CPPACKA0_B_P0S, "cppacka0_b_P0S", "cppacka0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cppackua0.h $crop */
+  {
+    MEP_INSN_CPPACKUA0_H_P0S, "cppackua0_h_P0S", "cppackua0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cppackla0.h $crop */
+  {
+    MEP_INSN_CPPACKLA0_H_P0S, "cppackla0_h_P0S", "cppackla0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cppackua0.w $crop */
+  {
+    MEP_INSN_CPPACKUA0_W_P0S, "cppackua0_w_P0S", "cppackua0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cppackla0.w $crop */
+  {
+    MEP_INSN_CPPACKLA0_W_P0S, "cppackla0_w_P0S", "cppackla0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpmovhua0.w $crop */
+  {
+    MEP_INSN_CPMOVHUA0_W_P0S, "cpmovhua0_w_P0S", "cpmovhua0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpmovhla0.w $crop */
+  {
+    MEP_INSN_CPMOVHLA0_W_P0S, "cpmovhla0_w_P0S", "cpmovhla0.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpacsuma0 */
+  {
+    MEP_INSN_CPACSUMA0_P0S, "cpacsuma0_P0S", "cpacsuma0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpaccpa0 */
+  {
+    MEP_INSN_CPACCPA0_P0S, "cpaccpa0_P0S", "cpaccpa0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsrla0 $crqp */
+  {
+    MEP_INSN_CPSRLA0_P0S, "cpsrla0_P0S", "cpsrla0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsraa0 $crqp */
+  {
+    MEP_INSN_CPSRAA0_P0S, "cpsraa0_P0S", "cpsraa0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpslla0 $crqp */
+  {
+    MEP_INSN_CPSLLA0_P0S, "cpslla0_P0S", "cpslla0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsrlia0 $imm5p23 */
+  {
+    MEP_INSN_CPSRLIA0_P0S, "cpsrlia0_P0S", "cpsrlia0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsraia0 $imm5p23 */
+  {
+    MEP_INSN_CPSRAIA0_P0S, "cpsraia0_P0S", "cpsraia0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpsllia0 $imm5p23 */
+  {
+    MEP_INSN_CPSLLIA0_P0S, "cpsllia0_P0S", "cpsllia0", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfsftba0s0u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBA0S0U_B_P0S, "cpfsftba0s0u_b_P0S", "cpfsftba0s0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfsftba0s0.b $crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBA0S0_B_P0S, "cpfsftba0s0_b_P0S", "cpfsftba0s0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfsftbua0s0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBUA0S0_H_P0S, "cpfsftbua0s0_h_P0S", "cpfsftbua0s0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfsftbla0s0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBLA0S0_H_P0S, "cpfsftbla0s0_h_P0S", "cpfsftbla0s0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfaca0s0u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPFACA0S0U_B_P0S, "cpfaca0s0u_b_P0S", "cpfaca0s0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfaca0s0.b $crqp,$crpp */
+  {
+    MEP_INSN_CPFACA0S0_B_P0S, "cpfaca0s0_b_P0S", "cpfaca0s0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfacua0s0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPFACUA0S0_H_P0S, "cpfacua0s0_h_P0S", "cpfacua0s0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfacla0s0.h $crqp,$crpp */
+  {
+    MEP_INSN_CPFACLA0S0_H_P0S, "cpfacla0s0_h_P0S", "cpfacla0s0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfsftba0s1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBA0S1U_B_P0S, "cpfsftba0s1u_b_P0S", "cpfsftba0s1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfsftba0s1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBA0S1_B_P0S, "cpfsftba0s1_b_P0S", "cpfsftba0s1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfsftbua0s1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBUA0S1_H_P0S, "cpfsftbua0s1_h_P0S", "cpfsftbua0s1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfsftbla0s1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPFSFTBLA0S1_H_P0S, "cpfsftbla0s1_h_P0S", "cpfsftbla0s1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfaca0s1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPFACA0S1U_B_P0S, "cpfaca0s1u_b_P0S", "cpfaca0s1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfaca0s1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPFACA0S1_B_P0S, "cpfaca0s1_b_P0S", "cpfaca0s1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfacua0s1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPFACUA0S1_H_P0S, "cpfacua0s1_h_P0S", "cpfacua0s1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfacla0s1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPFACLA0S1_H_P0S, "cpfacla0s1_h_P0S", "cpfacla0s1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x20" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0S), 0 } } } }
+  },
+/* cpfsftbi $crop,$crqp,$crpp,$imm3p5 */
+  {
+    MEP_INSN_CPFSFTBI_P0_P1, "cpfsftbi_P0_P1", "cpfsftbi", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpeq.b $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPEQ_B_P0_P1, "cpacmpeq_b_P0_P1", "cpacmpeq.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpeq.h $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPEQ_H_P0_P1, "cpacmpeq_h_P0_P1", "cpacmpeq.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpeq.w $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPEQ_W_P0_P1, "cpacmpeq_w_P0_P1", "cpacmpeq.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpne.b $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPNE_B_P0_P1, "cpacmpne_b_P0_P1", "cpacmpne.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpne.h $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPNE_H_P0_P1, "cpacmpne_h_P0_P1", "cpacmpne.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpne.w $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPNE_W_P0_P1, "cpacmpne_w_P0_P1", "cpacmpne.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpgtu.b $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGTU_B_P0_P1, "cpacmpgtu_b_P0_P1", "cpacmpgtu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpgt.b $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGT_B_P0_P1, "cpacmpgt_b_P0_P1", "cpacmpgt.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpgt.h $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGT_H_P0_P1, "cpacmpgt_h_P0_P1", "cpacmpgt.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpgtu.w $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGTU_W_P0_P1, "cpacmpgtu_w_P0_P1", "cpacmpgtu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpgt.w $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGT_W_P0_P1, "cpacmpgt_w_P0_P1", "cpacmpgt.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpgeu.b $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGEU_B_P0_P1, "cpacmpgeu_b_P0_P1", "cpacmpgeu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpge.b $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGE_B_P0_P1, "cpacmpge_b_P0_P1", "cpacmpge.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpge.h $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGE_H_P0_P1, "cpacmpge_h_P0_P1", "cpacmpge.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpgeu.w $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGEU_W_P0_P1, "cpacmpgeu_w_P0_P1", "cpacmpgeu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacmpge.w $crqp,$crpp */
+  {
+    MEP_INSN_CPACMPGE_W_P0_P1, "cpacmpge_w_P0_P1", "cpacmpge.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpeq.b $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPEQ_B_P0_P1, "cpocmpeq_b_P0_P1", "cpocmpeq.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpeq.h $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPEQ_H_P0_P1, "cpocmpeq_h_P0_P1", "cpocmpeq.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpeq.w $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPEQ_W_P0_P1, "cpocmpeq_w_P0_P1", "cpocmpeq.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpne.b $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPNE_B_P0_P1, "cpocmpne_b_P0_P1", "cpocmpne.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpne.h $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPNE_H_P0_P1, "cpocmpne_h_P0_P1", "cpocmpne.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpne.w $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPNE_W_P0_P1, "cpocmpne_w_P0_P1", "cpocmpne.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpgtu.b $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGTU_B_P0_P1, "cpocmpgtu_b_P0_P1", "cpocmpgtu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpgt.b $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGT_B_P0_P1, "cpocmpgt_b_P0_P1", "cpocmpgt.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpgt.h $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGT_H_P0_P1, "cpocmpgt_h_P0_P1", "cpocmpgt.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpgtu.w $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGTU_W_P0_P1, "cpocmpgtu_w_P0_P1", "cpocmpgtu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpgt.w $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGT_W_P0_P1, "cpocmpgt_w_P0_P1", "cpocmpgt.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpgeu.b $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGEU_B_P0_P1, "cpocmpgeu_b_P0_P1", "cpocmpgeu.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpge.b $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGE_B_P0_P1, "cpocmpge_b_P0_P1", "cpocmpge.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpge.h $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGE_H_P0_P1, "cpocmpge_h_P0_P1", "cpocmpge.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpgeu.w $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGEU_W_P0_P1, "cpocmpgeu_w_P0_P1", "cpocmpgeu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpocmpge.w $crqp,$crpp */
+  {
+    MEP_INSN_CPOCMPGE_W_P0_P1, "cpocmpge_w_P0_P1", "cpocmpge.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdadd3 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CDADD3_P0_P1, "cdadd3_P0_P1", "cdadd3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsub3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSUB3_B_P0_P1, "cpsub3_b_P0_P1", "cpsub3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsub3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSUB3_H_P0_P1, "cpsub3_h_P0_P1", "cpsub3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsub3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSUB3_W_P0_P1, "cpsub3_w_P0_P1", "cpsub3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdsub3 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CDSUB3_P0_P1, "cdsub3_P0_P1", "cdsub3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsadd3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSADD3_H_P0_P1, "cpsadd3_h_P0_P1", "cpsadd3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsadd3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSADD3_W_P0_P1, "cpsadd3_w_P0_P1", "cpsadd3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssub3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSUB3_H_P0_P1, "cpssub3_h_P0_P1", "cpssub3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssub3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSUB3_W_P0_P1, "cpssub3_w_P0_P1", "cpssub3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextuaddu3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPEXTUADDU3_B_P0_P1, "cpextuaddu3_b_P0_P1", "cpextuaddu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextuadd3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPEXTUADD3_B_P0_P1, "cpextuadd3_b_P0_P1", "cpextuadd3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextladdu3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPEXTLADDU3_B_P0_P1, "cpextladdu3_b_P0_P1", "cpextladdu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextladd3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPEXTLADD3_B_P0_P1, "cpextladd3_b_P0_P1", "cpextladd3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextusubu3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPEXTUSUBU3_B_P0_P1, "cpextusubu3_b_P0_P1", "cpextusubu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextusub3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPEXTUSUB3_B_P0_P1, "cpextusub3_b_P0_P1", "cpextusub3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextlsubu3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPEXTLSUBU3_B_P0_P1, "cpextlsubu3_b_P0_P1", "cpextlsubu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpextlsub3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPEXTLSUB3_B_P0_P1, "cpextlsub3_b_P0_P1", "cpextlsub3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaveu3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPAVEU3_B_P0_P1, "cpaveu3_b_P0_P1", "cpaveu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpave3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPAVE3_B_P0_P1, "cpave3_b_P0_P1", "cpave3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpave3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPAVE3_H_P0_P1, "cpave3_h_P0_P1", "cpave3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpave3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPAVE3_W_P0_P1, "cpave3_w_P0_P1", "cpave3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddsru3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPADDSRU3_B_P0_P1, "cpaddsru3_b_P0_P1", "cpaddsru3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddsr3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPADDSR3_B_P0_P1, "cpaddsr3_b_P0_P1", "cpaddsr3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddsr3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPADDSR3_H_P0_P1, "cpaddsr3_h_P0_P1", "cpaddsr3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddsr3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPADDSR3_W_P0_P1, "cpaddsr3_w_P0_P1", "cpaddsr3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabsu3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPABSU3_B_P0_P1, "cpabsu3_b_P0_P1", "cpabsu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabs3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPABS3_B_P0_P1, "cpabs3_b_P0_P1", "cpabs3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabs3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPABS3_H_P0_P1, "cpabs3_h_P0_P1", "cpabs3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpand3 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPAND3_P0_P1, "cpand3_P0_P1", "cpand3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpor3 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPOR3_P0_P1, "cpor3_P0_P1", "cpor3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpnor3 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPNOR3_P0_P1, "cpnor3_P0_P1", "cpnor3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpxor3 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPXOR3_P0_P1, "cpxor3_P0_P1", "cpxor3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cppacku.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPPACKU_B_P0_P1, "cppacku_b_P0_P1", "cppacku.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cppack.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPPACK_B_P0_P1, "cppack_b_P0_P1", "cppack.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cppack.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPPACK_H_P0_P1, "cppack_h_P0_P1", "cppack.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmaxu3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMAXU3_B_P0_P1, "cpmaxu3_b_P0_P1", "cpmaxu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmax3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMAX3_B_P0_P1, "cpmax3_b_P0_P1", "cpmax3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmax3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMAX3_H_P0_P1, "cpmax3_h_P0_P1", "cpmax3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmaxu3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMAXU3_W_P0_P1, "cpmaxu3_w_P0_P1", "cpmaxu3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmax3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMAX3_W_P0_P1, "cpmax3_w_P0_P1", "cpmax3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpminu3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMINU3_B_P0_P1, "cpminu3_b_P0_P1", "cpminu3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmin3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMIN3_B_P0_P1, "cpmin3_b_P0_P1", "cpmin3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmin3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMIN3_H_P0_P1, "cpmin3_h_P0_P1", "cpmin3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpminu3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMINU3_W_P0_P1, "cpminu3_w_P0_P1", "cpminu3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmin3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPMIN3_W_P0_P1, "cpmin3_w_P0_P1", "cpmin3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrl3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSRL3_B_P0_P1, "cpsrl3_b_P0_P1", "cpsrl3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssrl3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSRL3_B_P0_P1, "cpssrl3_b_P0_P1", "cpssrl3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrl3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSRL3_H_P0_P1, "cpsrl3_h_P0_P1", "cpsrl3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssrl3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSRL3_H_P0_P1, "cpssrl3_h_P0_P1", "cpssrl3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrl3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSRL3_W_P0_P1, "cpsrl3_w_P0_P1", "cpsrl3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssrl3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSRL3_W_P0_P1, "cpssrl3_w_P0_P1", "cpssrl3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdsrl3 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CDSRL3_P0_P1, "cdsrl3_P0_P1", "cdsrl3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsra3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSRA3_B_P0_P1, "cpsra3_b_P0_P1", "cpsra3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssra3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSRA3_B_P0_P1, "cpssra3_b_P0_P1", "cpssra3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsra3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSRA3_H_P0_P1, "cpsra3_h_P0_P1", "cpsra3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssra3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSRA3_H_P0_P1, "cpssra3_h_P0_P1", "cpssra3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsra3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSRA3_W_P0_P1, "cpsra3_w_P0_P1", "cpsra3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssra3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSRA3_W_P0_P1, "cpssra3_w_P0_P1", "cpssra3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdsra3 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CDSRA3_P0_P1, "cdsra3_P0_P1", "cdsra3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsll3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSLL3_B_P0_P1, "cpsll3_b_P0_P1", "cpsll3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssll3.b $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSLL3_B_P0_P1, "cpssll3_b_P0_P1", "cpssll3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsll3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSLL3_H_P0_P1, "cpsll3_h_P0_P1", "cpsll3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssll3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSLL3_H_P0_P1, "cpssll3_h_P0_P1", "cpssll3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsll3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSLL3_W_P0_P1, "cpsll3_w_P0_P1", "cpsll3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssll3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSSLL3_W_P0_P1, "cpssll3_w_P0_P1", "cpssll3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdsll3 $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CDSLL3_P0_P1, "cdsll3_P0_P1", "cdsll3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsla3.h $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSLA3_H_P0_P1, "cpsla3_h_P0_P1", "cpsla3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsla3.w $crop,$crqp,$crpp */
+  {
+    MEP_INSN_CPSLA3_W_P0_P1, "cpsla3_w_P0_P1", "cpsla3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrli3.b $crop,$crqp,$imm3p5 */
+  {
+    MEP_INSN_CPSRLI3_B_P0_P1, "cpsrli3_b_P0_P1", "cpsrli3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrli3.h $crop,$crqp,$imm4p4 */
+  {
+    MEP_INSN_CPSRLI3_H_P0_P1, "cpsrli3_h_P0_P1", "cpsrli3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrli3.w $crop,$crqp,$imm5p3 */
+  {
+    MEP_INSN_CPSRLI3_W_P0_P1, "cpsrli3_w_P0_P1", "cpsrli3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdsrli3 $crop,$crqp,$imm6p2 */
+  {
+    MEP_INSN_CDSRLI3_P0_P1, "cdsrli3_P0_P1", "cdsrli3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrai3.b $crop,$crqp,$imm3p5 */
+  {
+    MEP_INSN_CPSRAI3_B_P0_P1, "cpsrai3_b_P0_P1", "cpsrai3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrai3.h $crop,$crqp,$imm4p4 */
+  {
+    MEP_INSN_CPSRAI3_H_P0_P1, "cpsrai3_h_P0_P1", "cpsrai3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrai3.w $crop,$crqp,$imm5p3 */
+  {
+    MEP_INSN_CPSRAI3_W_P0_P1, "cpsrai3_w_P0_P1", "cpsrai3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdsrai3 $crop,$crqp,$imm6p2 */
+  {
+    MEP_INSN_CDSRAI3_P0_P1, "cdsrai3_P0_P1", "cdsrai3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpslli3.b $crop,$crqp,$imm3p5 */
+  {
+    MEP_INSN_CPSLLI3_B_P0_P1, "cpslli3_b_P0_P1", "cpslli3.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpslli3.h $crop,$crqp,$imm4p4 */
+  {
+    MEP_INSN_CPSLLI3_H_P0_P1, "cpslli3_h_P0_P1", "cpslli3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpslli3.w $crop,$crqp,$imm5p3 */
+  {
+    MEP_INSN_CPSLLI3_W_P0_P1, "cpslli3_w_P0_P1", "cpslli3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdslli3 $crop,$crqp,$imm6p2 */
+  {
+    MEP_INSN_CDSLLI3_P0_P1, "cdslli3_P0_P1", "cdslli3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpslai3.h $crop,$crqp,$imm4p4 */
+  {
+    MEP_INSN_CPSLAI3_H_P0_P1, "cpslai3_h_P0_P1", "cpslai3.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpslai3.w $crop,$crqp,$imm5p3 */
+  {
+    MEP_INSN_CPSLAI3_W_P0_P1, "cpslai3_w_P0_P1", "cpslai3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpclipiu3.w $crop,$crqp,$imm5p3 */
+  {
+    MEP_INSN_CPCLIPIU3_W_P0_P1, "cpclipiu3_w_P0_P1", "cpclipiu3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpclipi3.w $crop,$crqp,$imm5p3 */
+  {
+    MEP_INSN_CPCLIPI3_W_P0_P1, "cpclipi3_w_P0_P1", "cpclipi3.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdclipiu3 $crop,$crqp,$imm6p2 */
+  {
+    MEP_INSN_CDCLIPIU3_P0_P1, "cdclipiu3_P0_P1", "cdclipiu3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdclipi3 $crop,$crqp,$imm6p2 */
+  {
+    MEP_INSN_CDCLIPI3_P0_P1, "cdclipi3_P0_P1", "cdclipi3", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovi.h $crqp,$simm16p0 */
+  {
+    MEP_INSN_CPMOVI_H_P0_P1, "cpmovi_h_P0_P1", "cpmovi.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmoviu.w $crqp,$imm16p0 */
+  {
+    MEP_INSN_CPMOVIU_W_P0_P1, "cpmoviu_w_P0_P1", "cpmoviu.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovi.w $crqp,$simm16p0 */
+  {
+    MEP_INSN_CPMOVI_W_P0_P1, "cpmovi_w_P0_P1", "cpmovi.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdmoviu $crqp,$imm16p0 */
+  {
+    MEP_INSN_CDMOVIU_P0_P1, "cdmoviu_P0_P1", "cdmoviu", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* cdmovi $crqp,$simm16p0 */
+  {
+    MEP_INSN_CDMOVI_P0_P1, "cdmovi_P0_P1", "cdmovi", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P0)|(1<<SLOTS_P1), 0 } } } }
+  },
+/* c1nop */
+  {
+    MEP_INSN_C1NOP_P1, "c1nop_P1", "c1nop", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpadda1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPADDA1U_B_P1, "cpadda1u_b_P1", "cpadda1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpadda1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPADDA1_B_P1, "cpadda1_b_P1", "cpadda1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPADDUA1_H_P1, "cpaddua1_h_P1", "cpaddua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPADDLA1_H_P1, "cpaddla1_h_P1", "cpaddla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddaca1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPADDACA1U_B_P1, "cpaddaca1u_b_P1", "cpaddaca1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddaca1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPADDACA1_B_P1, "cpaddaca1_b_P1", "cpaddaca1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddacua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPADDACUA1_H_P1, "cpaddacua1_h_P1", "cpaddacua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaddacla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPADDACLA1_H_P1, "cpaddacla1_h_P1", "cpaddacla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsuba1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBA1U_B_P1, "cpsuba1u_b_P1", "cpsuba1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsuba1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBA1_B_P1, "cpsuba1_b_P1", "cpsuba1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsubua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBUA1_H_P1, "cpsubua1_h_P1", "cpsubua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsubla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBLA1_H_P1, "cpsubla1_h_P1", "cpsubla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsubaca1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBACA1U_B_P1, "cpsubaca1u_b_P1", "cpsubaca1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsubaca1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBACA1_B_P1, "cpsubaca1_b_P1", "cpsubaca1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsubacua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBACUA1_H_P1, "cpsubacua1_h_P1", "cpsubacua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsubacla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSUBACLA1_H_P1, "cpsubacla1_h_P1", "cpsubacla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabsa1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPABSA1U_B_P1, "cpabsa1u_b_P1", "cpabsa1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabsa1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPABSA1_B_P1, "cpabsa1_b_P1", "cpabsa1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabsua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPABSUA1_H_P1, "cpabsua1_h_P1", "cpabsua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpabsla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPABSLA1_H_P1, "cpabsla1_h_P1", "cpabsla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsada1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSADA1U_B_P1, "cpsada1u_b_P1", "cpsada1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsada1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSADA1_B_P1, "cpsada1_b_P1", "cpsada1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsadua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSADUA1_H_P1, "cpsadua1_h_P1", "cpsadua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsadla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSADLA1_H_P1, "cpsadla1_h_P1", "cpsadla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpseta1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSETA1_H_P1, "cpseta1_h_P1", "cpseta1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsetua1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSETUA1_W_P1, "cpsetua1_w_P1", "cpsetua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsetla1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSETLA1_W_P1, "cpsetla1_w_P1", "cpsetla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmova1.b $crop */
+  {
+    MEP_INSN_CPMOVA1_B_P1, "cpmova1_b_P1", "cpmova1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovua1.h $crop */
+  {
+    MEP_INSN_CPMOVUA1_H_P1, "cpmovua1_h_P1", "cpmovua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovla1.h $crop */
+  {
+    MEP_INSN_CPMOVLA1_H_P1, "cpmovla1_h_P1", "cpmovla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovuua1.w $crop */
+  {
+    MEP_INSN_CPMOVUUA1_W_P1, "cpmovuua1_w_P1", "cpmovuua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovula1.w $crop */
+  {
+    MEP_INSN_CPMOVULA1_W_P1, "cpmovula1_w_P1", "cpmovula1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovlua1.w $crop */
+  {
+    MEP_INSN_CPMOVLUA1_W_P1, "cpmovlua1_w_P1", "cpmovlua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovlla1.w $crop */
+  {
+    MEP_INSN_CPMOVLLA1_W_P1, "cpmovlla1_w_P1", "cpmovlla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cppacka1u.b $crop */
+  {
+    MEP_INSN_CPPACKA1U_B_P1, "cppacka1u_b_P1", "cppacka1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cppacka1.b $crop */
+  {
+    MEP_INSN_CPPACKA1_B_P1, "cppacka1_b_P1", "cppacka1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cppackua1.h $crop */
+  {
+    MEP_INSN_CPPACKUA1_H_P1, "cppackua1_h_P1", "cppackua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cppackla1.h $crop */
+  {
+    MEP_INSN_CPPACKLA1_H_P1, "cppackla1_h_P1", "cppackla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cppackua1.w $crop */
+  {
+    MEP_INSN_CPPACKUA1_W_P1, "cppackua1_w_P1", "cppackua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cppackla1.w $crop */
+  {
+    MEP_INSN_CPPACKLA1_W_P1, "cppackla1_w_P1", "cppackla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovhua1.w $crop */
+  {
+    MEP_INSN_CPMOVHUA1_W_P1, "cpmovhua1_w_P1", "cpmovhua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmovhla1.w $crop */
+  {
+    MEP_INSN_CPMOVHLA1_W_P1, "cpmovhla1_w_P1", "cpmovhla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacsuma1 */
+  {
+    MEP_INSN_CPACSUMA1_P1, "cpacsuma1_P1", "cpacsuma1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpaccpa1 */
+  {
+    MEP_INSN_CPACCPA1_P1, "cpaccpa1_P1", "cpaccpa1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpacswp */
+  {
+    MEP_INSN_CPACSWP_P1, "cpacswp_P1", "cpacswp", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrla1 $crqp */
+  {
+    MEP_INSN_CPSRLA1_P1, "cpsrla1_P1", "cpsrla1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsraa1 $crqp */
+  {
+    MEP_INSN_CPSRAA1_P1, "cpsraa1_P1", "cpsraa1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpslla1 $crqp */
+  {
+    MEP_INSN_CPSLLA1_P1, "cpslla1_P1", "cpslla1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsrlia1 $imm5p23 */
+  {
+    MEP_INSN_CPSRLIA1_1_P1, "cpsrlia1_1_p1", "cpsrlia1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsraia1 $imm5p23 */
+  {
+    MEP_INSN_CPSRAIA1_1_P1, "cpsraia1_1_p1", "cpsraia1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsllia1 $imm5p23 */
+  {
+    MEP_INSN_CPSLLIA1_1_P1, "cpsllia1_1_p1", "cpsllia1", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmulia1s0u.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMULIA1S0U_B_P1, "cpfmulia1s0u_b_P1", "cpfmulia1s0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmulia1s0.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMULIA1S0_B_P1, "cpfmulia1s0_b_P1", "cpfmulia1s0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmuliua1s0.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMULIUA1S0_H_P1, "cpfmuliua1s0_h_P1", "cpfmuliua1s0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmulila1s0.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMULILA1S0_H_P1, "cpfmulila1s0_h_P1", "cpfmulila1s0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadia1s0u.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMADIA1S0U_B_P1, "cpfmadia1s0u_b_P1", "cpfmadia1s0u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadia1s0.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMADIA1S0_B_P1, "cpfmadia1s0_b_P1", "cpfmadia1s0.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadiua1s0.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMADIUA1S0_H_P1, "cpfmadiua1s0_h_P1", "cpfmadiua1s0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadila1s0.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMADILA1S0_H_P1, "cpfmadila1s0_h_P1", "cpfmadila1s0.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmulia1s1u.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMULIA1S1U_B_P1, "cpfmulia1s1u_b_P1", "cpfmulia1s1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmulia1s1.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMULIA1S1_B_P1, "cpfmulia1s1_b_P1", "cpfmulia1s1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmuliua1s1.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMULIUA1S1_H_P1, "cpfmuliua1s1_h_P1", "cpfmuliua1s1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmulila1s1.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMULILA1S1_H_P1, "cpfmulila1s1_h_P1", "cpfmulila1s1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadia1s1u.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMADIA1S1U_B_P1, "cpfmadia1s1u_b_P1", "cpfmadia1s1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadia1s1.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMADIA1S1_B_P1, "cpfmadia1s1_b_P1", "cpfmadia1s1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadiua1s1.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMADIUA1S1_H_P1, "cpfmadiua1s1_h_P1", "cpfmadiua1s1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadila1s1.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPFMADILA1S1_H_P1, "cpfmadila1s1_h_P1", "cpfmadila1s1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpamulia1u.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPAMULIA1U_B_P1, "cpamulia1u_b_P1", "cpamulia1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpamulia1.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPAMULIA1_B_P1, "cpamulia1_b_P1", "cpamulia1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpamuliua1.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPAMULIUA1_H_P1, "cpamuliua1_h_P1", "cpamuliua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpamulila1.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPAMULILA1_H_P1, "cpamulila1_h_P1", "cpamulila1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpamadia1u.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPAMADIA1U_B_P1, "cpamadia1u_b_P1", "cpamadia1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpamadia1.b $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPAMADIA1_B_P1, "cpamadia1_b_P1", "cpamadia1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpamadiua1.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPAMADIUA1_H_P1, "cpamadiua1_h_P1", "cpamadiua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpamadila1.h $crqp,$crpp,$simm8p0 */
+  {
+    MEP_INSN_CPAMADILA1_H_P1, "cpamadila1_h_P1", "cpamadila1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmulia1u.b $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    MEP_INSN_CPFMULIA1U_B_P1, "cpfmulia1u_b_P1", "cpfmulia1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmulia1.b $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    MEP_INSN_CPFMULIA1_B_P1, "cpfmulia1_b_P1", "cpfmulia1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmuliua1.h $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    MEP_INSN_CPFMULIUA1_H_P1, "cpfmuliua1_h_P1", "cpfmuliua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmulila1.h $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    MEP_INSN_CPFMULILA1_H_P1, "cpfmulila1_h_P1", "cpfmulila1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadia1u.b $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    MEP_INSN_CPFMADIA1U_B_P1, "cpfmadia1u_b_P1", "cpfmadia1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadia1.b $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    MEP_INSN_CPFMADIA1_B_P1, "cpfmadia1_b_P1", "cpfmadia1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadiua1.h $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    MEP_INSN_CPFMADIUA1_H_P1, "cpfmadiua1_h_P1", "cpfmadiua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpfmadila1.h $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    MEP_INSN_CPFMADILA1_H_P1, "cpfmadila1_h_P1", "cpfmadila1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssqa1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSSQA1U_B_P1, "cpssqa1u_b_P1", "cpssqa1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssqa1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSSQA1_B_P1, "cpssqa1_b_P1", "cpssqa1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssda1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSSDA1U_B_P1, "cpssda1u_b_P1", "cpssda1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpssda1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPSSDA1_B_P1, "cpssda1_b_P1", "cpssda1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmula1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPMULA1U_B_P1, "cpmula1u_b_P1", "cpmula1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmula1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPMULA1_B_P1, "cpmula1_b_P1", "cpmula1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPMULUA1_H_P1, "cpmulua1_h_P1", "cpmulua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPMULLA1_H_P1, "cpmulla1_h_P1", "cpmulla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulua1u.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMULUA1U_W_P1, "cpmulua1u_w_P1", "cpmulua1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulla1u.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMULLA1U_W_P1, "cpmulla1u_w_P1", "cpmulla1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulua1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMULUA1_W_P1, "cpmulua1_w_P1", "cpmulua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulla1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMULLA1_W_P1, "cpmulla1_w_P1", "cpmulla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmada1u.b $crqp,$crpp */
+  {
+    MEP_INSN_CPMADA1U_B_P1, "cpmada1u_b_P1", "cpmada1u.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmada1.b $crqp,$crpp */
+  {
+    MEP_INSN_CPMADA1_B_P1, "cpmada1_b_P1", "cpmada1.b", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmadua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPMADUA1_H_P1, "cpmadua1_h_P1", "cpmadua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmadla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPMADLA1_H_P1, "cpmadla1_h_P1", "cpmadla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmadua1u.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMADUA1U_W_P1, "cpmadua1u_w_P1", "cpmadua1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmadla1u.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMADLA1U_W_P1, "cpmadla1u_w_P1", "cpmadla1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmadua1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMADUA1_W_P1, "cpmadua1_w_P1", "cpmadua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmadla1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMADLA1_W_P1, "cpmadla1_w_P1", "cpmadla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmsbua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPMSBUA1_H_P1, "cpmsbua1_h_P1", "cpmsbua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmsbla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPMSBLA1_H_P1, "cpmsbla1_h_P1", "cpmsbla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmsbua1u.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMSBUA1U_W_P1, "cpmsbua1u_w_P1", "cpmsbua1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmsbla1u.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMSBLA1U_W_P1, "cpmsbla1u_w_P1", "cpmsbla1u.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmsbua1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMSBUA1_W_P1, "cpmsbua1_w_P1", "cpmsbua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmsbla1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMSBLA1_W_P1, "cpmsbla1_w_P1", "cpmsbla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmadua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSMADUA1_H_P1, "cpsmadua1_h_P1", "cpsmadua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmadla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSMADLA1_H_P1, "cpsmadla1_h_P1", "cpsmadla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmadua1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSMADUA1_W_P1, "cpsmadua1_w_P1", "cpsmadua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmadla1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSMADLA1_W_P1, "cpsmadla1_w_P1", "cpsmadla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmsbua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSMSBUA1_H_P1, "cpsmsbua1_h_P1", "cpsmsbua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmsbla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSMSBLA1_H_P1, "cpsmsbla1_h_P1", "cpsmsbla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmsbua1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSMSBUA1_W_P1, "cpsmsbua1_w_P1", "cpsmsbua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmsbla1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSMSBLA1_W_P1, "cpsmsbla1_w_P1", "cpsmsbla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulslua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPMULSLUA1_H_P1, "cpmulslua1_h_P1", "cpmulslua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulslla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPMULSLLA1_H_P1, "cpmulslla1_h_P1", "cpmulslla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulslua1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMULSLUA1_W_P1, "cpmulslua1_w_P1", "cpmulslua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpmulslla1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPMULSLLA1_W_P1, "cpmulslla1_w_P1", "cpmulslla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmadslua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSMADSLUA1_H_P1, "cpsmadslua1_h_P1", "cpsmadslua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmadslla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSMADSLLA1_H_P1, "cpsmadslla1_h_P1", "cpsmadslla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmadslua1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSMADSLUA1_W_P1, "cpsmadslua1_w_P1", "cpsmadslua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmadslla1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSMADSLLA1_W_P1, "cpsmadslla1_w_P1", "cpsmadslla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmsbslua1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSMSBSLUA1_H_P1, "cpsmsbslua1_h_P1", "cpsmsbslua1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmsbslla1.h $crqp,$crpp */
+  {
+    MEP_INSN_CPSMSBSLLA1_H_P1, "cpsmsbslla1_h_P1", "cpsmsbslla1.h", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmsbslua1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSMSBSLUA1_W_P1, "cpsmsbslua1_w_P1", "cpsmsbslua1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
+  },
+/* cpsmsbslla1.w $crqp,$crpp */
+  {
+    MEP_INSN_CPSMSBSLLA1_W_P1, "cpsmsbslla1_w_P1", "cpsmsbslla1.w", 32,
+    { 0|A(OPTIONAL_CP_INSN), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x4" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_P1), 0 } } } }
   },
 };
 

diff --git a/opcodes/mep-desc.h b/opcodes/mep-desc.h
index b4de4d5..19832e0 100644 (file)
--- a/opcodes/mep-desc.h
+++ b/opcodes/mep-desc.h
@@ -51,7 +51,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_INT_INSN_P 1
 
 /* Maximum number of syntax elements in an instruction.  */
-#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 18
+#define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 22
 
 /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
    e.g. In "b,a foo" the ",a" is an operand.  If mnemonics have operands
@@ -59,7 +59,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_MNEMONIC_OPERANDS
 
 /* Maximum number of fields in an instruction.  */
-#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 9
+#define CGEN_ACTUAL_MAX_IFMT_OPERANDS 10
 
 /* Enums.  */
 
@@ -81,7 +81,8 @@ typedef enum mach_attr {
 
 /* Enum declaration for instruction set selection.  */
 typedef enum isa_attr {
-  ISA_MEP, ISA_EXT_CORE1, ISA_MAX
+  ISA_MEP, ISA_EXT_CORE1, ISA_EXT_COP1_16, ISA_EXT_COP1_32
+ , ISA_EXT_COP1_48, ISA_EXT_COP1_64, ISA_MAX
 } ISA_ATTR;
 
 /* Enum declaration for datatype to use for C intrinsics mapping.  */
@@ -96,6 +97,12 @@ typedef enum config_attr {
   CONFIG_NONE, CONFIG_DEFAULT
 } CONFIG_ATTR;
 
+/* Enum declaration for slots for which this opcode is valid - c3, p0s, p0, p1.  */
+typedef enum slots_attr {
+  SLOTS_CORE, SLOTS_C3, SLOTS_P0S, SLOTS_P0
+ , SLOTS_P1
+} SLOTS_ATTR;
+
 /* Number of architecture variants.  */
 #define MAX_ISAS  ((int) ISA_MAX)
 #define MAX_MACHS ((int) MACH_MAX)
@@ -151,7 +158,20 @@ typedef enum ifield_type {
  , MEP_F_CCRN_LO, MEP_F_CCRN, MEP_F_C5N4, MEP_F_C5N5
  , MEP_F_C5N6, MEP_F_C5N7, MEP_F_RL5, MEP_F_12S20
  , MEP_F_C5_RNM, MEP_F_C5_RM, MEP_F_C5_16U16, MEP_F_C5_RMUIMM20
- , MEP_F_C5_RNMUIMM24, MEP_F_MAX
+ , MEP_F_C5_RNMUIMM24, MEP_F_IVC2_2U4, MEP_F_IVC2_3U4, MEP_F_IVC2_8U4
+ , MEP_F_IVC2_8S4, MEP_F_IVC2_1U6, MEP_F_IVC2_2U6, MEP_F_IVC2_3U6
+ , MEP_F_IVC2_6U6, MEP_F_IVC2_5U7, MEP_F_IVC2_4U8, MEP_F_IVC2_3U9
+ , MEP_F_IVC2_5U16, MEP_F_IVC2_5U21, MEP_F_IVC2_5U26, MEP_F_IVC2_1U31
+ , MEP_F_IVC2_4U16, MEP_F_IVC2_4U20, MEP_F_IVC2_4U24, MEP_F_IVC2_4U28
+ , MEP_F_IVC2_2U0, MEP_F_IVC2_3U0, MEP_F_IVC2_4U0, MEP_F_IVC2_5U0
+ , MEP_F_IVC2_8U0, MEP_F_IVC2_8S0, MEP_F_IVC2_6U2, MEP_F_IVC2_5U3
+ , MEP_F_IVC2_4U4, MEP_F_IVC2_3U5, MEP_F_IVC2_5U8, MEP_F_IVC2_4U10
+ , MEP_F_IVC2_3U12, MEP_F_IVC2_5U13, MEP_F_IVC2_2U18, MEP_F_IVC2_5U18
+ , MEP_F_IVC2_8U20, MEP_F_IVC2_8S20, MEP_F_IVC2_5U23, MEP_F_IVC2_2U23
+ , MEP_F_IVC2_3U25, MEP_F_IVC2_IMM16P0, MEP_F_IVC2_SIMM16P0, MEP_F_IVC2_CRN
+ , MEP_F_IVC2_CRM, MEP_F_IVC2_CCRN_H1, MEP_F_IVC2_CCRN_H2, MEP_F_IVC2_CCRN_LO
+ , MEP_F_IVC2_CMOV1, MEP_F_IVC2_CMOV2, MEP_F_IVC2_CMOV3, MEP_F_IVC2_CCRN
+ , MEP_F_IVC2_CRNX, MEP_F_MAX
 } IFIELD_TYPE;
 
 #define MAX_IFLD ((int) MEP_F_MAX)
@@ -181,7 +201,8 @@ typedef enum cgen_hw_attr {
 typedef enum cgen_hw_type {
   HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
  , HW_H_IADDR, HW_H_PC, HW_H_GPR, HW_H_CSR
- , HW_H_CR64, HW_H_CR, HW_H_CCR, HW_MAX
+ , HW_H_CR64, HW_H_CR64_W, HW_H_CR, HW_H_CCR
+ , HW_H_CCR_W, HW_H_CR_IVC2, HW_H_CCR_IVC2, HW_MAX
 } CGEN_HW_TYPE;
 
 #define MAX_HW ((int) HW_MAX)
@@ -236,11 +257,21 @@ typedef enum cgen_operand_type {
  , MEP_OPERAND_UDISP7A4, MEP_OPERAND_UIMM7A4, MEP_OPERAND_UIMM24, MEP_OPERAND_CIMM4
  , MEP_OPERAND_CIMM5, MEP_OPERAND_CDISP10, MEP_OPERAND_CDISP10A2, MEP_OPERAND_CDISP10A4
  , MEP_OPERAND_CDISP10A8, MEP_OPERAND_ZERO, MEP_OPERAND_RL5, MEP_OPERAND_CDISP12
- , MEP_OPERAND_C5RMUIMM20, MEP_OPERAND_C5RNMUIMM24, MEP_OPERAND_CP_FLAG, MEP_OPERAND_MAX
+ , MEP_OPERAND_C5RMUIMM20, MEP_OPERAND_C5RNMUIMM24, MEP_OPERAND_CP_FLAG, MEP_OPERAND_CROC
+ , MEP_OPERAND_CRQC, MEP_OPERAND_CRPC, MEP_OPERAND_IVC_X_6_1, MEP_OPERAND_IVC_X_6_2
+ , MEP_OPERAND_IVC_X_6_3, MEP_OPERAND_IMM3P4, MEP_OPERAND_IMM3P9, MEP_OPERAND_IMM4P8
+ , MEP_OPERAND_IMM5P7, MEP_OPERAND_IMM6P6, MEP_OPERAND_IMM8P4, MEP_OPERAND_SIMM8P4
+ , MEP_OPERAND_IMM3P5, MEP_OPERAND_IMM3P12, MEP_OPERAND_IMM4P4, MEP_OPERAND_IMM4P10
+ , MEP_OPERAND_IMM5P8, MEP_OPERAND_IMM5P3, MEP_OPERAND_IMM6P2, MEP_OPERAND_IMM5P23
+ , MEP_OPERAND_IMM3P25, MEP_OPERAND_IMM8P0, MEP_OPERAND_SIMM8P0, MEP_OPERAND_IMM8P20
+ , MEP_OPERAND_CROP, MEP_OPERAND_CRQP, MEP_OPERAND_CRPP, MEP_OPERAND_IVC_X_0_2
+ , MEP_OPERAND_IVC_X_0_3, MEP_OPERAND_IVC_X_0_4, MEP_OPERAND_IVC_X_0_5, MEP_OPERAND_IMM16P0
+ , MEP_OPERAND_SIMM16P0, MEP_OPERAND_IVC2RM, MEP_OPERAND_IVC2CRN, MEP_OPERAND_IVC2CCRN
+ , MEP_OPERAND_MAX
 } CGEN_OPERAND_TYPE;
 
 /* Number of operands types.  */
-#define MAX_OPERANDS 83
+#define MAX_OPERANDS 120
 
 /* Maximum number of operands referenced by any insn.  */
 #define MAX_OPERAND_INSTANCES 8
@@ -258,7 +289,7 @@ typedef enum cgen_insn_attr {
  , CGEN_INSN_OPTIONAL_VLIW64, CGEN_INSN_MAY_TRAP, CGEN_INSN_VLIW_ALONE, CGEN_INSN_VLIW_NO_CORE_NOP
  , CGEN_INSN_VLIW_NO_COP_NOP, CGEN_INSN_VLIW64_NO_MATCHING_NOP, CGEN_INSN_VLIW32_NO_MATCHING_NOP, CGEN_INSN_VOLATILE
  , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_ISA
- , CGEN_INSN_LATENCY, CGEN_INSN_CONFIG, CGEN_INSN_END_NBOOLS
+ , CGEN_INSN_LATENCY, CGEN_INSN_CONFIG, CGEN_INSN_SLOTS, CGEN_INSN_END_NBOOLS
 } CGEN_INSN_ATTR;
 
 /* Number of non-boolean elements in cgen_insn_attr.  */
@@ -269,6 +300,7 @@ typedef enum cgen_insn_attr {
 #define CGEN_ATTR_CGEN_INSN_ISA_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_ISA-CGEN_INSN_START_NBOOLS-1].bitset)
 #define CGEN_ATTR_CGEN_INSN_LATENCY_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_LATENCY-CGEN_INSN_START_NBOOLS-1].nonbitset)
 #define CGEN_ATTR_CGEN_INSN_CONFIG_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_CONFIG-CGEN_INSN_START_NBOOLS-1].nonbitset)
+#define CGEN_ATTR_CGEN_INSN_SLOTS_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_SLOTS-CGEN_INSN_START_NBOOLS-1].nonbitset)
 #define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_ALIAS)) != 0)
 #define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_VIRTUAL)) != 0)
 #define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
@@ -320,6 +352,8 @@ extern CGEN_KEYWORD mep_cgen_opval_h_csr;
 extern CGEN_KEYWORD mep_cgen_opval_h_cr64;
 extern CGEN_KEYWORD mep_cgen_opval_h_cr;
 extern CGEN_KEYWORD mep_cgen_opval_h_ccr;
+extern CGEN_KEYWORD mep_cgen_opval_h_cr_ivc2;
+extern CGEN_KEYWORD mep_cgen_opval_h_ccr_ivc2;
 
 extern const CGEN_HW_ENTRY mep_cgen_hw_table[];
 

diff --git a/opcodes/mep-dis.c b/opcodes/mep-dis.c
index 93f747f..ee0d507 100644 (file)
--- a/opcodes/mep-dis.c
+++ b/opcodes/mep-dis.c
@@ -89,6 +89,36 @@ print_spreg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, PTR dis_info,
 }
 
 /* begin-cop-ip-print-handlers */
+static void
+print_ivc2_cr (CGEN_CPU_DESC,
+       void *,
+       CGEN_KEYWORD *,
+       long,
+       unsigned int) ATTRIBUTE_UNUSED;
+static void
+print_ivc2_cr (CGEN_CPU_DESC cd,
+       void *dis_info,
+       CGEN_KEYWORD *keyword_table ATTRIBUTE_UNUSED,
+       long value,
+       unsigned int attrs)
+{
+  print_keyword (cd, dis_info, & mep_cgen_opval_h_cr_ivc2, value, attrs);
+}
+static void
+print_ivc2_ccr (CGEN_CPU_DESC,
+       void *,
+       CGEN_KEYWORD *,
+       long,
+       unsigned int) ATTRIBUTE_UNUSED;
+static void
+print_ivc2_ccr (CGEN_CPU_DESC cd,
+       void *dis_info,
+       CGEN_KEYWORD *keyword_table ATTRIBUTE_UNUSED,
+       long value,
+       unsigned int attrs)
+{
+  print_keyword (cd, dis_info, & mep_cgen_opval_h_ccr_ivc2, value, attrs);
+}
 /* end-cop-ip-print-handlers */
 
 /************************************************************\
@@ -424,10 +454,199 @@ mep_examine_vliw64_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
   return status;
 }
 
+#ifdef MEP_IVC2_SUPPORTED
+
+static int
+print_slot_insn (CGEN_CPU_DESC cd,
+                bfd_vma pc,
+                disassemble_info *info,
+                SLOTS_ATTR slot,
+                bfd_byte *buf)
+{
+  const CGEN_INSN_LIST *insn_list;
+  CGEN_INSN_INT insn_value;
+  CGEN_EXTRACT_INFO ex_info;
+
+  insn_value = cgen_get_insn_value (cd, buf, 32);
+
+  /* Fill in ex_info fields like read_insn would.  Don't actually call
+     read_insn, since the incoming buffer is already read (and possibly
+     modified a la m32r).  */
+  ex_info.valid = (1 << 8) - 1;
+  ex_info.dis_info = info;
+  ex_info.insn_bytes = buf;
+
+  /* The instructions are stored in hash lists.
+     Pick the first one and keep trying until we find the right one.  */
+
+  insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
+  while (insn_list != NULL)
+    {
+      const CGEN_INSN *insn = insn_list->insn;
+      CGEN_FIELDS fields;
+      int length;
+
+      if ((CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_CONFIG)
+          && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_CONFIG) != MEP_CONFIG)
+         || ! (CGEN_ATTR_CGEN_INSN_SLOTS_VALUE (CGEN_INSN_ATTRS (insn)) & (1 << slot)))
+        {
+          insn_list = CGEN_DIS_NEXT_INSN (insn_list);
+         continue;
+        }
+
+      if ((insn_value & CGEN_INSN_BASE_MASK (insn))
+         == CGEN_INSN_BASE_VALUE (insn))
+       {
+         /* Printing is handled in two passes.  The first pass parses the
+            machine insn and extracts the fields.  The second pass prints
+            them.  */
+
+         length = CGEN_EXTRACT_FN (cd, insn)
+           (cd, insn, &ex_info, insn_value, &fields, pc);
+
+         /* Length < 0 -> error.  */
+         if (length < 0)
+           return length;
+         if (length > 0)
+           {
+             CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
+             /* Length is in bits, result is in bytes.  */
+             return length / 8;
+           }
+       }
+
+      insn_list = CGEN_DIS_NEXT_INSN (insn_list);
+    }
+
+  if (slot == SLOTS_P0S)
+    (*info->fprintf_func) (info->stream, "*unknown-p0s*");
+  else if (slot == SLOTS_P0)
+    (*info->fprintf_func) (info->stream, "*unknown-p0*");
+  else if (slot == SLOTS_P1)
+    (*info->fprintf_func) (info->stream, "*unknown-p1*");
+  else if (slot == SLOTS_C3)
+    (*info->fprintf_func) (info->stream, "*unknown-c3*");
+  return 0;
+}
+
+static int
+mep_examine_ivc2_insns (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, bfd_vma pc ATTRIBUTE_UNUSED, disassemble_info *info ATTRIBUTE_UNUSED)
+{
+  int status;
+  int buflength;
+  int cop2buflength;
+  bfd_byte buf[8];
+  bfd_byte insn[8];
+  int e;
+
+  /* At this time we're not supporting internally parallel
+     coprocessors, so cop2buflength will always be 0.  */
+  cop2buflength = 0;
+
+  /* Read in 64 bits.  */
+  buflength = 8; /* VLIW insn spans 8 bytes.  */
+  status = (*info->read_memory_func) (pc, buf, buflength, info);
+
+  if (status != 0)
+    {
+      (*info->memory_error_func) (status, pc, info);
+      return -1;
+    }
+
+  if (info->endian == BFD_ENDIAN_LITTLE)
+    e = 1;
+  else
+    e = 0;
+
+  if ((buf[0^e] & 0xf0) != 0xf0)
+    {
+      /*      <--00--><--11--><--22--><--33--><--44--><--55--><--66--><--77--> */
+      /* V1   [-----core-----][--------p0s-------][------------p1------------] */
+
+      print_insn (cd, pc, info, buf, 2);
+
+      insn[0^e] = 0;
+      insn[1^e] = buf[2^e];
+      insn[2^e] = buf[3^e];
+      insn[3^e] = buf[4^e] & 0xf0;
+      (*info->fprintf_func) (info->stream, " + ");
+      print_slot_insn (cd, pc, info, SLOTS_P0S, insn);
+
+      insn[0^e] = buf[4^e] << 4 | buf[5^e] >> 4;
+      insn[1^e] = buf[5^e] << 4 | buf[6^e] >> 4;
+      insn[2^e] = buf[6^e] << 4 | buf[7^e] >> 4;
+      insn[3^e] = buf[7^e] << 4;
+      (*info->fprintf_func) (info->stream, " + ");
+      print_slot_insn (cd, pc, info, SLOTS_P1, insn);
+    }
+  else if ((buf[0^e] & 0xf0) == 0xf0 && (buf[1^e] & 0x0f) == 0x07)
+    {
+      /*      <--00--><--11--><--22--><--33--><--44--><--55--><--66--><--77--> */
+      /* V3   1111[--p0--]0111[--------p0--------][------------p1------------] */
+      /*                                          00000000111111112222222233333333 */
+
+      insn[0^e] = buf[0^e] << 4 | buf[1^e] >> 4;
+      insn[1^e] = buf[2^e];
+      insn[2^e] = buf[3^e];
+      insn[3^e] = buf[4^e] & 0xf0;
+      print_slot_insn (cd, pc, info, SLOTS_P0, insn);
+
+      insn[0^e] = buf[4^e] << 4 | buf[5^e] >> 4;
+      insn[1^e] = buf[5^e] << 4 | buf[6^e] >> 4;
+      insn[2^e] = buf[6^e] << 4 | buf[7^e] >> 4;
+      insn[3^e] = buf[7^e] << 4;
+      (*info->fprintf_func) (info->stream, " + ");
+      print_slot_insn (cd, pc, info, SLOTS_P1, insn);
+    }
+  else
+    {
+      /*      <--00--><--11--><--22--><--33--><--44--><--55--><--66--><--77--> */
+      /* V2   [-------------core-------------]xxxx[------------p1------------] */
+      print_insn (cd, pc, info, buf, 4);
+
+      insn[0^e] = buf[4^e] << 4 | buf[5^e] >> 4;
+      insn[1^e] = buf[5^e] << 4 | buf[6^e] >> 4;
+      insn[2^e] = buf[6^e] << 4 | buf[7^e] >> 4;
+      insn[3^e] = buf[7^e] << 4;
+      (*info->fprintf_func) (info->stream, " + ");
+      print_slot_insn (cd, pc, info, SLOTS_P1, insn);
+    }
+
+  return 8;
+}
+
+#endif /* MEP_IVC2_SUPPORTED */
+
+/* This is a hack.  SID calls this to update the disassembler as the
+   CPU changes modes.  */
+static int mep_ivc2_disassemble_p = 0;
+static int mep_ivc2_vliw_disassemble_p = 0;
+
+void
+mep_print_insn_set_ivc2_mode (int ivc2_p, int vliw_p, int cfg_idx);
+void
+mep_print_insn_set_ivc2_mode (int ivc2_p, int vliw_p, int cfg_idx)
+{
+  mep_ivc2_disassemble_p = ivc2_p;
+  mep_ivc2_vliw_disassemble_p = vliw_p;
+  mep_config_index = cfg_idx;
+}
+
 static int
 mep_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
 {
   int status;
+  int cop_type;
+  int ivc2 = 0;
+  static CGEN_ATTR_VALUE_BITSET_TYPE *ivc2_core_isa = NULL;
+
+  if (ivc2_core_isa == NULL)
+    {
+      /* IVC2 has some core-only coprocessor instructions.  We
+        use COP32 to flag those, and COP64 for the VLIW ones,
+        since they have the same names.  */
+      ivc2_core_isa = cgen_bitset_create (MAX_ISAS);
+    }
 
   /* Extract and adapt to configuration number, if available. */
   if (info->section && info->section->owner)
@@ -435,6 +654,10 @@ mep_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
       bfd *abfd = info->section->owner;
       mep_config_index = abfd->tdata.elf_obj_data->elf_header->e_flags & EF_MEP_INDEX_MASK;
       /* This instantly redefines MEP_CONFIG, MEP_OMASK, .... MEP_VLIW64 */
+
+      cop_type = abfd->tdata.elf_obj_data->elf_header->e_flags & EF_MEP_COP_MASK;
+      if (cop_type == EF_MEP_COP_IVC2)
+       ivc2 = 1;
     }
 
   /* Picking the right ISA bitmask for the current context is tricky.  */
@@ -442,21 +665,55 @@ mep_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
     {
       if (info->section->flags & SEC_MEP_VLIW)
        {
-         /* Are we in 32 or 64 bit vliw mode?  */
-         if (MEP_VLIW64)
-           status = mep_examine_vliw64_insns (cd, pc, info);
+#ifdef MEP_IVC2_SUPPORTED
+         if (ivc2)
+           {
+             /* ivc2 has its own way of selecting its functions.  */
+             cd->isas = & MEP_CORE_ISA;
+             status = mep_examine_ivc2_insns (cd, pc, info);
+           }
          else
-           status = mep_examine_vliw32_insns (cd, pc, info);
+#endif
+           /* Are we in 32 or 64 bit vliw mode?  */
+           if (MEP_VLIW64)
+             status = mep_examine_vliw64_insns (cd, pc, info);
+           else
+             status = mep_examine_vliw32_insns (cd, pc, info);
          /* Both the above branches set their own isa bitmasks.  */
        }
       else
        {
-         cd->isas = & MEP_CORE_ISA;
+         if (ivc2)
+           {
+             cgen_bitset_clear (ivc2_core_isa);
+             cgen_bitset_union (ivc2_core_isa, &MEP_CORE_ISA, ivc2_core_isa);
+             cgen_bitset_union (ivc2_core_isa, &MEP_COP32_ISA, ivc2_core_isa);
+             cd->isas = ivc2_core_isa;
+           }
+         else
+           cd->isas = & MEP_CORE_ISA;
          status = default_print_insn (cd, pc, info);
        }
     }
   else /* sid or gdb */
     {
+#ifdef MEP_IVC2_SUPPORTED
+      if (mep_ivc2_disassemble_p)
+       {
+         if (mep_ivc2_vliw_disassemble_p)
+           {
+             cd->isas = & MEP_CORE_ISA;
+             status = mep_examine_ivc2_insns (cd, pc, info);
+             return status;
+           }
+         else
+           {
+             if (ivc2)
+               cd->isas = ivc2_core_isa;
+           }
+       }
+#endif
+
       status = default_print_insn (cd, pc, info);
     }
 
@@ -557,6 +814,24 @@ mep_cgen_print_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_CRNX64 :
       print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_crnx, 0|(1<<CGEN_OPERAND_VIRTUAL));
       break;
+    case MEP_OPERAND_CROC :
+      print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_ivc2_5u7, 0);
+      break;
+    case MEP_OPERAND_CROP :
+      print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_ivc2_5u23, 0);
+      break;
+    case MEP_OPERAND_CRPC :
+      print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_ivc2_5u26, 0);
+      break;
+    case MEP_OPERAND_CRPP :
+      print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_ivc2_5u18, 0);
+      break;
+    case MEP_OPERAND_CRQC :
+      print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_ivc2_5u21, 0);
+      break;
+    case MEP_OPERAND_CRQP :
+      print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_ivc2_5u13, 0);
+      break;
     case MEP_OPERAND_CSRN :
       print_keyword (cd, info, & mep_cgen_opval_h_csr, fields->f_csrn, 0|(1<<CGEN_OPERAND_VIRTUAL));
       break;
@@ -578,6 +853,90 @@ mep_cgen_print_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_HI :
       print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
       break;
+    case MEP_OPERAND_IMM16P0 :
+      print_normal (cd, info, fields->f_ivc2_imm16p0, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
+      break;
+    case MEP_OPERAND_IMM3P12 :
+      print_normal (cd, info, fields->f_ivc2_3u12, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM3P25 :
+      print_normal (cd, info, fields->f_ivc2_3u25, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM3P4 :
+      print_normal (cd, info, fields->f_ivc2_3u4, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM3P5 :
+      print_normal (cd, info, fields->f_ivc2_3u5, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM3P9 :
+      print_normal (cd, info, fields->f_ivc2_3u9, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM4P10 :
+      print_normal (cd, info, fields->f_ivc2_4u10, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM4P4 :
+      print_normal (cd, info, fields->f_ivc2_4u4, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM4P8 :
+      print_normal (cd, info, fields->f_ivc2_4u8, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM5P23 :
+      print_normal (cd, info, fields->f_ivc2_5u23, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM5P3 :
+      print_normal (cd, info, fields->f_ivc2_5u3, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM5P7 :
+      print_normal (cd, info, fields->f_ivc2_5u7, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM5P8 :
+      print_normal (cd, info, fields->f_ivc2_5u8, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM6P2 :
+      print_normal (cd, info, fields->f_ivc2_6u2, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM6P6 :
+      print_normal (cd, info, fields->f_ivc2_6u6, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM8P0 :
+      print_normal (cd, info, fields->f_ivc2_8u0, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM8P20 :
+      print_normal (cd, info, fields->f_ivc2_8u20, 0, pc, length);
+      break;
+    case MEP_OPERAND_IMM8P4 :
+      print_normal (cd, info, fields->f_ivc2_8u4, 0, pc, length);
+      break;
+    case MEP_OPERAND_IVC_X_0_2 :
+      print_normal (cd, info, fields->f_ivc2_2u0, 0, pc, length);
+      break;
+    case MEP_OPERAND_IVC_X_0_3 :
+      print_normal (cd, info, fields->f_ivc2_3u0, 0, pc, length);
+      break;
+    case MEP_OPERAND_IVC_X_0_4 :
+      print_normal (cd, info, fields->f_ivc2_4u0, 0, pc, length);
+      break;
+    case MEP_OPERAND_IVC_X_0_5 :
+      print_normal (cd, info, fields->f_ivc2_5u0, 0, pc, length);
+      break;
+    case MEP_OPERAND_IVC_X_6_1 :
+      print_normal (cd, info, fields->f_ivc2_1u6, 0, pc, length);
+      break;
+    case MEP_OPERAND_IVC_X_6_2 :
+      print_normal (cd, info, fields->f_ivc2_2u6, 0, pc, length);
+      break;
+    case MEP_OPERAND_IVC_X_6_3 :
+      print_normal (cd, info, fields->f_ivc2_3u6, 0, pc, length);
+      break;
+    case MEP_OPERAND_IVC2CCRN :
+      print_keyword (cd, info, & mep_cgen_opval_h_ccr, fields->f_ivc2_ccrn, 0|(1<<CGEN_OPERAND_VIRTUAL));
+      break;
+    case MEP_OPERAND_IVC2CRN :
+      print_keyword (cd, info, & mep_cgen_opval_h_cr64, fields->f_ivc2_crnx, 0|(1<<CGEN_OPERAND_VIRTUAL));
+      break;
+    case MEP_OPERAND_IVC2RM :
+      print_keyword (cd, info, & mep_cgen_opval_h_gpr, fields->f_ivc2_crm, 0);
+      break;
     case MEP_OPERAND_LO :
       print_keyword (cd, info, & mep_cgen_opval_h_csr, 0, 0);
       break;
@@ -689,12 +1048,21 @@ mep_cgen_print_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_SIMM16 :
       print_normal (cd, info, fields->f_16s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
       break;
+    case MEP_OPERAND_SIMM16P0 :
+      print_normal (cd, info, fields->f_ivc2_simm16p0, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
+      break;
     case MEP_OPERAND_SIMM6 :
       print_normal (cd, info, fields->f_6s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
       break;
     case MEP_OPERAND_SIMM8 :
       print_normal (cd, info, fields->f_8s8, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELOC_IMPLIES_OVERFLOW), pc, length);
       break;
+    case MEP_OPERAND_SIMM8P0 :
+      print_normal (cd, info, fields->f_ivc2_8s0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+      break;
+    case MEP_OPERAND_SIMM8P4 :
+      print_normal (cd, info, fields->f_ivc2_8s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
+      break;
     case MEP_OPERAND_SP :
       print_keyword (cd, info, & mep_cgen_opval_h_gpr, 0, 0);
       break;

diff --git a/opcodes/mep-ibld.c b/opcodes/mep-ibld.c
index 422a90d..69fedea 100644 (file)
--- a/opcodes/mep-ibld.c
+++ b/opcodes/mep-ibld.c
@@ -736,6 +736,24 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
           break;
       }
       break;
+    case MEP_OPERAND_CROC :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u7, 0, 0, 7, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_CROP :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u23, 0, 0, 23, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_CRPC :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u26, 0, 0, 26, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_CRPP :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u18, 0, 0, 18, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_CRQC :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u21, 0, 0, 21, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_CRQP :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u13, 0, 0, 13, 5, 32, total_length, buffer);
+      break;
     case MEP_OPERAND_CSRN :
       {
 {
@@ -774,6 +792,123 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
       break;
     case MEP_OPERAND_HI :
       break;
+    case MEP_OPERAND_IMM16P0 :
+      {
+{
+  FLD (f_ivc2_8u0) = ((((unsigned int) (FLD (f_ivc2_imm16p0)) >> (8))) & (255));
+  FLD (f_ivc2_8u20) = ((FLD (f_ivc2_imm16p0)) & (255));
+}
+        errmsg = insert_normal (cd, fields->f_ivc2_8u0, 0, 0, 0, 8, 32, total_length, buffer);
+        if (errmsg)
+          break;
+        errmsg = insert_normal (cd, fields->f_ivc2_8u20, 0, 0, 20, 8, 32, total_length, buffer);
+        if (errmsg)
+          break;
+      }
+      break;
+    case MEP_OPERAND_IMM3P12 :
+      errmsg = insert_normal (cd, fields->f_ivc2_3u12, 0, 0, 12, 3, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM3P25 :
+      errmsg = insert_normal (cd, fields->f_ivc2_3u25, 0, 0, 25, 3, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM3P4 :
+      errmsg = insert_normal (cd, fields->f_ivc2_3u4, 0, 0, 4, 3, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM3P5 :
+      errmsg = insert_normal (cd, fields->f_ivc2_3u5, 0, 0, 5, 3, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM3P9 :
+      errmsg = insert_normal (cd, fields->f_ivc2_3u9, 0, 0, 9, 3, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM4P10 :
+      errmsg = insert_normal (cd, fields->f_ivc2_4u10, 0, 0, 10, 4, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM4P4 :
+      errmsg = insert_normal (cd, fields->f_ivc2_4u4, 0, 0, 4, 4, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM4P8 :
+      errmsg = insert_normal (cd, fields->f_ivc2_4u8, 0, 0, 8, 4, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM5P23 :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u23, 0, 0, 23, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM5P3 :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u3, 0, 0, 3, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM5P7 :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u7, 0, 0, 7, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM5P8 :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u8, 0, 0, 8, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM6P2 :
+      errmsg = insert_normal (cd, fields->f_ivc2_6u2, 0, 0, 2, 6, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM6P6 :
+      errmsg = insert_normal (cd, fields->f_ivc2_6u6, 0, 0, 6, 6, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM8P0 :
+      errmsg = insert_normal (cd, fields->f_ivc2_8u0, 0, 0, 0, 8, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM8P20 :
+      errmsg = insert_normal (cd, fields->f_ivc2_8u20, 0, 0, 20, 8, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IMM8P4 :
+      errmsg = insert_normal (cd, fields->f_ivc2_8u4, 0, 0, 4, 8, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IVC_X_0_2 :
+      errmsg = insert_normal (cd, fields->f_ivc2_2u0, 0, 0, 0, 2, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IVC_X_0_3 :
+      errmsg = insert_normal (cd, fields->f_ivc2_3u0, 0, 0, 0, 3, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IVC_X_0_4 :
+      errmsg = insert_normal (cd, fields->f_ivc2_4u0, 0, 0, 0, 4, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IVC_X_0_5 :
+      errmsg = insert_normal (cd, fields->f_ivc2_5u0, 0, 0, 0, 5, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IVC_X_6_1 :
+      errmsg = insert_normal (cd, fields->f_ivc2_1u6, 0, 0, 6, 1, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IVC_X_6_2 :
+      errmsg = insert_normal (cd, fields->f_ivc2_2u6, 0, 0, 6, 2, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IVC_X_6_3 :
+      errmsg = insert_normal (cd, fields->f_ivc2_3u6, 0, 0, 6, 3, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_IVC2CCRN :
+      {
+{
+  FLD (f_ivc2_ccrn_h2) = ((((unsigned int) (FLD (f_ivc2_ccrn)) >> (4))) & (3));
+  FLD (f_ivc2_ccrn_lo) = ((FLD (f_ivc2_ccrn)) & (15));
+}
+        errmsg = insert_normal (cd, fields->f_ivc2_ccrn_h2, 0, 0, 20, 2, 32, total_length, buffer);
+        if (errmsg)
+          break;
+        errmsg = insert_normal (cd, fields->f_ivc2_ccrn_lo, 0, 0, 0, 4, 32, total_length, buffer);
+        if (errmsg)
+          break;
+      }
+      break;
+    case MEP_OPERAND_IVC2CRN :
+      {
+{
+  FLD (f_ivc2_ccrn_h1) = ((((unsigned int) (FLD (f_ivc2_crnx)) >> (4))) & (1));
+  FLD (f_ivc2_ccrn_lo) = ((FLD (f_ivc2_crnx)) & (15));
+}
+        errmsg = insert_normal (cd, fields->f_ivc2_ccrn_h1, 0, 0, 20, 1, 32, total_length, buffer);
+        if (errmsg)
+          break;
+        errmsg = insert_normal (cd, fields->f_ivc2_ccrn_lo, 0, 0, 0, 4, 32, total_length, buffer);
+        if (errmsg)
+          break;
+      }
+      break;
+    case MEP_OPERAND_IVC2RM :
+      errmsg = insert_normal (cd, fields->f_ivc2_crm, 0, 0, 4, 4, 32, total_length, buffer);
+      break;
     case MEP_OPERAND_LO :
       break;
     case MEP_OPERAND_LP :
@@ -908,12 +1043,32 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_SIMM16 :
       errmsg = insert_normal (cd, fields->f_16s16, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
       break;
+    case MEP_OPERAND_SIMM16P0 :
+      {
+{
+  FLD (f_ivc2_8u0) = ((((unsigned int) (FLD (f_ivc2_simm16p0)) >> (8))) & (255));
+  FLD (f_ivc2_8u20) = ((FLD (f_ivc2_simm16p0)) & (255));
+}
+        errmsg = insert_normal (cd, fields->f_ivc2_8u0, 0, 0, 0, 8, 32, total_length, buffer);
+        if (errmsg)
+          break;
+        errmsg = insert_normal (cd, fields->f_ivc2_8u20, 0, 0, 20, 8, 32, total_length, buffer);
+        if (errmsg)
+          break;
+      }
+      break;
     case MEP_OPERAND_SIMM6 :
       errmsg = insert_normal (cd, fields->f_6s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 6, 32, total_length, buffer);
       break;
     case MEP_OPERAND_SIMM8 :
       errmsg = insert_normal (cd, fields->f_8s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
       break;
+    case MEP_OPERAND_SIMM8P0 :
+      errmsg = insert_normal (cd, fields->f_ivc2_8s0, 0|(1<<CGEN_IFLD_SIGNED), 0, 0, 8, 32, total_length, buffer);
+      break;
+    case MEP_OPERAND_SIMM8P4 :
+      errmsg = insert_normal (cd, fields->f_ivc2_8s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 32, total_length, buffer);
+      break;
     case MEP_OPERAND_SP :
       break;
     case MEP_OPERAND_SPR :
@@ -1158,6 +1313,24 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
   FLD (f_crnx) = ((((FLD (f_crnx_hi)) << (4))) | (FLD (f_crnx_lo)));
       }
       break;
+    case MEP_OPERAND_CROC :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 5, 32, total_length, pc, & fields->f_ivc2_5u7);
+      break;
+    case MEP_OPERAND_CROP :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 5, 32, total_length, pc, & fields->f_ivc2_5u23);
+      break;
+    case MEP_OPERAND_CRPC :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 26, 5, 32, total_length, pc, & fields->f_ivc2_5u26);
+      break;
+    case MEP_OPERAND_CRPP :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 5, 32, total_length, pc, & fields->f_ivc2_5u18);
+      break;
+    case MEP_OPERAND_CRQC :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 5, 32, total_length, pc, & fields->f_ivc2_5u21);
+      break;
+    case MEP_OPERAND_CRQP :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 5, 32, total_length, pc, & fields->f_ivc2_5u13);
+      break;
     case MEP_OPERAND_CSRN :
       {
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_csrn_hi);
@@ -1186,6 +1359,110 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
       break;
     case MEP_OPERAND_HI :
       break;
+    case MEP_OPERAND_IMM16P0 :
+      {
+        length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 8, 32, total_length, pc, & fields->f_ivc2_8u0);
+        if (length <= 0) break;
+        length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 8, 32, total_length, pc, & fields->f_ivc2_8u20);
+        if (length <= 0) break;
+{
+  FLD (f_ivc2_imm16p0) = ((FLD (f_ivc2_8u20)) | (((FLD (f_ivc2_8u0)) << (8))));
+}
+      }
+      break;
+    case MEP_OPERAND_IMM3P12 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_ivc2_3u12);
+      break;
+    case MEP_OPERAND_IMM3P25 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 3, 32, total_length, pc, & fields->f_ivc2_3u25);
+      break;
+    case MEP_OPERAND_IMM3P4 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 3, 32, total_length, pc, & fields->f_ivc2_3u4);
+      break;
+    case MEP_OPERAND_IMM3P5 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_ivc2_3u5);
+      break;
+    case MEP_OPERAND_IMM3P9 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_ivc2_3u9);
+      break;
+    case MEP_OPERAND_IMM4P10 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 4, 32, total_length, pc, & fields->f_ivc2_4u10);
+      break;
+    case MEP_OPERAND_IMM4P4 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_ivc2_4u4);
+      break;
+    case MEP_OPERAND_IMM4P8 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_ivc2_4u8);
+      break;
+    case MEP_OPERAND_IMM5P23 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 5, 32, total_length, pc, & fields->f_ivc2_5u23);
+      break;
+    case MEP_OPERAND_IMM5P3 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 3, 5, 32, total_length, pc, & fields->f_ivc2_5u3);
+      break;
+    case MEP_OPERAND_IMM5P7 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 5, 32, total_length, pc, & fields->f_ivc2_5u7);
+      break;
+    case MEP_OPERAND_IMM5P8 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 5, 32, total_length, pc, & fields->f_ivc2_5u8);
+      break;
+    case MEP_OPERAND_IMM6P2 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 6, 32, total_length, pc, & fields->f_ivc2_6u2);
+      break;
+    case MEP_OPERAND_IMM6P6 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 6, 32, total_length, pc, & fields->f_ivc2_6u6);
+      break;
+    case MEP_OPERAND_IMM8P0 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 8, 32, total_length, pc, & fields->f_ivc2_8u0);
+      break;
+    case MEP_OPERAND_IMM8P20 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 8, 32, total_length, pc, & fields->f_ivc2_8u20);
+      break;
+    case MEP_OPERAND_IMM8P4 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 8, 32, total_length, pc, & fields->f_ivc2_8u4);
+      break;
+    case MEP_OPERAND_IVC_X_0_2 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 2, 32, total_length, pc, & fields->f_ivc2_2u0);
+      break;
+    case MEP_OPERAND_IVC_X_0_3 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 3, 32, total_length, pc, & fields->f_ivc2_3u0);
+      break;
+    case MEP_OPERAND_IVC_X_0_4 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 4, 32, total_length, pc, & fields->f_ivc2_4u0);
+      break;
+    case MEP_OPERAND_IVC_X_0_5 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 5, 32, total_length, pc, & fields->f_ivc2_5u0);
+      break;
+    case MEP_OPERAND_IVC_X_6_1 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 1, 32, total_length, pc, & fields->f_ivc2_1u6);
+      break;
+    case MEP_OPERAND_IVC_X_6_2 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 2, 32, total_length, pc, & fields->f_ivc2_2u6);
+      break;
+    case MEP_OPERAND_IVC_X_6_3 :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 3, 32, total_length, pc, & fields->f_ivc2_3u6);
+      break;
+    case MEP_OPERAND_IVC2CCRN :
+      {
+        length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 2, 32, total_length, pc, & fields->f_ivc2_ccrn_h2);
+        if (length <= 0) break;
+        length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 4, 32, total_length, pc, & fields->f_ivc2_ccrn_lo);
+        if (length <= 0) break;
+  FLD (f_ivc2_ccrn) = ((((FLD (f_ivc2_ccrn_h2)) << (4))) | (FLD (f_ivc2_ccrn_lo)));
+      }
+      break;
+    case MEP_OPERAND_IVC2CRN :
+      {
+        length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 1, 32, total_length, pc, & fields->f_ivc2_ccrn_h1);
+        if (length <= 0) break;
+        length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 4, 32, total_length, pc, & fields->f_ivc2_ccrn_lo);
+        if (length <= 0) break;
+  FLD (f_ivc2_crnx) = ((((FLD (f_ivc2_ccrn_h1)) << (4))) | (FLD (f_ivc2_ccrn_lo)));
+      }
+      break;
+    case MEP_OPERAND_IVC2RM :
+      length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_ivc2_crm);
+      break;
     case MEP_OPERAND_LO :
       break;
     case MEP_OPERAND_LP :
@@ -1312,12 +1589,29 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_SIMM16 :
       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & fields->f_16s16);
       break;
+    case MEP_OPERAND_SIMM16P0 :
+      {
+        length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 8, 32, total_length, pc, & fields->f_ivc2_8u0);
+        if (length <= 0) break;
+        length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 8, 32, total_length, pc, & fields->f_ivc2_8u20);
+        if (length <= 0) break;
+{
+  FLD (f_ivc2_simm16p0) = ((FLD (f_ivc2_8u20)) | (((FLD (f_ivc2_8u0)) << (8))));
+}
+      }
+      break;
     case MEP_OPERAND_SIMM6 :
       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 6, 32, total_length, pc, & fields->f_6s8);
       break;
     case MEP_OPERAND_SIMM8 :
       length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_8s8);
       break;
+    case MEP_OPERAND_SIMM8P0 :
+      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 0, 8, 32, total_length, pc, & fields->f_ivc2_8s0);
+      break;
+    case MEP_OPERAND_SIMM8P4 :
+      length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 32, total_length, pc, & fields->f_ivc2_8s4);
+      break;
     case MEP_OPERAND_SP :
       break;
     case MEP_OPERAND_SPR :
@@ -1480,6 +1774,24 @@ mep_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_CRNX64 :
       value = fields->f_crnx;
       break;
+    case MEP_OPERAND_CROC :
+      value = fields->f_ivc2_5u7;
+      break;
+    case MEP_OPERAND_CROP :
+      value = fields->f_ivc2_5u23;
+      break;
+    case MEP_OPERAND_CRPC :
+      value = fields->f_ivc2_5u26;
+      break;
+    case MEP_OPERAND_CRPP :
+      value = fields->f_ivc2_5u18;
+      break;
+    case MEP_OPERAND_CRQC :
+      value = fields->f_ivc2_5u21;
+      break;
+    case MEP_OPERAND_CRQP :
+      value = fields->f_ivc2_5u13;
+      break;
     case MEP_OPERAND_CSRN :
       value = fields->f_csrn;
       break;
@@ -1501,6 +1813,90 @@ mep_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_HI :
       value = 0;
       break;
+    case MEP_OPERAND_IMM16P0 :
+      value = fields->f_ivc2_imm16p0;
+      break;
+    case MEP_OPERAND_IMM3P12 :
+      value = fields->f_ivc2_3u12;
+      break;
+    case MEP_OPERAND_IMM3P25 :
+      value = fields->f_ivc2_3u25;
+      break;
+    case MEP_OPERAND_IMM3P4 :
+      value = fields->f_ivc2_3u4;
+      break;
+    case MEP_OPERAND_IMM3P5 :
+      value = fields->f_ivc2_3u5;
+      break;
+    case MEP_OPERAND_IMM3P9 :
+      value = fields->f_ivc2_3u9;
+      break;
+    case MEP_OPERAND_IMM4P10 :
+      value = fields->f_ivc2_4u10;
+      break;
+    case MEP_OPERAND_IMM4P4 :
+      value = fields->f_ivc2_4u4;
+      break;
+    case MEP_OPERAND_IMM4P8 :
+      value = fields->f_ivc2_4u8;
+      break;
+    case MEP_OPERAND_IMM5P23 :
+      value = fields->f_ivc2_5u23;
+      break;
+    case MEP_OPERAND_IMM5P3 :
+      value = fields->f_ivc2_5u3;
+      break;
+    case MEP_OPERAND_IMM5P7 :
+      value = fields->f_ivc2_5u7;
+      break;
+    case MEP_OPERAND_IMM5P8 :
+      value = fields->f_ivc2_5u8;
+      break;
+    case MEP_OPERAND_IMM6P2 :
+      value = fields->f_ivc2_6u2;
+      break;
+    case MEP_OPERAND_IMM6P6 :
+      value = fields->f_ivc2_6u6;
+      break;
+    case MEP_OPERAND_IMM8P0 :
+      value = fields->f_ivc2_8u0;
+      break;
+    case MEP_OPERAND_IMM8P20 :
+      value = fields->f_ivc2_8u20;
+      break;
+    case MEP_OPERAND_IMM8P4 :
+      value = fields->f_ivc2_8u4;
+      break;
+    case MEP_OPERAND_IVC_X_0_2 :
+      value = fields->f_ivc2_2u0;
+      break;
+    case MEP_OPERAND_IVC_X_0_3 :
+      value = fields->f_ivc2_3u0;
+      break;
+    case MEP_OPERAND_IVC_X_0_4 :
+      value = fields->f_ivc2_4u0;
+      break;
+    case MEP_OPERAND_IVC_X_0_5 :
+      value = fields->f_ivc2_5u0;
+      break;
+    case MEP_OPERAND_IVC_X_6_1 :
+      value = fields->f_ivc2_1u6;
+      break;
+    case MEP_OPERAND_IVC_X_6_2 :
+      value = fields->f_ivc2_2u6;
+      break;
+    case MEP_OPERAND_IVC_X_6_3 :
+      value = fields->f_ivc2_3u6;
+      break;
+    case MEP_OPERAND_IVC2CCRN :
+      value = fields->f_ivc2_ccrn;
+      break;
+    case MEP_OPERAND_IVC2CRN :
+      value = fields->f_ivc2_crnx;
+      break;
+    case MEP_OPERAND_IVC2RM :
+      value = fields->f_ivc2_crm;
+      break;
     case MEP_OPERAND_LO :
       value = 0;
       break;
@@ -1612,12 +2008,21 @@ mep_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_SIMM16 :
       value = fields->f_16s16;
       break;
+    case MEP_OPERAND_SIMM16P0 :
+      value = fields->f_ivc2_simm16p0;
+      break;
     case MEP_OPERAND_SIMM6 :
       value = fields->f_6s8;
       break;
     case MEP_OPERAND_SIMM8 :
       value = fields->f_8s8;
       break;
+    case MEP_OPERAND_SIMM8P0 :
+      value = fields->f_ivc2_8s0;
+      break;
+    case MEP_OPERAND_SIMM8P4 :
+      value = fields->f_ivc2_8s4;
+      break;
     case MEP_OPERAND_SP :
       value = 0;
       break;
@@ -1746,6 +2151,24 @@ mep_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_CRNX64 :
       value = fields->f_crnx;
       break;
+    case MEP_OPERAND_CROC :
+      value = fields->f_ivc2_5u7;
+      break;
+    case MEP_OPERAND_CROP :
+      value = fields->f_ivc2_5u23;
+      break;
+    case MEP_OPERAND_CRPC :
+      value = fields->f_ivc2_5u26;
+      break;
+    case MEP_OPERAND_CRPP :
+      value = fields->f_ivc2_5u18;
+      break;
+    case MEP_OPERAND_CRQC :
+      value = fields->f_ivc2_5u21;
+      break;
+    case MEP_OPERAND_CRQP :
+      value = fields->f_ivc2_5u13;
+      break;
     case MEP_OPERAND_CSRN :
       value = fields->f_csrn;
       break;
@@ -1767,6 +2190,90 @@ mep_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_HI :
       value = 0;
       break;
+    case MEP_OPERAND_IMM16P0 :
+      value = fields->f_ivc2_imm16p0;
+      break;
+    case MEP_OPERAND_IMM3P12 :
+      value = fields->f_ivc2_3u12;
+      break;
+    case MEP_OPERAND_IMM3P25 :
+      value = fields->f_ivc2_3u25;
+      break;
+    case MEP_OPERAND_IMM3P4 :
+      value = fields->f_ivc2_3u4;
+      break;
+    case MEP_OPERAND_IMM3P5 :
+      value = fields->f_ivc2_3u5;
+      break;
+    case MEP_OPERAND_IMM3P9 :
+      value = fields->f_ivc2_3u9;
+      break;
+    case MEP_OPERAND_IMM4P10 :
+      value = fields->f_ivc2_4u10;
+      break;
+    case MEP_OPERAND_IMM4P4 :
+      value = fields->f_ivc2_4u4;
+      break;
+    case MEP_OPERAND_IMM4P8 :
+      value = fields->f_ivc2_4u8;
+      break;
+    case MEP_OPERAND_IMM5P23 :
+      value = fields->f_ivc2_5u23;
+      break;
+    case MEP_OPERAND_IMM5P3 :
+      value = fields->f_ivc2_5u3;
+      break;
+    case MEP_OPERAND_IMM5P7 :
+      value = fields->f_ivc2_5u7;
+      break;
+    case MEP_OPERAND_IMM5P8 :
+      value = fields->f_ivc2_5u8;
+      break;
+    case MEP_OPERAND_IMM6P2 :
+      value = fields->f_ivc2_6u2;
+      break;
+    case MEP_OPERAND_IMM6P6 :
+      value = fields->f_ivc2_6u6;
+      break;
+    case MEP_OPERAND_IMM8P0 :
+      value = fields->f_ivc2_8u0;
+      break;
+    case MEP_OPERAND_IMM8P20 :
+      value = fields->f_ivc2_8u20;
+      break;
+    case MEP_OPERAND_IMM8P4 :
+      value = fields->f_ivc2_8u4;
+      break;
+    case MEP_OPERAND_IVC_X_0_2 :
+      value = fields->f_ivc2_2u0;
+      break;
+    case MEP_OPERAND_IVC_X_0_3 :
+      value = fields->f_ivc2_3u0;
+      break;
+    case MEP_OPERAND_IVC_X_0_4 :
+      value = fields->f_ivc2_4u0;
+      break;
+    case MEP_OPERAND_IVC_X_0_5 :
+      value = fields->f_ivc2_5u0;
+      break;
+    case MEP_OPERAND_IVC_X_6_1 :
+      value = fields->f_ivc2_1u6;
+      break;
+    case MEP_OPERAND_IVC_X_6_2 :
+      value = fields->f_ivc2_2u6;
+      break;
+    case MEP_OPERAND_IVC_X_6_3 :
+      value = fields->f_ivc2_3u6;
+      break;
+    case MEP_OPERAND_IVC2CCRN :
+      value = fields->f_ivc2_ccrn;
+      break;
+    case MEP_OPERAND_IVC2CRN :
+      value = fields->f_ivc2_crnx;
+      break;
+    case MEP_OPERAND_IVC2RM :
+      value = fields->f_ivc2_crm;
+      break;
     case MEP_OPERAND_LO :
       value = 0;
       break;
@@ -1878,12 +2385,21 @@ mep_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_SIMM16 :
       value = fields->f_16s16;
       break;
+    case MEP_OPERAND_SIMM16P0 :
+      value = fields->f_ivc2_simm16p0;
+      break;
     case MEP_OPERAND_SIMM6 :
       value = fields->f_6s8;
       break;
     case MEP_OPERAND_SIMM8 :
       value = fields->f_8s8;
       break;
+    case MEP_OPERAND_SIMM8P0 :
+      value = fields->f_ivc2_8s0;
+      break;
+    case MEP_OPERAND_SIMM8P4 :
+      value = fields->f_ivc2_8s4;
+      break;
     case MEP_OPERAND_SP :
       value = 0;
       break;
@@ -2018,6 +2534,24 @@ mep_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_CRNX64 :
       fields->f_crnx = value;
       break;
+    case MEP_OPERAND_CROC :
+      fields->f_ivc2_5u7 = value;
+      break;
+    case MEP_OPERAND_CROP :
+      fields->f_ivc2_5u23 = value;
+      break;
+    case MEP_OPERAND_CRPC :
+      fields->f_ivc2_5u26 = value;
+      break;
+    case MEP_OPERAND_CRPP :
+      fields->f_ivc2_5u18 = value;
+      break;
+    case MEP_OPERAND_CRQC :
+      fields->f_ivc2_5u21 = value;
+      break;
+    case MEP_OPERAND_CRQP :
+      fields->f_ivc2_5u13 = value;
+      break;
     case MEP_OPERAND_CSRN :
       fields->f_csrn = value;
       break;
@@ -2034,6 +2568,90 @@ mep_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
       break;
     case MEP_OPERAND_HI :
       break;
+    case MEP_OPERAND_IMM16P0 :
+      fields->f_ivc2_imm16p0 = value;
+      break;
+    case MEP_OPERAND_IMM3P12 :
+      fields->f_ivc2_3u12 = value;
+      break;
+    case MEP_OPERAND_IMM3P25 :
+      fields->f_ivc2_3u25 = value;
+      break;
+    case MEP_OPERAND_IMM3P4 :
+      fields->f_ivc2_3u4 = value;
+      break;
+    case MEP_OPERAND_IMM3P5 :
+      fields->f_ivc2_3u5 = value;
+      break;
+    case MEP_OPERAND_IMM3P9 :
+      fields->f_ivc2_3u9 = value;
+      break;
+    case MEP_OPERAND_IMM4P10 :
+      fields->f_ivc2_4u10 = value;
+      break;
+    case MEP_OPERAND_IMM4P4 :
+      fields->f_ivc2_4u4 = value;
+      break;
+    case MEP_OPERAND_IMM4P8 :
+      fields->f_ivc2_4u8 = value;
+      break;
+    case MEP_OPERAND_IMM5P23 :
+      fields->f_ivc2_5u23 = value;
+      break;
+    case MEP_OPERAND_IMM5P3 :
+      fields->f_ivc2_5u3 = value;
+      break;
+    case MEP_OPERAND_IMM5P7 :
+      fields->f_ivc2_5u7 = value;
+      break;
+    case MEP_OPERAND_IMM5P8 :
+      fields->f_ivc2_5u8 = value;
+      break;
+    case MEP_OPERAND_IMM6P2 :
+      fields->f_ivc2_6u2 = value;
+      break;
+    case MEP_OPERAND_IMM6P6 :
+      fields->f_ivc2_6u6 = value;
+      break;
+    case MEP_OPERAND_IMM8P0 :
+      fields->f_ivc2_8u0 = value;
+      break;
+    case MEP_OPERAND_IMM8P20 :
+      fields->f_ivc2_8u20 = value;
+      break;
+    case MEP_OPERAND_IMM8P4 :
+      fields->f_ivc2_8u4 = value;
+      break;
+    case MEP_OPERAND_IVC_X_0_2 :
+      fields->f_ivc2_2u0 = value;
+      break;
+    case MEP_OPERAND_IVC_X_0_3 :
+      fields->f_ivc2_3u0 = value;
+      break;
+    case MEP_OPERAND_IVC_X_0_4 :
+      fields->f_ivc2_4u0 = value;
+      break;
+    case MEP_OPERAND_IVC_X_0_5 :
+      fields->f_ivc2_5u0 = value;
+      break;
+    case MEP_OPERAND_IVC_X_6_1 :
+      fields->f_ivc2_1u6 = value;
+      break;
+    case MEP_OPERAND_IVC_X_6_2 :
+      fields->f_ivc2_2u6 = value;
+      break;
+    case MEP_OPERAND_IVC_X_6_3 :
+      fields->f_ivc2_3u6 = value;
+      break;
+    case MEP_OPERAND_IVC2CCRN :
+      fields->f_ivc2_ccrn = value;
+      break;
+    case MEP_OPERAND_IVC2CRN :
+      fields->f_ivc2_crnx = value;
+      break;
+    case MEP_OPERAND_IVC2RM :
+      fields->f_ivc2_crm = value;
+      break;
     case MEP_OPERAND_LO :
       break;
     case MEP_OPERAND_LP :
@@ -2133,12 +2751,21 @@ mep_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_SIMM16 :
       fields->f_16s16 = value;
       break;
+    case MEP_OPERAND_SIMM16P0 :
+      fields->f_ivc2_simm16p0 = value;
+      break;
     case MEP_OPERAND_SIMM6 :
       fields->f_6s8 = value;
       break;
     case MEP_OPERAND_SIMM8 :
       fields->f_8s8 = value;
       break;
+    case MEP_OPERAND_SIMM8P0 :
+      fields->f_ivc2_8s0 = value;
+      break;
+    case MEP_OPERAND_SIMM8P4 :
+      fields->f_ivc2_8s4 = value;
+      break;
     case MEP_OPERAND_SP :
       break;
     case MEP_OPERAND_SPR :
@@ -2258,6 +2885,24 @@ mep_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_CRNX64 :
       fields->f_crnx = value;
       break;
+    case MEP_OPERAND_CROC :
+      fields->f_ivc2_5u7 = value;
+      break;
+    case MEP_OPERAND_CROP :
+      fields->f_ivc2_5u23 = value;
+      break;
+    case MEP_OPERAND_CRPC :
+      fields->f_ivc2_5u26 = value;
+      break;
+    case MEP_OPERAND_CRPP :
+      fields->f_ivc2_5u18 = value;
+      break;
+    case MEP_OPERAND_CRQC :
+      fields->f_ivc2_5u21 = value;
+      break;
+    case MEP_OPERAND_CRQP :
+      fields->f_ivc2_5u13 = value;
+      break;
     case MEP_OPERAND_CSRN :
       fields->f_csrn = value;
       break;
@@ -2274,6 +2919,90 @@ mep_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
       break;
     case MEP_OPERAND_HI :
       break;
+    case MEP_OPERAND_IMM16P0 :
+      fields->f_ivc2_imm16p0 = value;
+      break;
+    case MEP_OPERAND_IMM3P12 :
+      fields->f_ivc2_3u12 = value;
+      break;
+    case MEP_OPERAND_IMM3P25 :
+      fields->f_ivc2_3u25 = value;
+      break;
+    case MEP_OPERAND_IMM3P4 :
+      fields->f_ivc2_3u4 = value;
+      break;
+    case MEP_OPERAND_IMM3P5 :
+      fields->f_ivc2_3u5 = value;
+      break;
+    case MEP_OPERAND_IMM3P9 :
+      fields->f_ivc2_3u9 = value;
+      break;
+    case MEP_OPERAND_IMM4P10 :
+      fields->f_ivc2_4u10 = value;
+      break;
+    case MEP_OPERAND_IMM4P4 :
+      fields->f_ivc2_4u4 = value;
+      break;
+    case MEP_OPERAND_IMM4P8 :
+      fields->f_ivc2_4u8 = value;
+      break;
+    case MEP_OPERAND_IMM5P23 :
+      fields->f_ivc2_5u23 = value;
+      break;
+    case MEP_OPERAND_IMM5P3 :
+      fields->f_ivc2_5u3 = value;
+      break;
+    case MEP_OPERAND_IMM5P7 :
+      fields->f_ivc2_5u7 = value;
+      break;
+    case MEP_OPERAND_IMM5P8 :
+      fields->f_ivc2_5u8 = value;
+      break;
+    case MEP_OPERAND_IMM6P2 :
+      fields->f_ivc2_6u2 = value;
+      break;
+    case MEP_OPERAND_IMM6P6 :
+      fields->f_ivc2_6u6 = value;
+      break;
+    case MEP_OPERAND_IMM8P0 :
+      fields->f_ivc2_8u0 = value;
+      break;
+    case MEP_OPERAND_IMM8P20 :
+      fields->f_ivc2_8u20 = value;
+      break;
+    case MEP_OPERAND_IMM8P4 :
+      fields->f_ivc2_8u4 = value;
+      break;
+    case MEP_OPERAND_IVC_X_0_2 :
+      fields->f_ivc2_2u0 = value;
+      break;
+    case MEP_OPERAND_IVC_X_0_3 :
+      fields->f_ivc2_3u0 = value;
+      break;
+    case MEP_OPERAND_IVC_X_0_4 :
+      fields->f_ivc2_4u0 = value;
+      break;
+    case MEP_OPERAND_IVC_X_0_5 :
+      fields->f_ivc2_5u0 = value;
+      break;
+    case MEP_OPERAND_IVC_X_6_1 :
+      fields->f_ivc2_1u6 = value;
+      break;
+    case MEP_OPERAND_IVC_X_6_2 :
+      fields->f_ivc2_2u6 = value;
+      break;
+    case MEP_OPERAND_IVC_X_6_3 :
+      fields->f_ivc2_3u6 = value;
+      break;
+    case MEP_OPERAND_IVC2CCRN :
+      fields->f_ivc2_ccrn = value;
+      break;
+    case MEP_OPERAND_IVC2CRN :
+      fields->f_ivc2_crnx = value;
+      break;
+    case MEP_OPERAND_IVC2RM :
+      fields->f_ivc2_crm = value;
+      break;
     case MEP_OPERAND_LO :
       break;
     case MEP_OPERAND_LP :
@@ -2373,12 +3102,21 @@ mep_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
     case MEP_OPERAND_SIMM16 :
       fields->f_16s16 = value;
       break;
+    case MEP_OPERAND_SIMM16P0 :
+      fields->f_ivc2_simm16p0 = value;
+      break;
     case MEP_OPERAND_SIMM6 :
       fields->f_6s8 = value;
       break;
     case MEP_OPERAND_SIMM8 :
       fields->f_8s8 = value;
       break;
+    case MEP_OPERAND_SIMM8P0 :
+      fields->f_ivc2_8s0 = value;
+      break;
+    case MEP_OPERAND_SIMM8P4 :
+      fields->f_ivc2_8s4 = value;
+      break;
     case MEP_OPERAND_SP :
       break;
     case MEP_OPERAND_SPR :

diff --git a/opcodes/mep-opc.c b/opcodes/mep-opc.c
index e2711e7..6aa36a5 100644 (file)
--- a/opcodes/mep-opc.c
+++ b/opcodes/mep-opc.c
@@ -57,6 +57,10 @@ init_mep_all_cop_isas_mask (void)
     return;
   cgen_bitset_init (& mep_all_cop_isas_mask, ISA_MAX);
   /* begin-all-cop-isas */
+  cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP1_16);
+  cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP1_32);
+  cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP1_48);
+  cgen_bitset_add (& mep_all_cop_isas_mask, ISA_EXT_COP1_64);
   /* end-all-cop-isas */
 }
 
@@ -89,8 +93,10 @@ mep_config_map_struct mep_config_map[] =
   /* config-map-start */
   /* Default entry: mep core only, all options enabled. */
   { "", 0, EF_MEP_CPU_C5, 1, 0, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x0"}, {1,"\x80"}, OPTION_MASK },
-  { "default", CONFIG_DEFAULT, EF_MEP_CPU_C5, 0, 0, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\x0" }, { 1, "\xc0" },
+  { "default", CONFIG_DEFAULT, EF_MEP_COP_IVC2 | EF_MEP_CPU_C5, 0, 64, { 1, "\x20" }, { 1, "\x10" }, { 1, "\x8" }, { 1, "\x4" }, { 1, "\x3c" }, { 1, "\xc0" },
          0
+       | (1 << CGEN_INSN_OPTIONAL_CP_INSN)
+       | (1 << CGEN_INSN_OPTIONAL_CP64_INSN)
        | (1 << CGEN_INSN_OPTIONAL_MUL_INSN)
        | (1 << CGEN_INSN_OPTIONAL_DIV_INSN)
        | (1 << CGEN_INSN_OPTIONAL_BIT_INSN)
@@ -428,6 +434,138 @@ static const CGEN_IFMT ifmt_sim_syscall ATTRIBUTE_UNUSED = {
   16, 16, 0xf8ef, { { F (F_MAJOR) }, { F (F_4) }, { F (F_CALLNUM) }, { F (F_8) }, { F (F_9) }, { F (F_10) }, { F (F_SUB4) }, { 0 } }
 };
 
+static const CGEN_IFMT ifmt_cmov_crn_rm ATTRIBUTE_UNUSED = {
+  32, 32, 0xf00ffff7, { { F (F_MAJOR) }, { F (F_CRNX) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_IVC2_4U16) }, { F (F_IVC2_4U20) }, { F (F_IVC2_4U24) }, { F (F_29) }, { F (F_30) }, { F (F_31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cmovc_ccrn_rm ATTRIBUTE_UNUSED = {
+  32, 32, 0xf00ffff3, { { F (F_MAJOR) }, { F (F_CCRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_IVC2_4U16) }, { F (F_IVC2_4U20) }, { F (F_IVC2_4U24) }, { F (F_30) }, { F (F_31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cmov_crn_rm_p0 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfff7ff, { { F (F_IVC2_CRNX) }, { F (F_IVC2_CRM) }, { F (F_IVC2_CMOV1) }, { F (F_21) }, { F (F_IVC2_CMOV2) }, { F (F_IVC2_CMOV3) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cmovc_ccrn_rm_p0 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfff3ff, { { F (F_IVC2_CCRN) }, { F (F_IVC2_CRM) }, { F (F_IVC2_CMOV1) }, { F (F_IVC2_CMOV2) }, { F (F_IVC2_CMOV3) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpadd3_b_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfe0ff801, { { F (F_MAJOR) }, { F (F_IVC2_3U4) }, { F (F_IVC2_5U7) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpfsftbi_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf00ff801, { { F (F_MAJOR) }, { F (F_IVC2_3U4) }, { F (F_IVC2_5U7) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpmovfrcsar0_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfe0fffff, { { F (F_MAJOR) }, { F (F_IVC2_3U4) }, { F (F_IVC2_5U7) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpmovtocsar0_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfffff83f, { { F (F_MAJOR) }, { F (F_IVC2_3U4) }, { F (F_IVC2_5U7) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpmov_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfe0ff83f, { { F (F_MAJOR) }, { F (F_IVC2_3U4) }, { F (F_IVC2_5U7) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpcmpeqz_b_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfffff801, { { F (F_MAJOR) }, { F (F_IVC2_3U4) }, { F (F_IVC2_5U7) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpsrli3_b_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfc0ff801, { { F (F_MAJOR) }, { F (F_IVC2_2U4) }, { F (F_IVC2_3U6) }, { F (F_IVC2_3U9) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpsrli3_h_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfc0ff801, { { F (F_MAJOR) }, { F (F_IVC2_2U4) }, { F (F_IVC2_2U6) }, { F (F_IVC2_4U8) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpsrli3_w_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfc0ff801, { { F (F_MAJOR) }, { F (F_IVC2_2U4) }, { F (F_IVC2_1U6) }, { F (F_IVC2_5U7) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cdsrli3_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfc0ff801, { { F (F_MAJOR) }, { F (F_IVC2_2U4) }, { F (F_IVC2_6U6) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpmovi_b_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf00ff83f, { { F (F_MAJOR) }, { F (F_IVC2_8S4) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpmoviu_h_C3 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf00ff83f, { { F (F_MAJOR) }, { F (F_IVC2_8U4) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpsrlia1_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfc0fffff, { { F (F_MAJOR) }, { F (F_IVC2_2U4) }, { F (F_IVC2_1U6) }, { F (F_IVC2_5U7) }, { F (F_SUB4) }, { F (F_IVC2_5U16) }, { F (F_IVC2_5U21) }, { F (F_IVC2_5U26) }, { F (F_IVC2_1U31) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_c0nop_P0_P0S ATTRIBUTE_UNUSED = {
+  32, 32, 0xffffffff, { { F (F_IVC2_8U0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpadd3_b_P0S_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfff8000f, { { F (F_IVC2_8U0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpmov_P0S_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfff83e0f, { { F (F_IVC2_8U0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpccadd_b_P0S_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfff83fff, { { F (F_IVC2_8U0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpmovfrcsar0_P0S_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfffffe0f, { { F (F_IVC2_8U0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpcmpeqz_b_P0S_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xfff801ff, { { F (F_IVC2_8U0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpsrlia0_P0S ATTRIBUTE_UNUSED = {
+  32, 32, 0xfffffe0f, { { F (F_IVC2_8U0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpfsftbi_P0_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf8000f, { { F (F_IVC2_5U0) }, { F (F_IVC2_3U5) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpsrli3_b_P0_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf83e0f, { { F (F_IVC2_5U0) }, { F (F_IVC2_3U5) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpsrli3_h_P0_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf83e0f, { { F (F_IVC2_4U0) }, { F (F_IVC2_4U4) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpsrli3_w_P0_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf83e0f, { { F (F_IVC2_3U0) }, { F (F_IVC2_5U3) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cdsrli3_P0_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf83e0f, { { F (F_IVC2_2U0) }, { F (F_IVC2_6U2) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpmovi_h_P0_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf8300f, { { F (F_IVC2_SIMM16P0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_2U18) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpmoviu_w_P0_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf8300f, { { F (F_IVC2_IMM16P0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_2U18) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpfmulia1s0u_b_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf801ff, { { F (F_IVC2_8S0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_5U23) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
+static const CGEN_IFMT ifmt_cpfmulia1u_b_P1 ATTRIBUTE_UNUSED = {
+  32, 32, 0xf8018f, { { F (F_IVC2_8S0) }, { F (F_IVC2_5U8) }, { F (F_IVC2_5U13) }, { F (F_IVC2_5U18) }, { F (F_IVC2_2U23) }, { F (F_IVC2_3U25) }, { F (F_IVC2_4U28) }, { 0 } }
+};
+
 #undef F
 
 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
@@ -1663,7 +1801,7 @@ static const CGEN_OPCODE mep_cgen_insn_opcode_table[MAX_INSNS] =
     { { MNEM, ' ', OP (PCREL24A2), 0 } },
     & ifmt_bsr24, { 0xd80b0000 }
   },
-/* --unused-- */
+/* --syscall-- */
   {
     { 0, 0, 0, 0 },
     { { MNEM, 0 } },
@@ -1801,6 +1939,4128 @@ static const CGEN_OPCODE mep_cgen_insn_opcode_table[MAX_INSNS] =
     { { MNEM, 0 } },
     & ifmt_mov, { 0xf008 }
   },
+/* cmov $crnx64,$rm */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRNX64), ',', OP (RM), 0 } },
+    & ifmt_cmov_crn_rm, { 0xf007f000 }
+  },
+/* cmov $rm,$crnx64 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (RM), ',', OP (CRNX64), 0 } },
+    & ifmt_cmov_crn_rm, { 0xf007f001 }
+  },
+/* cmovc $ccrn,$rm */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CCRN), ',', OP (RM), 0 } },
+    & ifmt_cmovc_ccrn_rm, { 0xf007f002 }
+  },
+/* cmovc $rm,$ccrn */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (RM), ',', OP (CCRN), 0 } },
+    & ifmt_cmovc_ccrn_rm, { 0xf007f003 }
+  },
+/* cmovh $crnx64,$rm */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRNX64), ',', OP (RM), 0 } },
+    & ifmt_cmov_crn_rm, { 0xf007f100 }
+  },
+/* cmovh $rm,$crnx64 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (RM), ',', OP (CRNX64), 0 } },
+    & ifmt_cmov_crn_rm, { 0xf007f101 }
+  },
+/* cmov $ivc2crn,$ivc2rm */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IVC2CRN), ',', OP (IVC2RM), 0 } },
+    & ifmt_cmov_crn_rm_p0, { 0xf00000 }
+  },
+/* cmov $ivc2rm,$ivc2crn */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IVC2RM), ',', OP (IVC2CRN), 0 } },
+    & ifmt_cmov_crn_rm_p0, { 0xf00100 }
+  },
+/* cmovc $ivc2ccrn,$ivc2rm */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IVC2CCRN), ',', OP (IVC2RM), 0 } },
+    & ifmt_cmovc_ccrn_rm_p0, { 0xf00200 }
+  },
+/* cmovc $ivc2rm,$ivc2ccrn */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IVC2RM), ',', OP (IVC2CCRN), 0 } },
+    & ifmt_cmovc_ccrn_rm_p0, { 0xf00300 }
+  },
+/* cmovh $ivc2crn,$ivc2rm */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IVC2CRN), ',', OP (IVC2RM), 0 } },
+    & ifmt_cmov_crn_rm_p0, { 0xf10000 }
+  },
+/* cmovh $ivc2rm,$ivc2crn */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IVC2RM), ',', OP (IVC2CRN), 0 } },
+    & ifmt_cmov_crn_rm_p0, { 0xf10100 }
+  },
+/* cpadd3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0070000 }
+  },
+/* cpadd3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2070000 }
+  },
+/* cpadd3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4070000 }
+  },
+/* cdadd3 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6070000 }
+  },
+/* cpsub3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8070000 }
+  },
+/* cpsub3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa070000 }
+  },
+/* cpsub3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfc070000 }
+  },
+/* cdsub3 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfe070000 }
+  },
+/* cpand3 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0070800 }
+  },
+/* cpor3 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2070800 }
+  },
+/* cpnor3 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4070800 }
+  },
+/* cpxor3 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6070800 }
+  },
+/* cpsel $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8070800 }
+  },
+/* cpfsftbi $croc,$crqc,$crpc,$imm3p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), ',', OP (IMM3P4), 0 } },
+    & ifmt_cpfsftbi_C3, { 0xf007e800 }
+  },
+/* cpfsftbs0 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfc070800 }
+  },
+/* cpfsftbs1 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfe070800 }
+  },
+/* cpunpacku.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0071000 }
+  },
+/* cpunpacku.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2071000 }
+  },
+/* cpunpacku.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4071000 }
+  },
+/* cpunpackl.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8071000 }
+  },
+/* cpunpackl.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa071000 }
+  },
+/* cpunpackl.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfc071000 }
+  },
+/* cppacku.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8071800 }
+  },
+/* cppack.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa071800 }
+  },
+/* cppack.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfe071800 }
+  },
+/* cpsrl3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0072000 }
+  },
+/* cpssrl3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2072000 }
+  },
+/* cpsrl3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4072000 }
+  },
+/* cpssrl3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6072000 }
+  },
+/* cpsrl3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8072000 }
+  },
+/* cpssrl3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa072000 }
+  },
+/* cdsrl3 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfc072000 }
+  },
+/* cpsra3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0072800 }
+  },
+/* cpssra3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2072800 }
+  },
+/* cpsra3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4072800 }
+  },
+/* cpssra3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6072800 }
+  },
+/* cpsra3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8072800 }
+  },
+/* cpssra3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa072800 }
+  },
+/* cdsra3 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfc072800 }
+  },
+/* cpsll3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0073000 }
+  },
+/* cpssll3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2073000 }
+  },
+/* cpsll3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4073000 }
+  },
+/* cpssll3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6073000 }
+  },
+/* cpsll3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8073000 }
+  },
+/* cpssll3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa073000 }
+  },
+/* cdsll3 $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfc073000 }
+  },
+/* cpsla3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4073800 }
+  },
+/* cpsla3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8073800 }
+  },
+/* cpsadd3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4074000 }
+  },
+/* cpsadd3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6074000 }
+  },
+/* cpssub3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfc074000 }
+  },
+/* cpssub3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfe074000 }
+  },
+/* cpextuaddu3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0074800 }
+  },
+/* cpextuadd3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2074800 }
+  },
+/* cpextladdu3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4074800 }
+  },
+/* cpextladd3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6074800 }
+  },
+/* cpextusubu3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8074800 }
+  },
+/* cpextusub3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa074800 }
+  },
+/* cpextlsubu3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfc074800 }
+  },
+/* cpextlsub3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfe074800 }
+  },
+/* cpaveu3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0075000 }
+  },
+/* cpave3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2075000 }
+  },
+/* cpave3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4075000 }
+  },
+/* cpave3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6075000 }
+  },
+/* cpaddsru3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8075000 }
+  },
+/* cpaddsr3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa075000 }
+  },
+/* cpaddsr3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfc075000 }
+  },
+/* cpaddsr3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfe075000 }
+  },
+/* cpabsu3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0075800 }
+  },
+/* cpabs3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2075800 }
+  },
+/* cpabs3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf4075800 }
+  },
+/* cpmaxu3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0076000 }
+  },
+/* cpmax3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2076000 }
+  },
+/* cpmax3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6076000 }
+  },
+/* cpmaxu3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8076000 }
+  },
+/* cpmax3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa076000 }
+  },
+/* cpminu3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf0076800 }
+  },
+/* cpmin3.b $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf2076800 }
+  },
+/* cpmin3.h $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf6076800 }
+  },
+/* cpminu3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xf8076800 }
+  },
+/* cpmin3.w $croc,$crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpadd3_b_C3, { 0xfa076800 }
+  },
+/* cpmovfrcsar0 $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0078000 }
+  },
+/* cpmovfrcsar1 $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf007801e }
+  },
+/* cpmovfrcc $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0078002 }
+  },
+/* cpmovtocsar0 $crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), 0 } },
+    & ifmt_cpmovtocsar0_C3, { 0xf0078020 }
+  },
+/* cpmovtocsar1 $crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), 0 } },
+    & ifmt_cpmovtocsar0_C3, { 0xf007803e }
+  },
+/* cpmovtocc $crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), 0 } },
+    & ifmt_cpmovtocsar0_C3, { 0xf0078022 }
+  },
+/* cpmov $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078800 }
+  },
+/* cpabsz.b $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078802 }
+  },
+/* cpabsz.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078804 }
+  },
+/* cpabsz.w $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078806 }
+  },
+/* cpldz.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078808 }
+  },
+/* cpldz.w $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007880a }
+  },
+/* cpnorm.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007880c }
+  },
+/* cpnorm.w $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007880e }
+  },
+/* cphaddu.b $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078810 }
+  },
+/* cphadd.b $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078812 }
+  },
+/* cphadd.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078814 }
+  },
+/* cphadd.w $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078816 }
+  },
+/* cpccadd.b $crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078818 }
+  },
+/* cpbcast.b $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007881a }
+  },
+/* cpbcast.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007881c }
+  },
+/* cpbcast.w $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007881e }
+  },
+/* cpextuu.b $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078820 }
+  },
+/* cpextu.b $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078822 }
+  },
+/* cpextuu.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078824 }
+  },
+/* cpextu.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078826 }
+  },
+/* cpextlu.b $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078828 }
+  },
+/* cpextl.b $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007882a }
+  },
+/* cpextlu.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007882c }
+  },
+/* cpextl.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007882e }
+  },
+/* cpcastub.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078830 }
+  },
+/* cpcastb.h $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078832 }
+  },
+/* cpcastub.w $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078838 }
+  },
+/* cpcastb.w $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007883a }
+  },
+/* cpcastuh.w $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007883c }
+  },
+/* cpcasth.w $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf007883e }
+  },
+/* cdcastuw $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078834 }
+  },
+/* cdcastw $croc,$crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), ',', OP (CRQC), 0 } },
+    & ifmt_cpmov_C3, { 0xf0078836 }
+  },
+/* cpcmpeqz.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0079000 }
+  },
+/* cpcmpeq.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0179000 }
+  },
+/* cpcmpeq.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0379000 }
+  },
+/* cpcmpeq.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0579000 }
+  },
+/* cpcmpne.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0979000 }
+  },
+/* cpcmpne.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0b79000 }
+  },
+/* cpcmpne.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0d79000 }
+  },
+/* cpcmpgtu.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1079000 }
+  },
+/* cpcmpgt.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1179000 }
+  },
+/* cpcmpgt.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1379000 }
+  },
+/* cpcmpgtu.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1479000 }
+  },
+/* cpcmpgt.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1579000 }
+  },
+/* cpcmpgeu.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1879000 }
+  },
+/* cpcmpge.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1979000 }
+  },
+/* cpcmpge.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1b79000 }
+  },
+/* cpcmpgeu.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1c79000 }
+  },
+/* cpcmpge.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1d79000 }
+  },
+/* cpacmpeq.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf2179000 }
+  },
+/* cpacmpeq.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf2379000 }
+  },
+/* cpacmpeq.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf2579000 }
+  },
+/* cpacmpne.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf2979000 }
+  },
+/* cpacmpne.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf2b79000 }
+  },
+/* cpacmpne.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf2d79000 }
+  },
+/* cpacmpgtu.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3079000 }
+  },
+/* cpacmpgt.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3179000 }
+  },
+/* cpacmpgt.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3379000 }
+  },
+/* cpacmpgtu.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3479000 }
+  },
+/* cpacmpgt.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3579000 }
+  },
+/* cpacmpgeu.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3879000 }
+  },
+/* cpacmpge.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3979000 }
+  },
+/* cpacmpge.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3b79000 }
+  },
+/* cpacmpgeu.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3c79000 }
+  },
+/* cpacmpge.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3d79000 }
+  },
+/* cpocmpeq.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4179000 }
+  },
+/* cpocmpeq.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4379000 }
+  },
+/* cpocmpeq.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4579000 }
+  },
+/* cpocmpne.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4979000 }
+  },
+/* cpocmpne.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4b79000 }
+  },
+/* cpocmpne.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4d79000 }
+  },
+/* cpocmpgtu.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5079000 }
+  },
+/* cpocmpgt.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5179000 }
+  },
+/* cpocmpgt.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5379000 }
+  },
+/* cpocmpgtu.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5479000 }
+  },
+/* cpocmpgt.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5579000 }
+  },
+/* cpocmpgeu.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5879000 }
+  },
+/* cpocmpge.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5979000 }
+  },
+/* cpocmpge.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5b79000 }
+  },
+/* cpocmpgeu.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5c79000 }
+  },
+/* cpocmpge.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf5d79000 }
+  },
+/* cpsrli3.b $crqc,$crpc,$imm3p9 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM3P9), 0 } },
+    & ifmt_cpsrli3_b_C3, { 0xf007a000 }
+  },
+/* cpsrli3.h $crqc,$crpc,$imm4p8 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM4P8), 0 } },
+    & ifmt_cpsrli3_h_C3, { 0xf407a000 }
+  },
+/* cpsrli3.w $crqc,$crpc,$imm5p7 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM5P7), 0 } },
+    & ifmt_cpsrli3_w_C3, { 0xf807a000 }
+  },
+/* cdsrli3 $crqc,$crpc,$imm6p6 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM6P6), 0 } },
+    & ifmt_cdsrli3_C3, { 0xfc07a000 }
+  },
+/* cpsrai3.b $crqc,$crpc,$imm3p9 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM3P9), 0 } },
+    & ifmt_cpsrli3_b_C3, { 0xf007a800 }
+  },
+/* cpsrai3.h $crqc,$crpc,$imm4p8 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM4P8), 0 } },
+    & ifmt_cpsrli3_h_C3, { 0xf407a800 }
+  },
+/* cpsrai3.w $crqc,$crpc,$imm5p7 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM5P7), 0 } },
+    & ifmt_cpsrli3_w_C3, { 0xf807a800 }
+  },
+/* cdsrai3 $crqc,$crpc,$imm6p6 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM6P6), 0 } },
+    & ifmt_cdsrli3_C3, { 0xfc07a800 }
+  },
+/* cpslli3.b $crqc,$crpc,$imm3p9 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM3P9), 0 } },
+    & ifmt_cpsrli3_b_C3, { 0xf007b000 }
+  },
+/* cpslli3.h $crqc,$crpc,$imm4p8 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM4P8), 0 } },
+    & ifmt_cpsrli3_h_C3, { 0xf407b000 }
+  },
+/* cpslli3.w $crqc,$crpc,$imm5p7 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM5P7), 0 } },
+    & ifmt_cpsrli3_w_C3, { 0xf807b000 }
+  },
+/* cdslli3 $crqc,$crpc,$imm6p6 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM6P6), 0 } },
+    & ifmt_cdsrli3_C3, { 0xfc07b000 }
+  },
+/* cpslai3.h $crqc,$crpc,$imm4p8 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM4P8), 0 } },
+    & ifmt_cpsrli3_h_C3, { 0xf407b800 }
+  },
+/* cpslai3.w $crqc,$crpc,$imm5p7 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM5P7), 0 } },
+    & ifmt_cpsrli3_w_C3, { 0xf807b800 }
+  },
+/* cpclipiu3.w $crqc,$crpc,$imm5p7 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM5P7), 0 } },
+    & ifmt_cpsrli3_w_C3, { 0xf007c000 }
+  },
+/* cpclipi3.w $crqc,$crpc,$imm5p7 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM5P7), 0 } },
+    & ifmt_cpsrli3_w_C3, { 0xf407c000 }
+  },
+/* cdclipiu3 $crqc,$crpc,$imm6p6 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM6P6), 0 } },
+    & ifmt_cdsrli3_C3, { 0xf807c000 }
+  },
+/* cdclipi3 $crqc,$crpc,$imm6p6 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), ',', OP (IMM6P6), 0 } },
+    & ifmt_cdsrli3_C3, { 0xfc07c000 }
+  },
+/* cpmovi.b $crqc,$simm8p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (SIMM8P4), 0 } },
+    & ifmt_cpmovi_b_C3, { 0xf007c800 }
+  },
+/* cpmoviu.h $crqc,$imm8p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (IMM8P4), 0 } },
+    & ifmt_cpmoviu_h_C3, { 0xf007c804 }
+  },
+/* cpmovi.h $crqc,$simm8p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (SIMM8P4), 0 } },
+    & ifmt_cpmovi_b_C3, { 0xf007c806 }
+  },
+/* cpmoviu.w $crqc,$imm8p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (IMM8P4), 0 } },
+    & ifmt_cpmoviu_h_C3, { 0xf007c808 }
+  },
+/* cpmovi.w $crqc,$simm8p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (SIMM8P4), 0 } },
+    & ifmt_cpmovi_b_C3, { 0xf007c80a }
+  },
+/* cdmoviu $crqc,$imm8p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (IMM8P4), 0 } },
+    & ifmt_cpmoviu_h_C3, { 0xf007c80c }
+  },
+/* cdmovi $crqc,$simm8p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (SIMM8P4), 0 } },
+    & ifmt_cpmovi_b_C3, { 0xf007c80e }
+  },
+/* cpadda1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0070001 }
+  },
+/* cpadda1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0170001 }
+  },
+/* cpaddua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0270001 }
+  },
+/* cpaddla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0370001 }
+  },
+/* cpaddaca1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0470001 }
+  },
+/* cpaddaca1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0570001 }
+  },
+/* cpaddacua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0670001 }
+  },
+/* cpaddacla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0770001 }
+  },
+/* cpsuba1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0870001 }
+  },
+/* cpsuba1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0970001 }
+  },
+/* cpsubua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0a70001 }
+  },
+/* cpsubla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0b70001 }
+  },
+/* cpsubaca1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0c70001 }
+  },
+/* cpsubaca1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0d70001 }
+  },
+/* cpsubacua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0e70001 }
+  },
+/* cpsubacla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0f70001 }
+  },
+/* cpabsa1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1070001 }
+  },
+/* cpabsa1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1170001 }
+  },
+/* cpabsua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1270001 }
+  },
+/* cpabsla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1370001 }
+  },
+/* cpsada1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1470001 }
+  },
+/* cpsada1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1570001 }
+  },
+/* cpsadua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1670001 }
+  },
+/* cpsadla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1770001 }
+  },
+/* cpseta1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf2070001 }
+  },
+/* cpsetua1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf2270001 }
+  },
+/* cpsetla1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf2370001 }
+  },
+/* cpmova1.b $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0072001 }
+  },
+/* cpmovua1.h $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0072005 }
+  },
+/* cpmovla1.h $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0072007 }
+  },
+/* cpmovuua1.w $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0072009 }
+  },
+/* cpmovula1.w $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf007200b }
+  },
+/* cpmovlua1.w $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf007200d }
+  },
+/* cpmovlla1.w $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf007200f }
+  },
+/* cppacka1u.b $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0072021 }
+  },
+/* cppacka1.b $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0072023 }
+  },
+/* cppackua1.h $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0072025 }
+  },
+/* cppackla1.h $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0072027 }
+  },
+/* cppackua1.w $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf0072029 }
+  },
+/* cppackla1.w $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf007202b }
+  },
+/* cpmovhua1.w $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf007202d }
+  },
+/* cpmovhla1.w $croc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROC), 0 } },
+    & ifmt_cpmovfrcsar0_C3, { 0xf007202f }
+  },
+/* cpsrla1 $crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), 0 } },
+    & ifmt_cpmovtocsar0_C3, { 0xf0071001 }
+  },
+/* cpsraa1 $crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), 0 } },
+    & ifmt_cpmovtocsar0_C3, { 0xf0171001 }
+  },
+/* cpslla1 $crqc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), 0 } },
+    & ifmt_cpmovtocsar0_C3, { 0xf0271001 }
+  },
+/* cpsrlia1 $imm5p7 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IMM5P7), 0 } },
+    & ifmt_cpsrlia1_P1, { 0xf0071801 }
+  },
+/* cpsraia1 $imm5p7 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IMM5P7), 0 } },
+    & ifmt_cpsrlia1_P1, { 0xf4071801 }
+  },
+/* cpsllia1 $imm5p7 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IMM5P7), 0 } },
+    & ifmt_cpsrlia1_P1, { 0xf8071801 }
+  },
+/* cpssqa1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0070801 }
+  },
+/* cpssqa1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0170801 }
+  },
+/* cpssda1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0470801 }
+  },
+/* cpssda1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0570801 }
+  },
+/* cpmula1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0870801 }
+  },
+/* cpmula1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0970801 }
+  },
+/* cpmulua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0a70801 }
+  },
+/* cpmulla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0b70801 }
+  },
+/* cpmulua1u.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0c70801 }
+  },
+/* cpmulla1u.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0d70801 }
+  },
+/* cpmulua1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0e70801 }
+  },
+/* cpmulla1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf0f70801 }
+  },
+/* cpmada1u.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1070801 }
+  },
+/* cpmada1.b $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1170801 }
+  },
+/* cpmadua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1270801 }
+  },
+/* cpmadla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1370801 }
+  },
+/* cpmadua1u.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1470801 }
+  },
+/* cpmadla1u.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1570801 }
+  },
+/* cpmadua1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1670801 }
+  },
+/* cpmadla1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1770801 }
+  },
+/* cpmsbua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1a70801 }
+  },
+/* cpmsbla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1b70801 }
+  },
+/* cpmsbua1u.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1c70801 }
+  },
+/* cpmsbla1u.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1d70801 }
+  },
+/* cpmsbua1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1e70801 }
+  },
+/* cpmsbla1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf1f70801 }
+  },
+/* cpsmadua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3270801 }
+  },
+/* cpsmadla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3370801 }
+  },
+/* cpsmadua1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3670801 }
+  },
+/* cpsmadla1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3770801 }
+  },
+/* cpsmsbua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3a70801 }
+  },
+/* cpsmsbla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3b70801 }
+  },
+/* cpsmsbua1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3e70801 }
+  },
+/* cpsmsbla1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf3f70801 }
+  },
+/* cpmulslua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4a70801 }
+  },
+/* cpmulslla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4b70801 }
+  },
+/* cpmulslua1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4e70801 }
+  },
+/* cpmulslla1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf4f70801 }
+  },
+/* cpsmadslua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf7270801 }
+  },
+/* cpsmadslla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf7370801 }
+  },
+/* cpsmadslua1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf7670801 }
+  },
+/* cpsmadslla1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf7770801 }
+  },
+/* cpsmsbslua1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf7a70801 }
+  },
+/* cpsmsbslla1.h $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf7b70801 }
+  },
+/* cpsmsbslua1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf7e70801 }
+  },
+/* cpsmsbslla1.w $crqc,$crpc */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQC), ',', OP (CRPC), 0 } },
+    & ifmt_cpcmpeqz_b_C3, { 0xf7f70801 }
+  },
+/* c0nop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, 0 } },
+    & ifmt_c0nop_P0_P0S, { 0x0 }
+  },
+/* cpadd3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x80000 }
+  },
+/* cpadd3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x100000 }
+  },
+/* cpadd3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x180000 }
+  },
+/* cpunpacku.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x280000 }
+  },
+/* cpunpacku.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x300000 }
+  },
+/* cpunpacku.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x380000 }
+  },
+/* cpunpackl.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x480000 }
+  },
+/* cpunpackl.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x500000 }
+  },
+/* cpunpackl.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x580000 }
+  },
+/* cpsel $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x200000 }
+  },
+/* cpfsftbs0 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x600000 }
+  },
+/* cpfsftbs1 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x680000 }
+  },
+/* cpmov $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x800000 }
+  },
+/* cpabsz.b $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x800200 }
+  },
+/* cpabsz.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x800400 }
+  },
+/* cpabsz.w $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x800600 }
+  },
+/* cpldz.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x800800 }
+  },
+/* cpldz.w $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x800a00 }
+  },
+/* cpnorm.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x800c00 }
+  },
+/* cpnorm.w $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x800e00 }
+  },
+/* cphaddu.b $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x801000 }
+  },
+/* cphadd.b $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x801200 }
+  },
+/* cphadd.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x801400 }
+  },
+/* cphadd.w $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x801600 }
+  },
+/* cpccadd.b $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0x801800 }
+  },
+/* cpbcast.b $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x801a00 }
+  },
+/* cpbcast.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x801c00 }
+  },
+/* cpbcast.w $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x801e00 }
+  },
+/* cpextuu.b $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x802000 }
+  },
+/* cpextu.b $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x802200 }
+  },
+/* cpextuu.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x802400 }
+  },
+/* cpextu.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x802600 }
+  },
+/* cpextlu.b $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x802800 }
+  },
+/* cpextl.b $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x802a00 }
+  },
+/* cpextlu.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x802c00 }
+  },
+/* cpextl.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x802e00 }
+  },
+/* cpcastub.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x803000 }
+  },
+/* cpcastb.h $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x803200 }
+  },
+/* cpcastub.w $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x803800 }
+  },
+/* cpcastb.w $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x803a00 }
+  },
+/* cpcastuh.w $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x803c00 }
+  },
+/* cpcasth.w $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x803e00 }
+  },
+/* cdcastuw $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x803400 }
+  },
+/* cdcastw $crop,$crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), 0 } },
+    & ifmt_cpmov_P0S_P1, { 0x803600 }
+  },
+/* cpmovfrcsar0 $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0x880000 }
+  },
+/* cpmovfrcsar1 $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0x881e00 }
+  },
+/* cpmovfrcc $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0x880200 }
+  },
+/* cpmovtocsar0 $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0x882000 }
+  },
+/* cpmovtocsar1 $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0x883e00 }
+  },
+/* cpmovtocc $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0x882200 }
+  },
+/* cpcmpeqz.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900000 }
+  },
+/* cpcmpeq.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900010 }
+  },
+/* cpcmpeq.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900030 }
+  },
+/* cpcmpeq.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900050 }
+  },
+/* cpcmpne.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900090 }
+  },
+/* cpcmpne.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9000b0 }
+  },
+/* cpcmpne.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9000d0 }
+  },
+/* cpcmpgtu.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900100 }
+  },
+/* cpcmpgt.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900110 }
+  },
+/* cpcmpgt.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900130 }
+  },
+/* cpcmpgtu.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900140 }
+  },
+/* cpcmpgt.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900150 }
+  },
+/* cpcmpgeu.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900180 }
+  },
+/* cpcmpge.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x900190 }
+  },
+/* cpcmpge.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9001b0 }
+  },
+/* cpcmpgeu.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9001c0 }
+  },
+/* cpcmpge.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9001d0 }
+  },
+/* cpadda0u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00000 }
+  },
+/* cpadda0.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00010 }
+  },
+/* cpaddua0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00020 }
+  },
+/* cpaddla0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00030 }
+  },
+/* cpaddaca0u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00040 }
+  },
+/* cpaddaca0.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00050 }
+  },
+/* cpaddacua0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00060 }
+  },
+/* cpaddacla0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00070 }
+  },
+/* cpsuba0u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00080 }
+  },
+/* cpsuba0.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00090 }
+  },
+/* cpsubua0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000a0 }
+  },
+/* cpsubla0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000b0 }
+  },
+/* cpsubaca0u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000c0 }
+  },
+/* cpsubaca0.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000d0 }
+  },
+/* cpsubacua0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000e0 }
+  },
+/* cpsubacla0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000f0 }
+  },
+/* cpabsa0u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00100 }
+  },
+/* cpabsa0.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00110 }
+  },
+/* cpabsua0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00120 }
+  },
+/* cpabsla0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00130 }
+  },
+/* cpsada0u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00140 }
+  },
+/* cpsada0.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00150 }
+  },
+/* cpsadua0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00160 }
+  },
+/* cpsadla0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00170 }
+  },
+/* cpseta0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc001b0 }
+  },
+/* cpsetua0.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc001c0 }
+  },
+/* cpsetla0.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc001d0 }
+  },
+/* cpmova0.b $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80200 }
+  },
+/* cpmovua0.h $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80400 }
+  },
+/* cpmovla0.h $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80600 }
+  },
+/* cpmovuua0.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80800 }
+  },
+/* cpmovula0.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80a00 }
+  },
+/* cpmovlua0.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80c00 }
+  },
+/* cpmovlla0.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80e00 }
+  },
+/* cppacka0u.b $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81000 }
+  },
+/* cppacka0.b $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81200 }
+  },
+/* cppackua0.h $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81400 }
+  },
+/* cppackla0.h $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81600 }
+  },
+/* cppackua0.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81800 }
+  },
+/* cppackla0.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81a00 }
+  },
+/* cpmovhua0.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81c00 }
+  },
+/* cpmovhla0.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81e00 }
+  },
+/* cpacsuma0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, 0 } },
+    & ifmt_c0nop_P0_P0S, { 0xc82000 }
+  },
+/* cpaccpa0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, 0 } },
+    & ifmt_c0nop_P0_P0S, { 0xc82200 }
+  },
+/* cpsrla0 $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0xc83000 }
+  },
+/* cpsraa0 $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0xc83200 }
+  },
+/* cpslla0 $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0xc83400 }
+  },
+/* cpsrlia0 $imm5p23 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IMM5P23), 0 } },
+    & ifmt_cpsrlia0_P0S, { 0xc83800 }
+  },
+/* cpsraia0 $imm5p23 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IMM5P23), 0 } },
+    & ifmt_cpsrlia0_P0S, { 0xc83a00 }
+  },
+/* cpsllia0 $imm5p23 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IMM5P23), 0 } },
+    & ifmt_cpsrlia0_P0S, { 0xc83c00 }
+  },
+/* cpfsftba0s0u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80000 }
+  },
+/* cpfsftba0s0.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80010 }
+  },
+/* cpfsftbua0s0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80020 }
+  },
+/* cpfsftbla0s0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80030 }
+  },
+/* cpfaca0s0u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80040 }
+  },
+/* cpfaca0s0.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80050 }
+  },
+/* cpfacua0s0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80060 }
+  },
+/* cpfacla0s0.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80070 }
+  },
+/* cpfsftba0s1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80080 }
+  },
+/* cpfsftba0s1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf80090 }
+  },
+/* cpfsftbua0s1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf800a0 }
+  },
+/* cpfsftbla0s1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf800b0 }
+  },
+/* cpfaca0s1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf800c0 }
+  },
+/* cpfaca0s1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf800d0 }
+  },
+/* cpfacua0s1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf800e0 }
+  },
+/* cpfacla0s1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf800f0 }
+  },
+/* cpfsftbi $crop,$crqp,$crpp,$imm3p5 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), ',', OP (IMM3P5), 0 } },
+    & ifmt_cpfsftbi_P0_P1, { 0x400000 }
+  },
+/* cpacmpeq.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980010 }
+  },
+/* cpacmpeq.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980030 }
+  },
+/* cpacmpeq.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980050 }
+  },
+/* cpacmpne.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980090 }
+  },
+/* cpacmpne.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9800b0 }
+  },
+/* cpacmpne.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9800d0 }
+  },
+/* cpacmpgtu.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980100 }
+  },
+/* cpacmpgt.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980110 }
+  },
+/* cpacmpgt.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980130 }
+  },
+/* cpacmpgtu.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980140 }
+  },
+/* cpacmpgt.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980150 }
+  },
+/* cpacmpgeu.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980180 }
+  },
+/* cpacmpge.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x980190 }
+  },
+/* cpacmpge.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9801b0 }
+  },
+/* cpacmpgeu.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9801c0 }
+  },
+/* cpacmpge.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x9801d0 }
+  },
+/* cpocmpeq.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980010 }
+  },
+/* cpocmpeq.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980030 }
+  },
+/* cpocmpeq.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980050 }
+  },
+/* cpocmpne.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980090 }
+  },
+/* cpocmpne.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x19800b0 }
+  },
+/* cpocmpne.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x19800d0 }
+  },
+/* cpocmpgtu.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980100 }
+  },
+/* cpocmpgt.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980110 }
+  },
+/* cpocmpgt.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980130 }
+  },
+/* cpocmpgtu.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980140 }
+  },
+/* cpocmpgt.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980150 }
+  },
+/* cpocmpgeu.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980180 }
+  },
+/* cpocmpge.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1980190 }
+  },
+/* cpocmpge.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x19801b0 }
+  },
+/* cpocmpgeu.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x19801c0 }
+  },
+/* cpocmpge.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x19801d0 }
+  },
+/* cdadd3 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x3a00000 }
+  },
+/* cpsub3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x4a00000 }
+  },
+/* cpsub3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x5a00000 }
+  },
+/* cpsub3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x6a00000 }
+  },
+/* cdsub3 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x7a00000 }
+  },
+/* cpsadd3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0xaa00000 }
+  },
+/* cpsadd3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0xba00000 }
+  },
+/* cpssub3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0xea00000 }
+  },
+/* cpssub3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0xfa00000 }
+  },
+/* cpextuaddu3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x10a00000 }
+  },
+/* cpextuadd3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x11a00000 }
+  },
+/* cpextladdu3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x12a00000 }
+  },
+/* cpextladd3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x13a00000 }
+  },
+/* cpextusubu3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x14a00000 }
+  },
+/* cpextusub3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x15a00000 }
+  },
+/* cpextlsubu3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x16a00000 }
+  },
+/* cpextlsub3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x17a00000 }
+  },
+/* cpaveu3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x18a00000 }
+  },
+/* cpave3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x19a00000 }
+  },
+/* cpave3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x1aa00000 }
+  },
+/* cpave3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x1ba00000 }
+  },
+/* cpaddsru3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x1ca00000 }
+  },
+/* cpaddsr3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x1da00000 }
+  },
+/* cpaddsr3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x1ea00000 }
+  },
+/* cpaddsr3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x1fa00000 }
+  },
+/* cpabsu3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x20a00000 }
+  },
+/* cpabs3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x21a00000 }
+  },
+/* cpabs3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x22a00000 }
+  },
+/* cpand3 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x24a00000 }
+  },
+/* cpor3 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x25a00000 }
+  },
+/* cpnor3 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x26a00000 }
+  },
+/* cpxor3 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x27a00000 }
+  },
+/* cppacku.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x2ca00000 }
+  },
+/* cppack.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x2da00000 }
+  },
+/* cppack.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x2fa00000 }
+  },
+/* cpmaxu3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x30a00000 }
+  },
+/* cpmax3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x31a00000 }
+  },
+/* cpmax3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x33a00000 }
+  },
+/* cpmaxu3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x34a00000 }
+  },
+/* cpmax3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x35a00000 }
+  },
+/* cpminu3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x38a00000 }
+  },
+/* cpmin3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x39a00000 }
+  },
+/* cpmin3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x3ba00000 }
+  },
+/* cpminu3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x3ca00000 }
+  },
+/* cpmin3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x3da00000 }
+  },
+/* cpsrl3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x40a00000 }
+  },
+/* cpssrl3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x41a00000 }
+  },
+/* cpsrl3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x42a00000 }
+  },
+/* cpssrl3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x43a00000 }
+  },
+/* cpsrl3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x44a00000 }
+  },
+/* cpssrl3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x45a00000 }
+  },
+/* cdsrl3 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x46a00000 }
+  },
+/* cpsra3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x48a00000 }
+  },
+/* cpssra3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x49a00000 }
+  },
+/* cpsra3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x4aa00000 }
+  },
+/* cpssra3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x4ba00000 }
+  },
+/* cpsra3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x4ca00000 }
+  },
+/* cpssra3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x4da00000 }
+  },
+/* cdsra3 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x4ea00000 }
+  },
+/* cpsll3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x50a00000 }
+  },
+/* cpssll3.b $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x51a00000 }
+  },
+/* cpsll3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x52a00000 }
+  },
+/* cpssll3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x53a00000 }
+  },
+/* cpsll3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x54a00000 }
+  },
+/* cpssll3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x55a00000 }
+  },
+/* cdsll3 $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x56a00000 }
+  },
+/* cpsla3.h $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x5aa00000 }
+  },
+/* cpsla3.w $crop,$crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpadd3_b_P0S_P1, { 0x5ca00000 }
+  },
+/* cpsrli3.b $crop,$crqp,$imm3p5 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM3P5), 0 } },
+    & ifmt_cpsrli3_b_P0_P1, { 0xa80000 }
+  },
+/* cpsrli3.h $crop,$crqp,$imm4p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM4P4), 0 } },
+    & ifmt_cpsrli3_h_P0_P1, { 0xa80200 }
+  },
+/* cpsrli3.w $crop,$crqp,$imm5p3 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM5P3), 0 } },
+    & ifmt_cpsrli3_w_P0_P1, { 0xa80400 }
+  },
+/* cdsrli3 $crop,$crqp,$imm6p2 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM6P2), 0 } },
+    & ifmt_cdsrli3_P0_P1, { 0xa80600 }
+  },
+/* cpsrai3.b $crop,$crqp,$imm3p5 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM3P5), 0 } },
+    & ifmt_cpsrli3_b_P0_P1, { 0xa80800 }
+  },
+/* cpsrai3.h $crop,$crqp,$imm4p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM4P4), 0 } },
+    & ifmt_cpsrli3_h_P0_P1, { 0xa80a00 }
+  },
+/* cpsrai3.w $crop,$crqp,$imm5p3 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM5P3), 0 } },
+    & ifmt_cpsrli3_w_P0_P1, { 0xa80c00 }
+  },
+/* cdsrai3 $crop,$crqp,$imm6p2 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM6P2), 0 } },
+    & ifmt_cdsrli3_P0_P1, { 0xa80e00 }
+  },
+/* cpslli3.b $crop,$crqp,$imm3p5 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM3P5), 0 } },
+    & ifmt_cpsrli3_b_P0_P1, { 0xa81000 }
+  },
+/* cpslli3.h $crop,$crqp,$imm4p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM4P4), 0 } },
+    & ifmt_cpsrli3_h_P0_P1, { 0xa81200 }
+  },
+/* cpslli3.w $crop,$crqp,$imm5p3 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM5P3), 0 } },
+    & ifmt_cpsrli3_w_P0_P1, { 0xa81400 }
+  },
+/* cdslli3 $crop,$crqp,$imm6p2 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM6P2), 0 } },
+    & ifmt_cdsrli3_P0_P1, { 0xa81600 }
+  },
+/* cpslai3.h $crop,$crqp,$imm4p4 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM4P4), 0 } },
+    & ifmt_cpsrli3_h_P0_P1, { 0xa81a00 }
+  },
+/* cpslai3.w $crop,$crqp,$imm5p3 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM5P3), 0 } },
+    & ifmt_cpsrli3_w_P0_P1, { 0xa81c00 }
+  },
+/* cpclipiu3.w $crop,$crqp,$imm5p3 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM5P3), 0 } },
+    & ifmt_cpsrli3_w_P0_P1, { 0xa82000 }
+  },
+/* cpclipi3.w $crop,$crqp,$imm5p3 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM5P3), 0 } },
+    & ifmt_cpsrli3_w_P0_P1, { 0xa82200 }
+  },
+/* cdclipiu3 $crop,$crqp,$imm6p2 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM6P2), 0 } },
+    & ifmt_cdsrli3_P0_P1, { 0xa82400 }
+  },
+/* cdclipi3 $crop,$crqp,$imm6p2 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), ',', OP (CRQP), ',', OP (IMM6P2), 0 } },
+    & ifmt_cdsrli3_P0_P1, { 0xa82600 }
+  },
+/* cpmovi.h $crqp,$simm16p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (SIMM16P0), 0 } },
+    & ifmt_cpmovi_h_P0_P1, { 0xb01000 }
+  },
+/* cpmoviu.w $crqp,$imm16p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (IMM16P0), 0 } },
+    & ifmt_cpmoviu_w_P0_P1, { 0xb80000 }
+  },
+/* cpmovi.w $crqp,$simm16p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (SIMM16P0), 0 } },
+    & ifmt_cpmovi_h_P0_P1, { 0xb81000 }
+  },
+/* cdmoviu $crqp,$imm16p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (IMM16P0), 0 } },
+    & ifmt_cpmoviu_w_P0_P1, { 0xb82000 }
+  },
+/* cdmovi $crqp,$simm16p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (SIMM16P0), 0 } },
+    & ifmt_cpmovi_h_P0_P1, { 0xb83000 }
+  },
+/* c1nop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, 0 } },
+    & ifmt_c0nop_P0_P0S, { 0x0 }
+  },
+/* cpadda1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00000 }
+  },
+/* cpadda1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00010 }
+  },
+/* cpaddua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00020 }
+  },
+/* cpaddla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00030 }
+  },
+/* cpaddaca1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00040 }
+  },
+/* cpaddaca1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00050 }
+  },
+/* cpaddacua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00060 }
+  },
+/* cpaddacla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00070 }
+  },
+/* cpsuba1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00080 }
+  },
+/* cpsuba1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00090 }
+  },
+/* cpsubua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000a0 }
+  },
+/* cpsubla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000b0 }
+  },
+/* cpsubaca1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000c0 }
+  },
+/* cpsubaca1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000d0 }
+  },
+/* cpsubacua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000e0 }
+  },
+/* cpsubacla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc000f0 }
+  },
+/* cpabsa1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00100 }
+  },
+/* cpabsa1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00110 }
+  },
+/* cpabsua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00120 }
+  },
+/* cpabsla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00130 }
+  },
+/* cpsada1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00140 }
+  },
+/* cpsada1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00150 }
+  },
+/* cpsadua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00160 }
+  },
+/* cpsadla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc00170 }
+  },
+/* cpseta1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc001b0 }
+  },
+/* cpsetua1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc001c0 }
+  },
+/* cpsetla1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xc001d0 }
+  },
+/* cpmova1.b $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80200 }
+  },
+/* cpmovua1.h $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80400 }
+  },
+/* cpmovla1.h $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80600 }
+  },
+/* cpmovuua1.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80800 }
+  },
+/* cpmovula1.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80a00 }
+  },
+/* cpmovlua1.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80c00 }
+  },
+/* cpmovlla1.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc80e00 }
+  },
+/* cppacka1u.b $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81000 }
+  },
+/* cppacka1.b $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81200 }
+  },
+/* cppackua1.h $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81400 }
+  },
+/* cppackla1.h $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81600 }
+  },
+/* cppackua1.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81800 }
+  },
+/* cppackla1.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81a00 }
+  },
+/* cpmovhua1.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81c00 }
+  },
+/* cpmovhla1.w $crop */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CROP), 0 } },
+    & ifmt_cpmovfrcsar0_P0S_P1, { 0xc81e00 }
+  },
+/* cpacsuma1 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, 0 } },
+    & ifmt_c0nop_P0_P0S, { 0xc82000 }
+  },
+/* cpaccpa1 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, 0 } },
+    & ifmt_c0nop_P0_P0S, { 0xc82200 }
+  },
+/* cpacswp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, 0 } },
+    & ifmt_c0nop_P0_P0S, { 0xc82400 }
+  },
+/* cpsrla1 $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0xc83000 }
+  },
+/* cpsraa1 $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0xc83200 }
+  },
+/* cpslla1 $crqp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), 0 } },
+    & ifmt_cpccadd_b_P0S_P1, { 0xc83400 }
+  },
+/* cpsrlia1 $imm5p23 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IMM5P23), 0 } },
+    & ifmt_cpsrlia0_P0S, { 0xc83800 }
+  },
+/* cpsraia1 $imm5p23 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IMM5P23), 0 } },
+    & ifmt_cpsrlia0_P0S, { 0xc83a00 }
+  },
+/* cpsllia1 $imm5p23 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (IMM5P23), 0 } },
+    & ifmt_cpsrlia0_P0S, { 0xc83c00 }
+  },
+/* cpfmulia1s0u.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80000 }
+  },
+/* cpfmulia1s0.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80010 }
+  },
+/* cpfmuliua1s0.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80020 }
+  },
+/* cpfmulila1s0.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80030 }
+  },
+/* cpfmadia1s0u.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80040 }
+  },
+/* cpfmadia1s0.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80050 }
+  },
+/* cpfmadiua1s0.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80060 }
+  },
+/* cpfmadila1s0.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80070 }
+  },
+/* cpfmulia1s1u.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80080 }
+  },
+/* cpfmulia1s1.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80090 }
+  },
+/* cpfmuliua1s1.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf800a0 }
+  },
+/* cpfmulila1s1.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf800b0 }
+  },
+/* cpfmadia1s1u.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf800c0 }
+  },
+/* cpfmadia1s1.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf800d0 }
+  },
+/* cpfmadiua1s1.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf800e0 }
+  },
+/* cpfmadila1s1.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf800f0 }
+  },
+/* cpamulia1u.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80100 }
+  },
+/* cpamulia1.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80110 }
+  },
+/* cpamuliua1.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80120 }
+  },
+/* cpamulila1.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80130 }
+  },
+/* cpamadia1u.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80140 }
+  },
+/* cpamadia1.b $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80150 }
+  },
+/* cpamadiua1.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80160 }
+  },
+/* cpamadila1.h $crqp,$crpp,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1s0u_b_P1, { 0xf80170 }
+  },
+/* cpfmulia1u.b $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (IMM3P25), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1u_b_P1, { 0xe00000 }
+  },
+/* cpfmulia1.b $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (IMM3P25), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1u_b_P1, { 0xe00080 }
+  },
+/* cpfmuliua1.h $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (IMM3P25), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1u_b_P1, { 0xe00100 }
+  },
+/* cpfmulila1.h $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (IMM3P25), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1u_b_P1, { 0xe00180 }
+  },
+/* cpfmadia1u.b $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (IMM3P25), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1u_b_P1, { 0xe80000 }
+  },
+/* cpfmadia1.b $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (IMM3P25), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1u_b_P1, { 0xe80080 }
+  },
+/* cpfmadiua1.h $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (IMM3P25), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1u_b_P1, { 0xe80100 }
+  },
+/* cpfmadila1.h $crqp,$crpp,$imm3p25,$simm8p0 */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), ',', OP (IMM3P25), ',', OP (SIMM8P0), 0 } },
+    & ifmt_cpfmulia1u_b_P1, { 0xe80180 }
+  },
+/* cpssqa1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00000 }
+  },
+/* cpssqa1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00010 }
+  },
+/* cpssda1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00040 }
+  },
+/* cpssda1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00050 }
+  },
+/* cpmula1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00080 }
+  },
+/* cpmula1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00090 }
+  },
+/* cpmulua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf000a0 }
+  },
+/* cpmulla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf000b0 }
+  },
+/* cpmulua1u.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf000c0 }
+  },
+/* cpmulla1u.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf000d0 }
+  },
+/* cpmulua1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf000e0 }
+  },
+/* cpmulla1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf000f0 }
+  },
+/* cpmada1u.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00100 }
+  },
+/* cpmada1.b $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00110 }
+  },
+/* cpmadua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00120 }
+  },
+/* cpmadla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00130 }
+  },
+/* cpmadua1u.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00140 }
+  },
+/* cpmadla1u.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00150 }
+  },
+/* cpmadua1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00160 }
+  },
+/* cpmadla1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf00170 }
+  },
+/* cpmsbua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf001a0 }
+  },
+/* cpmsbla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf001b0 }
+  },
+/* cpmsbua1u.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf001c0 }
+  },
+/* cpmsbla1u.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf001d0 }
+  },
+/* cpmsbua1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf001e0 }
+  },
+/* cpmsbla1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0xf001f0 }
+  },
+/* cpsmadua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1f00120 }
+  },
+/* cpsmadla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1f00130 }
+  },
+/* cpsmadua1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1f00160 }
+  },
+/* cpsmadla1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1f00170 }
+  },
+/* cpsmsbua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1f001a0 }
+  },
+/* cpsmsbla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1f001b0 }
+  },
+/* cpsmsbua1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1f001e0 }
+  },
+/* cpsmsbla1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x1f001f0 }
+  },
+/* cpmulslua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x2f000a0 }
+  },
+/* cpmulslla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x2f000b0 }
+  },
+/* cpmulslua1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x2f000e0 }
+  },
+/* cpmulslla1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x2f000f0 }
+  },
+/* cpsmadslua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x3f00120 }
+  },
+/* cpsmadslla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x3f00130 }
+  },
+/* cpsmadslua1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x3f00160 }
+  },
+/* cpsmadslla1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x3f00170 }
+  },
+/* cpsmsbslua1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x3f001a0 }
+  },
+/* cpsmsbslla1.h $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x3f001b0 }
+  },
+/* cpsmsbslua1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x3f001e0 }
+  },
+/* cpsmsbslla1.w $crqp,$crpp */
+  {
+    { 0, 0, 0, 0 },
+    { { MNEM, ' ', OP (CRQP), ',', OP (CRPP), 0 } },
+    & ifmt_cpcmpeqz_b_P0S_P1, { 0x3f001f0 }
+  },
 };
 
 #undef A
@@ -1891,67 +6151,67 @@ static const CGEN_IBASE mep_cgen_macro_insn_table[] =
 /* nop */
   {
     -1, "nop", "nop", 16,
-    { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sb $rnc,$zero($rma) */
   {
     -1, "sb16-0", "sb", 16,
-    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sh $rns,$zero($rma) */
   {
     -1, "sh16-0", "sh", 16,
-    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* sw $rnl,$zero($rma) */
   {
     -1, "sw16-0", "sw", 16,
-    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lb $rnc,$zero($rma) */
   {
     -1, "lb16-0", "lb", 16,
-    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lh $rns,$zero($rma) */
   {
     -1, "lh16-0", "lh", 16,
-    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lw $rnl,$zero($rma) */
   {
     -1, "lw16-0", "lw", 16,
-    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lbu $rnuc,$zero($rma) */
   {
     -1, "lbu16-0", "lbu", 16,
-    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lhu $rnus,$zero($rma) */
   {
     -1, "lhu16-0", "lhu", 16,
-    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* swcp $crn,$zero($rma) */
   {
     -1, "swcp16-0", "swcp", 16,
-    { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lwcp $crn,$zero($rma) */
   {
     -1, "lwcp16-0", "lwcp", 16,
-    { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* smcp $crn64,$zero($rma) */
   {
     -1, "smcp16-0", "smcp", 16,
-    { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 /* lmcp $crn64,$zero($rma) */
   {
     -1, "lmcp16-0", "lmcp", 16,
-    { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } } } }
+    { 0|A(NO_DIS)|A(OPTIONAL_CP64_INSN)|A(OPTIONAL_CP_INSN)|A(ALIAS), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xc0" } }, { { 0, 0 } }, { { CONFIG_NONE, 0 } }, { { (1<<SLOTS_CORE), 0 } } } }
   },
 };
 

diff --git a/opcodes/mep-opc.h b/opcodes/mep-opc.h
index 3e89249..f83d84f 100644 (file)
--- a/opcodes/mep-opc.h
+++ b/opcodes/mep-opc.h
@@ -71,6 +71,10 @@ extern CGEN_ATTR_VALUE_BITSET_TYPE mep_cop_isa  (void);
 #define MEP_COP_ISA    (mep_config_map[mep_config_index].cop_isa)
 #define MEP_CORE_ISA   (mep_config_map[mep_config_index].core_isa)
 
+/* begin-cop-ip-supported-defines */
+#define MEP_IVC2_SUPPORTED 1
+/* end-cop-ip-supported-defines */
+
 extern int mep_insn_supported_by_isa (const CGEN_INSN *, CGEN_ATTR_VALUE_BITSET_TYPE *);
 
 /* A mask for all ISAs executed by the core.  */
@@ -152,14 +156,186 @@ typedef enum cgen_insn_type {
  , MEP_INSN_RI_8, MEP_INSN_RI_9, MEP_INSN_RI_10, MEP_INSN_RI_11
  , MEP_INSN_RI_12, MEP_INSN_RI_13, MEP_INSN_RI_14, MEP_INSN_RI_15
  , MEP_INSN_RI_17, MEP_INSN_RI_20, MEP_INSN_RI_21, MEP_INSN_RI_22
- , MEP_INSN_RI_23, MEP_INSN_RI_26
+ , MEP_INSN_RI_23, MEP_INSN_RI_26, MEP_INSN_CMOV_CRN_RM, MEP_INSN_CMOV_RN_CRM
+ , MEP_INSN_CMOVC_CCRN_RM, MEP_INSN_CMOVC_RN_CCRM, MEP_INSN_CMOVH_CRN_RM, MEP_INSN_CMOVH_RN_CRM
+ , MEP_INSN_CMOV_CRN_RM_P0, MEP_INSN_CMOV_RN_CRM_P0, MEP_INSN_CMOVC_CCRN_RM_P0, MEP_INSN_CMOVC_RN_CCRM_P0
+ , MEP_INSN_CMOVH_CRN_RM_P0, MEP_INSN_CMOVH_RN_CRM_P0, MEP_INSN_CPADD3_B_C3, MEP_INSN_CPADD3_H_C3
+ , MEP_INSN_CPADD3_W_C3, MEP_INSN_CDADD3_C3, MEP_INSN_CPSUB3_B_C3, MEP_INSN_CPSUB3_H_C3
+ , MEP_INSN_CPSUB3_W_C3, MEP_INSN_CDSUB3_C3, MEP_INSN_CPAND3_C3, MEP_INSN_CPOR3_C3
+ , MEP_INSN_CPNOR3_C3, MEP_INSN_CPXOR3_C3, MEP_INSN_CPSEL_C3, MEP_INSN_CPFSFTBI_C3
+ , MEP_INSN_CPFSFTBS0_C3, MEP_INSN_CPFSFTBS1_C3, MEP_INSN_CPUNPACKU_B_C3, MEP_INSN_CPUNPACKU_H_C3
+ , MEP_INSN_CPUNPACKU_W_C3, MEP_INSN_CPUNPACKL_B_C3, MEP_INSN_CPUNPACKL_H_C3, MEP_INSN_CPUNPACKL_W_C3
+ , MEP_INSN_CPPACKU_B_C3, MEP_INSN_CPPACK_B_C3, MEP_INSN_CPPACK_H_C3, MEP_INSN_CPSRL3_B_C3
+ , MEP_INSN_CPSSRL3_B_C3, MEP_INSN_CPSRL3_H_C3, MEP_INSN_CPSSRL3_H_C3, MEP_INSN_CPSRL3_W_C3
+ , MEP_INSN_CPSSRL3_W_C3, MEP_INSN_CDSRL3_C3, MEP_INSN_CPSRA3_B_C3, MEP_INSN_CPSSRA3_B_C3
+ , MEP_INSN_CPSRA3_H_C3, MEP_INSN_CPSSRA3_H_C3, MEP_INSN_CPSRA3_W_C3, MEP_INSN_CPSSRA3_W_C3
+ , MEP_INSN_CDSRA3_C3, MEP_INSN_CPSLL3_B_C3, MEP_INSN_CPSSLL3_B_C3, MEP_INSN_CPSLL3_H_C3
+ , MEP_INSN_CPSSLL3_H_C3, MEP_INSN_CPSLL3_W_C3, MEP_INSN_CPSSLL3_W_C3, MEP_INSN_CDSLL3_C3
+ , MEP_INSN_CPSLA3_H_C3, MEP_INSN_CPSLA3_W_C3, MEP_INSN_CPSADD3_H_C3, MEP_INSN_CPSADD3_W_C3
+ , MEP_INSN_CPSSUB3_H_C3, MEP_INSN_CPSSUB3_W_C3, MEP_INSN_CPEXTUADDU3_B_C3, MEP_INSN_CPEXTUADD3_B_C3
+ , MEP_INSN_CPEXTLADDU3_B_C3, MEP_INSN_CPEXTLADD3_B_C3, MEP_INSN_CPEXTUSUBU3_B_C3, MEP_INSN_CPEXTUSUB3_B_C3
+ , MEP_INSN_CPEXTLSUBU3_B_C3, MEP_INSN_CPEXTLSUB3_B_C3, MEP_INSN_CPAVEU3_B_C3, MEP_INSN_CPAVE3_B_C3
+ , MEP_INSN_CPAVE3_H_C3, MEP_INSN_CPAVE3_W_C3, MEP_INSN_CPADDSRU3_B_C3, MEP_INSN_CPADDSR3_B_C3
+ , MEP_INSN_CPADDSR3_H_C3, MEP_INSN_CPADDSR3_W_C3, MEP_INSN_CPABSU3_B_C3, MEP_INSN_CPABS3_B_C3
+ , MEP_INSN_CPABS3_H_C3, MEP_INSN_CPMAXU3_B_C3, MEP_INSN_CPMAX3_B_C3, MEP_INSN_CPMAX3_H_C3
+ , MEP_INSN_CPMAXU3_W_C3, MEP_INSN_CPMAX3_W_C3, MEP_INSN_CPMINU3_B_C3, MEP_INSN_CPMIN3_B_C3
+ , MEP_INSN_CPMIN3_H_C3, MEP_INSN_CPMINU3_W_C3, MEP_INSN_CPMIN3_W_C3, MEP_INSN_CPMOVFRCSAR0_C3
+ , MEP_INSN_CPMOVFRCSAR1_C3, MEP_INSN_CPMOVFRCC_C3, MEP_INSN_CPMOVTOCSAR0_C3, MEP_INSN_CPMOVTOCSAR1_C3
+ , MEP_INSN_CPMOVTOCC_C3, MEP_INSN_CPMOV_C3, MEP_INSN_CPABSZ_B_C3, MEP_INSN_CPABSZ_H_C3
+ , MEP_INSN_CPABSZ_W_C3, MEP_INSN_CPLDZ_H_C3, MEP_INSN_CPLDZ_W_C3, MEP_INSN_CPNORM_H_C3
+ , MEP_INSN_CPNORM_W_C3, MEP_INSN_CPHADDU_B_C3, MEP_INSN_CPHADD_B_C3, MEP_INSN_CPHADD_H_C3
+ , MEP_INSN_CPHADD_W_C3, MEP_INSN_CPCCADD_B_C3, MEP_INSN_CPBCAST_B_C3, MEP_INSN_CPBCAST_H_C3
+ , MEP_INSN_CPBCAST_W_C3, MEP_INSN_CPEXTUU_B_C3, MEP_INSN_CPEXTU_B_C3, MEP_INSN_CPEXTUU_H_C3
+ , MEP_INSN_CPEXTU_H_C3, MEP_INSN_CPEXTLU_B_C3, MEP_INSN_CPEXTL_B_C3, MEP_INSN_CPEXTLU_H_C3
+ , MEP_INSN_CPEXTL_H_C3, MEP_INSN_CPCASTUB_H_C3, MEP_INSN_CPCASTB_H_C3, MEP_INSN_CPCASTUB_W_C3
+ , MEP_INSN_CPCASTB_W_C3, MEP_INSN_CPCASTUH_W_C3, MEP_INSN_CPCASTH_W_C3, MEP_INSN_CDCASTUW_C3
+ , MEP_INSN_CDCASTW_C3, MEP_INSN_CPCMPEQZ_B_C3, MEP_INSN_CPCMPEQ_B_C3, MEP_INSN_CPCMPEQ_H_C3
+ , MEP_INSN_CPCMPEQ_W_C3, MEP_INSN_CPCMPNE_B_C3, MEP_INSN_CPCMPNE_H_C3, MEP_INSN_CPCMPNE_W_C3
+ , MEP_INSN_CPCMPGTU_B_C3, MEP_INSN_CPCMPGT_B_C3, MEP_INSN_CPCMPGT_H_C3, MEP_INSN_CPCMPGTU_W_C3
+ , MEP_INSN_CPCMPGT_W_C3, MEP_INSN_CPCMPGEU_B_C3, MEP_INSN_CPCMPGE_B_C3, MEP_INSN_CPCMPGE_H_C3
+ , MEP_INSN_CPCMPGEU_W_C3, MEP_INSN_CPCMPGE_W_C3, MEP_INSN_CPACMPEQ_B_C3, MEP_INSN_CPACMPEQ_H_C3
+ , MEP_INSN_CPACMPEQ_W_C3, MEP_INSN_CPACMPNE_B_C3, MEP_INSN_CPACMPNE_H_C3, MEP_INSN_CPACMPNE_W_C3
+ , MEP_INSN_CPACMPGTU_B_C3, MEP_INSN_CPACMPGT_B_C3, MEP_INSN_CPACMPGT_H_C3, MEP_INSN_CPACMPGTU_W_C3
+ , MEP_INSN_CPACMPGT_W_C3, MEP_INSN_CPACMPGEU_B_C3, MEP_INSN_CPACMPGE_B_C3, MEP_INSN_CPACMPGE_H_C3
+ , MEP_INSN_CPACMPGEU_W_C3, MEP_INSN_CPACMPGE_W_C3, MEP_INSN_CPOCMPEQ_B_C3, MEP_INSN_CPOCMPEQ_H_C3
+ , MEP_INSN_CPOCMPEQ_W_C3, MEP_INSN_CPOCMPNE_B_C3, MEP_INSN_CPOCMPNE_H_C3, MEP_INSN_CPOCMPNE_W_C3
+ , MEP_INSN_CPOCMPGTU_B_C3, MEP_INSN_CPOCMPGT_B_C3, MEP_INSN_CPOCMPGT_H_C3, MEP_INSN_CPOCMPGTU_W_C3
+ , MEP_INSN_CPOCMPGT_W_C3, MEP_INSN_CPOCMPGEU_B_C3, MEP_INSN_CPOCMPGE_B_C3, MEP_INSN_CPOCMPGE_H_C3
+ , MEP_INSN_CPOCMPGEU_W_C3, MEP_INSN_CPOCMPGE_W_C3, MEP_INSN_CPSRLI3_B_C3, MEP_INSN_CPSRLI3_H_C3
+ , MEP_INSN_CPSRLI3_W_C3, MEP_INSN_CDSRLI3_C3, MEP_INSN_CPSRAI3_B_C3, MEP_INSN_CPSRAI3_H_C3
+ , MEP_INSN_CPSRAI3_W_C3, MEP_INSN_CDSRAI3_C3, MEP_INSN_CPSLLI3_B_C3, MEP_INSN_CPSLLI3_H_C3
+ , MEP_INSN_CPSLLI3_W_C3, MEP_INSN_CDSLLI3_C3, MEP_INSN_CPSLAI3_H_C3, MEP_INSN_CPSLAI3_W_C3
+ , MEP_INSN_CPCLIPIU3_W_C3, MEP_INSN_CPCLIPI3_W_C3, MEP_INSN_CDCLIPIU3_C3, MEP_INSN_CDCLIPI3_C3
+ , MEP_INSN_CPMOVI_B_C3, MEP_INSN_CPMOVIU_H_C3, MEP_INSN_CPMOVI_H_C3, MEP_INSN_CPMOVIU_W_C3
+ , MEP_INSN_CPMOVI_W_C3, MEP_INSN_CDMOVIU_C3, MEP_INSN_CDMOVI_C3, MEP_INSN_CPADDA1U_B_C3
+ , MEP_INSN_CPADDA1_B_C3, MEP_INSN_CPADDUA1_H_C3, MEP_INSN_CPADDLA1_H_C3, MEP_INSN_CPADDACA1U_B_C3
+ , MEP_INSN_CPADDACA1_B_C3, MEP_INSN_CPADDACUA1_H_C3, MEP_INSN_CPADDACLA1_H_C3, MEP_INSN_CPSUBA1U_B_C3
+ , MEP_INSN_CPSUBA1_B_C3, MEP_INSN_CPSUBUA1_H_C3, MEP_INSN_CPSUBLA1_H_C3, MEP_INSN_CPSUBACA1U_B_C3
+ , MEP_INSN_CPSUBACA1_B_C3, MEP_INSN_CPSUBACUA1_H_C3, MEP_INSN_CPSUBACLA1_H_C3, MEP_INSN_CPABSA1U_B_C3
+ , MEP_INSN_CPABSA1_B_C3, MEP_INSN_CPABSUA1_H_C3, MEP_INSN_CPABSLA1_H_C3, MEP_INSN_CPSADA1U_B_C3
+ , MEP_INSN_CPSADA1_B_C3, MEP_INSN_CPSADUA1_H_C3, MEP_INSN_CPSADLA1_H_C3, MEP_INSN_CPSETA1_H_C3
+ , MEP_INSN_CPSETUA1_W_C3, MEP_INSN_CPSETLA1_W_C3, MEP_INSN_CPMOVA1_B_C3, MEP_INSN_CPMOVUA1_H_C3
+ , MEP_INSN_CPMOVLA1_H_C3, MEP_INSN_CPMOVUUA1_W_C3, MEP_INSN_CPMOVULA1_W_C3, MEP_INSN_CPMOVLUA1_W_C3
+ , MEP_INSN_CPMOVLLA1_W_C3, MEP_INSN_CPPACKA1U_B_C3, MEP_INSN_CPPACKA1_B_C3, MEP_INSN_CPPACKUA1_H_C3
+ , MEP_INSN_CPPACKLA1_H_C3, MEP_INSN_CPPACKUA1_W_C3, MEP_INSN_CPPACKLA1_W_C3, MEP_INSN_CPMOVHUA1_W_C3
+ , MEP_INSN_CPMOVHLA1_W_C3, MEP_INSN_CPSRLA1_C3, MEP_INSN_CPSRAA1_C3, MEP_INSN_CPSLLA1_C3
+ , MEP_INSN_CPSRLIA1_P1, MEP_INSN_CPSRAIA1_P1, MEP_INSN_CPSLLIA1_P1, MEP_INSN_CPSSQA1U_B_C3
+ , MEP_INSN_CPSSQA1_B_C3, MEP_INSN_CPSSDA1U_B_C3, MEP_INSN_CPSSDA1_B_C3, MEP_INSN_CPMULA1U_B_C3
+ , MEP_INSN_CPMULA1_B_C3, MEP_INSN_CPMULUA1_H_C3, MEP_INSN_CPMULLA1_H_C3, MEP_INSN_CPMULUA1U_W_C3
+ , MEP_INSN_CPMULLA1U_W_C3, MEP_INSN_CPMULUA1_W_C3, MEP_INSN_CPMULLA1_W_C3, MEP_INSN_CPMADA1U_B_C3
+ , MEP_INSN_CPMADA1_B_C3, MEP_INSN_CPMADUA1_H_C3, MEP_INSN_CPMADLA1_H_C3, MEP_INSN_CPMADUA1U_W_C3
+ , MEP_INSN_CPMADLA1U_W_C3, MEP_INSN_CPMADUA1_W_C3, MEP_INSN_CPMADLA1_W_C3, MEP_INSN_CPMSBUA1_H_C3
+ , MEP_INSN_CPMSBLA1_H_C3, MEP_INSN_CPMSBUA1U_W_C3, MEP_INSN_CPMSBLA1U_W_C3, MEP_INSN_CPMSBUA1_W_C3
+ , MEP_INSN_CPMSBLA1_W_C3, MEP_INSN_CPSMADUA1_H_C3, MEP_INSN_CPSMADLA1_H_C3, MEP_INSN_CPSMADUA1_W_C3
+ , MEP_INSN_CPSMADLA1_W_C3, MEP_INSN_CPSMSBUA1_H_C3, MEP_INSN_CPSMSBLA1_H_C3, MEP_INSN_CPSMSBUA1_W_C3
+ , MEP_INSN_CPSMSBLA1_W_C3, MEP_INSN_CPMULSLUA1_H_C3, MEP_INSN_CPMULSLLA1_H_C3, MEP_INSN_CPMULSLUA1_W_C3
+ , MEP_INSN_CPMULSLLA1_W_C3, MEP_INSN_CPSMADSLUA1_H_C3, MEP_INSN_CPSMADSLLA1_H_C3, MEP_INSN_CPSMADSLUA1_W_C3
+ , MEP_INSN_CPSMADSLLA1_W_C3, MEP_INSN_CPSMSBSLUA1_H_C3, MEP_INSN_CPSMSBSLLA1_H_C3, MEP_INSN_CPSMSBSLUA1_W_C3
+ , MEP_INSN_CPSMSBSLLA1_W_C3, MEP_INSN_C0NOP_P0_P0S, MEP_INSN_CPADD3_B_P0S_P1, MEP_INSN_CPADD3_H_P0S_P1
+ , MEP_INSN_CPADD3_W_P0S_P1, MEP_INSN_CPUNPACKU_B_P0S_P1, MEP_INSN_CPUNPACKU_H_P0S_P1, MEP_INSN_CPUNPACKU_W_P0S_P1
+ , MEP_INSN_CPUNPACKL_B_P0S_P1, MEP_INSN_CPUNPACKL_H_P0S_P1, MEP_INSN_CPUNPACKL_W_P0S_P1, MEP_INSN_CPSEL_P0S_P1
+ , MEP_INSN_CPFSFTBS0_P0S_P1, MEP_INSN_CPFSFTBS1_P0S_P1, MEP_INSN_CPMOV_P0S_P1, MEP_INSN_CPABSZ_B_P0S_P1
+ , MEP_INSN_CPABSZ_H_P0S_P1, MEP_INSN_CPABSZ_W_P0S_P1, MEP_INSN_CPLDZ_H_P0S_P1, MEP_INSN_CPLDZ_W_P0S_P1
+ , MEP_INSN_CPNORM_H_P0S_P1, MEP_INSN_CPNORM_W_P0S_P1, MEP_INSN_CPHADDU_B_P0S_P1, MEP_INSN_CPHADD_B_P0S_P1
+ , MEP_INSN_CPHADD_H_P0S_P1, MEP_INSN_CPHADD_W_P0S_P1, MEP_INSN_CPCCADD_B_P0S_P1, MEP_INSN_CPBCAST_B_P0S_P1
+ , MEP_INSN_CPBCAST_H_P0S_P1, MEP_INSN_CPBCAST_W_P0S_P1, MEP_INSN_CPEXTUU_B_P0S_P1, MEP_INSN_CPEXTU_B_P0S_P1
+ , MEP_INSN_CPEXTUU_H_P0S_P1, MEP_INSN_CPEXTU_H_P0S_P1, MEP_INSN_CPEXTLU_B_P0S_P1, MEP_INSN_CPEXTL_B_P0S_P1
+ , MEP_INSN_CPEXTLU_H_P0S_P1, MEP_INSN_CPEXTL_H_P0S_P1, MEP_INSN_CPCASTUB_H_P0S_P1, MEP_INSN_CPCASTB_H_P0S_P1
+ , MEP_INSN_CPCASTUB_W_P0S_P1, MEP_INSN_CPCASTB_W_P0S_P1, MEP_INSN_CPCASTUH_W_P0S_P1, MEP_INSN_CPCASTH_W_P0S_P1
+ , MEP_INSN_CDCASTUW_P0S_P1, MEP_INSN_CDCASTW_P0S_P1, MEP_INSN_CPMOVFRCSAR0_P0S_P1, MEP_INSN_CPMOVFRCSAR1_P0S_P1
+ , MEP_INSN_CPMOVFRCC_P0S_P1, MEP_INSN_CPMOVTOCSAR0_P0S_P1, MEP_INSN_CPMOVTOCSAR1_P0S_P1, MEP_INSN_CPMOVTOCC_P0S_P1
+ , MEP_INSN_CPCMPEQZ_B_P0S_P1, MEP_INSN_CPCMPEQ_B_P0S_P1, MEP_INSN_CPCMPEQ_H_P0S_P1, MEP_INSN_CPCMPEQ_W_P0S_P1
+ , MEP_INSN_CPCMPNE_B_P0S_P1, MEP_INSN_CPCMPNE_H_P0S_P1, MEP_INSN_CPCMPNE_W_P0S_P1, MEP_INSN_CPCMPGTU_B_P0S_P1
+ , MEP_INSN_CPCMPGT_B_P0S_P1, MEP_INSN_CPCMPGT_H_P0S_P1, MEP_INSN_CPCMPGTU_W_P0S_P1, MEP_INSN_CPCMPGT_W_P0S_P1
+ , MEP_INSN_CPCMPGEU_B_P0S_P1, MEP_INSN_CPCMPGE_B_P0S_P1, MEP_INSN_CPCMPGE_H_P0S_P1, MEP_INSN_CPCMPGEU_W_P0S_P1
+ , MEP_INSN_CPCMPGE_W_P0S_P1, MEP_INSN_CPADDA0U_B_P0S, MEP_INSN_CPADDA0_B_P0S, MEP_INSN_CPADDUA0_H_P0S
+ , MEP_INSN_CPADDLA0_H_P0S, MEP_INSN_CPADDACA0U_B_P0S, MEP_INSN_CPADDACA0_B_P0S, MEP_INSN_CPADDACUA0_H_P0S
+ , MEP_INSN_CPADDACLA0_H_P0S, MEP_INSN_CPSUBA0U_B_P0S, MEP_INSN_CPSUBA0_B_P0S, MEP_INSN_CPSUBUA0_H_P0S
+ , MEP_INSN_CPSUBLA0_H_P0S, MEP_INSN_CPSUBACA0U_B_P0S, MEP_INSN_CPSUBACA0_B_P0S, MEP_INSN_CPSUBACUA0_H_P0S
+ , MEP_INSN_CPSUBACLA0_H_P0S, MEP_INSN_CPABSA0U_B_P0S, MEP_INSN_CPABSA0_B_P0S, MEP_INSN_CPABSUA0_H_P0S
+ , MEP_INSN_CPABSLA0_H_P0S, MEP_INSN_CPSADA0U_B_P0S, MEP_INSN_CPSADA0_B_P0S, MEP_INSN_CPSADUA0_H_P0S
+ , MEP_INSN_CPSADLA0_H_P0S, MEP_INSN_CPSETA0_H_P0S, MEP_INSN_CPSETUA0_W_P0S, MEP_INSN_CPSETLA0_W_P0S
+ , MEP_INSN_CPMOVA0_B_P0S, MEP_INSN_CPMOVUA0_H_P0S, MEP_INSN_CPMOVLA0_H_P0S, MEP_INSN_CPMOVUUA0_W_P0S
+ , MEP_INSN_CPMOVULA0_W_P0S, MEP_INSN_CPMOVLUA0_W_P0S, MEP_INSN_CPMOVLLA0_W_P0S, MEP_INSN_CPPACKA0U_B_P0S
+ , MEP_INSN_CPPACKA0_B_P0S, MEP_INSN_CPPACKUA0_H_P0S, MEP_INSN_CPPACKLA0_H_P0S, MEP_INSN_CPPACKUA0_W_P0S
+ , MEP_INSN_CPPACKLA0_W_P0S, MEP_INSN_CPMOVHUA0_W_P0S, MEP_INSN_CPMOVHLA0_W_P0S, MEP_INSN_CPACSUMA0_P0S
+ , MEP_INSN_CPACCPA0_P0S, MEP_INSN_CPSRLA0_P0S, MEP_INSN_CPSRAA0_P0S, MEP_INSN_CPSLLA0_P0S
+ , MEP_INSN_CPSRLIA0_P0S, MEP_INSN_CPSRAIA0_P0S, MEP_INSN_CPSLLIA0_P0S, MEP_INSN_CPFSFTBA0S0U_B_P0S
+ , MEP_INSN_CPFSFTBA0S0_B_P0S, MEP_INSN_CPFSFTBUA0S0_H_P0S, MEP_INSN_CPFSFTBLA0S0_H_P0S, MEP_INSN_CPFACA0S0U_B_P0S
+ , MEP_INSN_CPFACA0S0_B_P0S, MEP_INSN_CPFACUA0S0_H_P0S, MEP_INSN_CPFACLA0S0_H_P0S, MEP_INSN_CPFSFTBA0S1U_B_P0S
+ , MEP_INSN_CPFSFTBA0S1_B_P0S, MEP_INSN_CPFSFTBUA0S1_H_P0S, MEP_INSN_CPFSFTBLA0S1_H_P0S, MEP_INSN_CPFACA0S1U_B_P0S
+ , MEP_INSN_CPFACA0S1_B_P0S, MEP_INSN_CPFACUA0S1_H_P0S, MEP_INSN_CPFACLA0S1_H_P0S, MEP_INSN_CPFSFTBI_P0_P1
+ , MEP_INSN_CPACMPEQ_B_P0_P1, MEP_INSN_CPACMPEQ_H_P0_P1, MEP_INSN_CPACMPEQ_W_P0_P1, MEP_INSN_CPACMPNE_B_P0_P1
+ , MEP_INSN_CPACMPNE_H_P0_P1, MEP_INSN_CPACMPNE_W_P0_P1, MEP_INSN_CPACMPGTU_B_P0_P1, MEP_INSN_CPACMPGT_B_P0_P1
+ , MEP_INSN_CPACMPGT_H_P0_P1, MEP_INSN_CPACMPGTU_W_P0_P1, MEP_INSN_CPACMPGT_W_P0_P1, MEP_INSN_CPACMPGEU_B_P0_P1
+ , MEP_INSN_CPACMPGE_B_P0_P1, MEP_INSN_CPACMPGE_H_P0_P1, MEP_INSN_CPACMPGEU_W_P0_P1, MEP_INSN_CPACMPGE_W_P0_P1
+ , MEP_INSN_CPOCMPEQ_B_P0_P1, MEP_INSN_CPOCMPEQ_H_P0_P1, MEP_INSN_CPOCMPEQ_W_P0_P1, MEP_INSN_CPOCMPNE_B_P0_P1
+ , MEP_INSN_CPOCMPNE_H_P0_P1, MEP_INSN_CPOCMPNE_W_P0_P1, MEP_INSN_CPOCMPGTU_B_P0_P1, MEP_INSN_CPOCMPGT_B_P0_P1
+ , MEP_INSN_CPOCMPGT_H_P0_P1, MEP_INSN_CPOCMPGTU_W_P0_P1, MEP_INSN_CPOCMPGT_W_P0_P1, MEP_INSN_CPOCMPGEU_B_P0_P1
+ , MEP_INSN_CPOCMPGE_B_P0_P1, MEP_INSN_CPOCMPGE_H_P0_P1, MEP_INSN_CPOCMPGEU_W_P0_P1, MEP_INSN_CPOCMPGE_W_P0_P1
+ , MEP_INSN_CDADD3_P0_P1, MEP_INSN_CPSUB3_B_P0_P1, MEP_INSN_CPSUB3_H_P0_P1, MEP_INSN_CPSUB3_W_P0_P1
+ , MEP_INSN_CDSUB3_P0_P1, MEP_INSN_CPSADD3_H_P0_P1, MEP_INSN_CPSADD3_W_P0_P1, MEP_INSN_CPSSUB3_H_P0_P1
+ , MEP_INSN_CPSSUB3_W_P0_P1, MEP_INSN_CPEXTUADDU3_B_P0_P1, MEP_INSN_CPEXTUADD3_B_P0_P1, MEP_INSN_CPEXTLADDU3_B_P0_P1
+ , MEP_INSN_CPEXTLADD3_B_P0_P1, MEP_INSN_CPEXTUSUBU3_B_P0_P1, MEP_INSN_CPEXTUSUB3_B_P0_P1, MEP_INSN_CPEXTLSUBU3_B_P0_P1
+ , MEP_INSN_CPEXTLSUB3_B_P0_P1, MEP_INSN_CPAVEU3_B_P0_P1, MEP_INSN_CPAVE3_B_P0_P1, MEP_INSN_CPAVE3_H_P0_P1
+ , MEP_INSN_CPAVE3_W_P0_P1, MEP_INSN_CPADDSRU3_B_P0_P1, MEP_INSN_CPADDSR3_B_P0_P1, MEP_INSN_CPADDSR3_H_P0_P1
+ , MEP_INSN_CPADDSR3_W_P0_P1, MEP_INSN_CPABSU3_B_P0_P1, MEP_INSN_CPABS3_B_P0_P1, MEP_INSN_CPABS3_H_P0_P1
+ , MEP_INSN_CPAND3_P0_P1, MEP_INSN_CPOR3_P0_P1, MEP_INSN_CPNOR3_P0_P1, MEP_INSN_CPXOR3_P0_P1
+ , MEP_INSN_CPPACKU_B_P0_P1, MEP_INSN_CPPACK_B_P0_P1, MEP_INSN_CPPACK_H_P0_P1, MEP_INSN_CPMAXU3_B_P0_P1
+ , MEP_INSN_CPMAX3_B_P0_P1, MEP_INSN_CPMAX3_H_P0_P1, MEP_INSN_CPMAXU3_W_P0_P1, MEP_INSN_CPMAX3_W_P0_P1
+ , MEP_INSN_CPMINU3_B_P0_P1, MEP_INSN_CPMIN3_B_P0_P1, MEP_INSN_CPMIN3_H_P0_P1, MEP_INSN_CPMINU3_W_P0_P1
+ , MEP_INSN_CPMIN3_W_P0_P1, MEP_INSN_CPSRL3_B_P0_P1, MEP_INSN_CPSSRL3_B_P0_P1, MEP_INSN_CPSRL3_H_P0_P1
+ , MEP_INSN_CPSSRL3_H_P0_P1, MEP_INSN_CPSRL3_W_P0_P1, MEP_INSN_CPSSRL3_W_P0_P1, MEP_INSN_CDSRL3_P0_P1
+ , MEP_INSN_CPSRA3_B_P0_P1, MEP_INSN_CPSSRA3_B_P0_P1, MEP_INSN_CPSRA3_H_P0_P1, MEP_INSN_CPSSRA3_H_P0_P1
+ , MEP_INSN_CPSRA3_W_P0_P1, MEP_INSN_CPSSRA3_W_P0_P1, MEP_INSN_CDSRA3_P0_P1, MEP_INSN_CPSLL3_B_P0_P1
+ , MEP_INSN_CPSSLL3_B_P0_P1, MEP_INSN_CPSLL3_H_P0_P1, MEP_INSN_CPSSLL3_H_P0_P1, MEP_INSN_CPSLL3_W_P0_P1
+ , MEP_INSN_CPSSLL3_W_P0_P1, MEP_INSN_CDSLL3_P0_P1, MEP_INSN_CPSLA3_H_P0_P1, MEP_INSN_CPSLA3_W_P0_P1
+ , MEP_INSN_CPSRLI3_B_P0_P1, MEP_INSN_CPSRLI3_H_P0_P1, MEP_INSN_CPSRLI3_W_P0_P1, MEP_INSN_CDSRLI3_P0_P1
+ , MEP_INSN_CPSRAI3_B_P0_P1, MEP_INSN_CPSRAI3_H_P0_P1, MEP_INSN_CPSRAI3_W_P0_P1, MEP_INSN_CDSRAI3_P0_P1
+ , MEP_INSN_CPSLLI3_B_P0_P1, MEP_INSN_CPSLLI3_H_P0_P1, MEP_INSN_CPSLLI3_W_P0_P1, MEP_INSN_CDSLLI3_P0_P1
+ , MEP_INSN_CPSLAI3_H_P0_P1, MEP_INSN_CPSLAI3_W_P0_P1, MEP_INSN_CPCLIPIU3_W_P0_P1, MEP_INSN_CPCLIPI3_W_P0_P1
+ , MEP_INSN_CDCLIPIU3_P0_P1, MEP_INSN_CDCLIPI3_P0_P1, MEP_INSN_CPMOVI_H_P0_P1, MEP_INSN_CPMOVIU_W_P0_P1
+ , MEP_INSN_CPMOVI_W_P0_P1, MEP_INSN_CDMOVIU_P0_P1, MEP_INSN_CDMOVI_P0_P1, MEP_INSN_C1NOP_P1
+ , MEP_INSN_CPADDA1U_B_P1, MEP_INSN_CPADDA1_B_P1, MEP_INSN_CPADDUA1_H_P1, MEP_INSN_CPADDLA1_H_P1
+ , MEP_INSN_CPADDACA1U_B_P1, MEP_INSN_CPADDACA1_B_P1, MEP_INSN_CPADDACUA1_H_P1, MEP_INSN_CPADDACLA1_H_P1
+ , MEP_INSN_CPSUBA1U_B_P1, MEP_INSN_CPSUBA1_B_P1, MEP_INSN_CPSUBUA1_H_P1, MEP_INSN_CPSUBLA1_H_P1
+ , MEP_INSN_CPSUBACA1U_B_P1, MEP_INSN_CPSUBACA1_B_P1, MEP_INSN_CPSUBACUA1_H_P1, MEP_INSN_CPSUBACLA1_H_P1
+ , MEP_INSN_CPABSA1U_B_P1, MEP_INSN_CPABSA1_B_P1, MEP_INSN_CPABSUA1_H_P1, MEP_INSN_CPABSLA1_H_P1
+ , MEP_INSN_CPSADA1U_B_P1, MEP_INSN_CPSADA1_B_P1, MEP_INSN_CPSADUA1_H_P1, MEP_INSN_CPSADLA1_H_P1
+ , MEP_INSN_CPSETA1_H_P1, MEP_INSN_CPSETUA1_W_P1, MEP_INSN_CPSETLA1_W_P1, MEP_INSN_CPMOVA1_B_P1
+ , MEP_INSN_CPMOVUA1_H_P1, MEP_INSN_CPMOVLA1_H_P1, MEP_INSN_CPMOVUUA1_W_P1, MEP_INSN_CPMOVULA1_W_P1
+ , MEP_INSN_CPMOVLUA1_W_P1, MEP_INSN_CPMOVLLA1_W_P1, MEP_INSN_CPPACKA1U_B_P1, MEP_INSN_CPPACKA1_B_P1
+ , MEP_INSN_CPPACKUA1_H_P1, MEP_INSN_CPPACKLA1_H_P1, MEP_INSN_CPPACKUA1_W_P1, MEP_INSN_CPPACKLA1_W_P1
+ , MEP_INSN_CPMOVHUA1_W_P1, MEP_INSN_CPMOVHLA1_W_P1, MEP_INSN_CPACSUMA1_P1, MEP_INSN_CPACCPA1_P1
+ , MEP_INSN_CPACSWP_P1, MEP_INSN_CPSRLA1_P1, MEP_INSN_CPSRAA1_P1, MEP_INSN_CPSLLA1_P1
+ , MEP_INSN_CPSRLIA1_1_P1, MEP_INSN_CPSRAIA1_1_P1, MEP_INSN_CPSLLIA1_1_P1, MEP_INSN_CPFMULIA1S0U_B_P1
+ , MEP_INSN_CPFMULIA1S0_B_P1, MEP_INSN_CPFMULIUA1S0_H_P1, MEP_INSN_CPFMULILA1S0_H_P1, MEP_INSN_CPFMADIA1S0U_B_P1
+ , MEP_INSN_CPFMADIA1S0_B_P1, MEP_INSN_CPFMADIUA1S0_H_P1, MEP_INSN_CPFMADILA1S0_H_P1, MEP_INSN_CPFMULIA1S1U_B_P1
+ , MEP_INSN_CPFMULIA1S1_B_P1, MEP_INSN_CPFMULIUA1S1_H_P1, MEP_INSN_CPFMULILA1S1_H_P1, MEP_INSN_CPFMADIA1S1U_B_P1
+ , MEP_INSN_CPFMADIA1S1_B_P1, MEP_INSN_CPFMADIUA1S1_H_P1, MEP_INSN_CPFMADILA1S1_H_P1, MEP_INSN_CPAMULIA1U_B_P1
+ , MEP_INSN_CPAMULIA1_B_P1, MEP_INSN_CPAMULIUA1_H_P1, MEP_INSN_CPAMULILA1_H_P1, MEP_INSN_CPAMADIA1U_B_P1
+ , MEP_INSN_CPAMADIA1_B_P1, MEP_INSN_CPAMADIUA1_H_P1, MEP_INSN_CPAMADILA1_H_P1, MEP_INSN_CPFMULIA1U_B_P1
+ , MEP_INSN_CPFMULIA1_B_P1, MEP_INSN_CPFMULIUA1_H_P1, MEP_INSN_CPFMULILA1_H_P1, MEP_INSN_CPFMADIA1U_B_P1
+ , MEP_INSN_CPFMADIA1_B_P1, MEP_INSN_CPFMADIUA1_H_P1, MEP_INSN_CPFMADILA1_H_P1, MEP_INSN_CPSSQA1U_B_P1
+ , MEP_INSN_CPSSQA1_B_P1, MEP_INSN_CPSSDA1U_B_P1, MEP_INSN_CPSSDA1_B_P1, MEP_INSN_CPMULA1U_B_P1
+ , MEP_INSN_CPMULA1_B_P1, MEP_INSN_CPMULUA1_H_P1, MEP_INSN_CPMULLA1_H_P1, MEP_INSN_CPMULUA1U_W_P1
+ , MEP_INSN_CPMULLA1U_W_P1, MEP_INSN_CPMULUA1_W_P1, MEP_INSN_CPMULLA1_W_P1, MEP_INSN_CPMADA1U_B_P1
+ , MEP_INSN_CPMADA1_B_P1, MEP_INSN_CPMADUA1_H_P1, MEP_INSN_CPMADLA1_H_P1, MEP_INSN_CPMADUA1U_W_P1
+ , MEP_INSN_CPMADLA1U_W_P1, MEP_INSN_CPMADUA1_W_P1, MEP_INSN_CPMADLA1_W_P1, MEP_INSN_CPMSBUA1_H_P1
+ , MEP_INSN_CPMSBLA1_H_P1, MEP_INSN_CPMSBUA1U_W_P1, MEP_INSN_CPMSBLA1U_W_P1, MEP_INSN_CPMSBUA1_W_P1
+ , MEP_INSN_CPMSBLA1_W_P1, MEP_INSN_CPSMADUA1_H_P1, MEP_INSN_CPSMADLA1_H_P1, MEP_INSN_CPSMADUA1_W_P1
+ , MEP_INSN_CPSMADLA1_W_P1, MEP_INSN_CPSMSBUA1_H_P1, MEP_INSN_CPSMSBLA1_H_P1, MEP_INSN_CPSMSBUA1_W_P1
+ , MEP_INSN_CPSMSBLA1_W_P1, MEP_INSN_CPMULSLUA1_H_P1, MEP_INSN_CPMULSLLA1_H_P1, MEP_INSN_CPMULSLUA1_W_P1
+ , MEP_INSN_CPMULSLLA1_W_P1, MEP_INSN_CPSMADSLUA1_H_P1, MEP_INSN_CPSMADSLLA1_H_P1, MEP_INSN_CPSMADSLUA1_W_P1
+ , MEP_INSN_CPSMADSLLA1_W_P1, MEP_INSN_CPSMSBSLUA1_H_P1, MEP_INSN_CPSMSBSLLA1_H_P1, MEP_INSN_CPSMSBSLUA1_W_P1
+ , MEP_INSN_CPSMSBSLLA1_W_P1
 } CGEN_INSN_TYPE;
 
 /* Index of `invalid' insn place holder.  */
 #define CGEN_INSN_INVALID MEP_INSN_INVALID
 
 /* Total number of insns in table.  */
-#define MAX_INSNS ((int) MEP_INSN_RI_26 + 1)
+#define MAX_INSNS ((int) MEP_INSN_CPSMSBSLLA1_W_P1 + 1)
 
 /* This struct records data prior to insertion or after extraction.  */
 struct cgen_fields
@@ -266,6 +442,58 @@ struct cgen_fields
   long f_c5_16u16;
   long f_c5_rmuimm20;
   long f_c5_rnmuimm24;
+  long f_ivc2_2u4;
+  long f_ivc2_3u4;
+  long f_ivc2_8u4;
+  long f_ivc2_8s4;
+  long f_ivc2_1u6;
+  long f_ivc2_2u6;
+  long f_ivc2_3u6;
+  long f_ivc2_6u6;
+  long f_ivc2_5u7;
+  long f_ivc2_4u8;
+  long f_ivc2_3u9;
+  long f_ivc2_5u16;
+  long f_ivc2_5u21;
+  long f_ivc2_5u26;
+  long f_ivc2_1u31;
+  long f_ivc2_4u16;
+  long f_ivc2_4u20;
+  long f_ivc2_4u24;
+  long f_ivc2_4u28;
+  long f_ivc2_2u0;
+  long f_ivc2_3u0;
+  long f_ivc2_4u0;
+  long f_ivc2_5u0;
+  long f_ivc2_8u0;
+  long f_ivc2_8s0;
+  long f_ivc2_6u2;
+  long f_ivc2_5u3;
+  long f_ivc2_4u4;
+  long f_ivc2_3u5;
+  long f_ivc2_5u8;
+  long f_ivc2_4u10;
+  long f_ivc2_3u12;
+  long f_ivc2_5u13;
+  long f_ivc2_2u18;
+  long f_ivc2_5u18;
+  long f_ivc2_8u20;
+  long f_ivc2_8s20;
+  long f_ivc2_5u23;
+  long f_ivc2_2u23;
+  long f_ivc2_3u25;
+  long f_ivc2_imm16p0;
+  long f_ivc2_simm16p0;
+  long f_ivc2_crn;
+  long f_ivc2_crm;
+  long f_ivc2_ccrn_h1;
+  long f_ivc2_ccrn_h2;
+  long f_ivc2_ccrn_lo;
+  long f_ivc2_cmov1;
+  long f_ivc2_cmov2;
+  long f_ivc2_cmov3;
+  long f_ivc2_ccrn;
+  long f_ivc2_crnx;
 };
 
 #define CGEN_INIT_PARSE(od) \