drm/i915/uc: Introduce intel_uc_suspend|resume

We want to use higher level 'uc' functions as the main entry points to
the GuC/HuC code to hide some details and keep code layered.

While here, move call to disable_guc_interrupts after sending suspend
action to the GuC to allow it work also with CTB as comm mechanism.

v2: update commit msg (Sagar)

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302111550.21328-1-michal.wajdeczko@intel.com

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index aaa861b..d61b51c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2575,7 +2575,7 @@ static int intel_runtime_suspend(struct device *kdev)
         */
        i915_gem_runtime_suspend(dev_priv);
 
-       intel_guc_suspend(dev_priv);
+       intel_uc_suspend(dev_priv);
 
        intel_runtime_pm_disable_interrupts(dev_priv);
 
@@ -2597,7 +2597,7 @@ static int intel_runtime_suspend(struct device *kdev)
 
                intel_runtime_pm_enable_interrupts(dev_priv);
 
-               intel_guc_resume(dev_priv);
+               intel_uc_resume(dev_priv);
 
                i915_gem_init_swizzling(dev_priv);
                i915_gem_restore_fences(dev_priv);
@@ -2683,7 +2683,7 @@ static int intel_runtime_resume(struct device *kdev)
 
        intel_runtime_pm_enable_interrupts(dev_priv);
 
-       intel_guc_resume(dev_priv);
+       intel_uc_resume(dev_priv);
 
        /*
         * No point of rolling back things in case of an error, as the best

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index dcdcc09..a5bd073 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4920,7 +4920,7 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
        i915_gem_contexts_lost(dev_priv);
        mutex_unlock(&dev->struct_mutex);
 
-       intel_guc_suspend(dev_priv);
+       intel_uc_suspend(dev_priv);
 
        cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work);
        cancel_delayed_work_sync(&dev_priv->gt.retire_work);
@@ -4987,7 +4987,7 @@ void i915_gem_resume(struct drm_i915_private *i915)
        if (i915_gem_init_hw(i915))
                goto err_wedged;
 
-       intel_guc_resume(i915);
+       intel_uc_resume(i915);
 
        /* Always reload a context for powersaving. */
        if (i915_gem_switch_to_kernel_context(i915))

diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index e6512cc..ff08ea0 100644 (file)
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -403,22 +403,15 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset)
 
 /**
  * intel_guc_suspend() - notify GuC entering suspend state
- * @dev_priv:  i915 device private
+ * @guc:       the guc
  */
-int intel_guc_suspend(struct drm_i915_private *dev_priv)
+int intel_guc_suspend(struct intel_guc *guc)
 {
-       struct intel_guc *guc = &dev_priv->guc;
-       u32 data[3];
-
-       if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
-               return 0;
-
-       gen9_disable_guc_interrupts(dev_priv);
-
-       data[0] = INTEL_GUC_ACTION_ENTER_S_STATE;
-       /* any value greater than GUC_POWER_D0 */
-       data[1] = GUC_POWER_D1;
-       data[2] = guc_ggtt_offset(guc->shared_data);
+       u32 data[] = {
+               INTEL_GUC_ACTION_ENTER_S_STATE,
+               GUC_POWER_D1, /* any value greater than GUC_POWER_D0 */
+               guc_ggtt_offset(guc->shared_data)
+       };
 
        return intel_guc_send(guc, data, ARRAY_SIZE(data));
 }
@@ -448,22 +441,15 @@ int intel_guc_reset_engine(struct intel_guc *guc,
 
 /**
  * intel_guc_resume() - notify GuC resuming from suspend state
- * @dev_priv:  i915 device private
+ * @guc:       the guc
  */
-int intel_guc_resume(struct drm_i915_private *dev_priv)
+int intel_guc_resume(struct intel_guc *guc)
 {
-       struct intel_guc *guc = &dev_priv->guc;
-       u32 data[3];
-
-       if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
-               return 0;
-
-       if (i915_modparams.guc_log_level)
-               gen9_enable_guc_interrupts(dev_priv);
-
-       data[0] = INTEL_GUC_ACTION_EXIT_S_STATE;
-       data[1] = GUC_POWER_D0;
-       data[2] = guc_ggtt_offset(guc->shared_data);
+       u32 data[] = {
+               INTEL_GUC_ACTION_EXIT_S_STATE,
+               GUC_POWER_D0,
+               guc_ggtt_offset(guc->shared_data)
+       };
 
        return intel_guc_send(guc, data, ARRAY_SIZE(data));
 }

diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 52856a9..b9424ac 100644 (file)
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -127,8 +127,8 @@ int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len);
 int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len);
 int intel_guc_sample_forcewake(struct intel_guc *guc);
 int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
-int intel_guc_suspend(struct drm_i915_private *dev_priv);
-int intel_guc_resume(struct drm_i915_private *dev_priv);
+int intel_guc_suspend(struct intel_guc *guc);
+int intel_guc_resume(struct intel_guc *guc);
 struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
 u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
 

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 8e25474..e5bf0d3 100644 (file)
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -445,3 +445,48 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
        if (USES_GUC_SUBMISSION(dev_priv))
                gen9_disable_guc_interrupts(dev_priv);
 }
+
+int intel_uc_suspend(struct drm_i915_private *i915)
+{
+       struct intel_guc *guc = &i915->guc;
+       int err;
+
+       if (!USES_GUC(i915))
+               return 0;
+
+       if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
+               return 0;
+
+       err = intel_guc_suspend(guc);
+       if (err) {
+               DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
+               return err;
+       }
+
+       gen9_disable_guc_interrupts(i915);
+
+       return 0;
+}
+
+int intel_uc_resume(struct drm_i915_private *i915)
+{
+       struct intel_guc *guc = &i915->guc;
+       int err;
+
+       if (!USES_GUC(i915))
+               return 0;
+
+       if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
+               return 0;
+
+       if (i915_modparams.guc_log_level)
+               gen9_enable_guc_interrupts(i915);
+
+       err = intel_guc_resume(guc);
+       if (err) {
+               DRM_DEBUG_DRIVER("Failed to resume GuC, err=%d", err);
+               return err;
+       }
+
+       return 0;
+}

diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index f2984e0..f76d51d 100644 (file)
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -39,6 +39,8 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv);
 void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
 int intel_uc_init(struct drm_i915_private *dev_priv);
 void intel_uc_fini(struct drm_i915_private *dev_priv);
+int intel_uc_suspend(struct drm_i915_private *dev_priv);
+int intel_uc_resume(struct drm_i915_private *dev_priv);
 
 static inline bool intel_uc_is_using_guc(void)
 {