vga_generate define変更

Change-Id: I2ec665860219e007c4456cdf62ef87c75f15cd03

diff --git a/VGADisplay/src/vga_generate.nsl b/VGADisplay/src/vga_generate.nsl
index e36c694..d9503b9 100644 (file)
--- a/VGADisplay/src/vga_generate.nsl
+++ b/VGADisplay/src/vga_generate.nsl
@@ -1,19 +1,48 @@
-%d CNT_H_00                    0b0000000000
-%d CNT_H1                      0b0001011111 /* 96clock */
-%d CNT_H_REP32         0b0001101110 /* 110 clock */
-%d CNT_H_DATA_IN       0b0010001110 /* 142 for 144clock */
-%d CNT_H_DATA_OUT      0b1100001110 /* 782 for 784clock */
-%d CNT_H2                      0b1100011111 /* 800clock */
-%d CNT_32                      0b11111      /* 32dot */
-%d H_MINUS_32          (^(0b0000011111) + 0b0000000001)      /* -32 */
-%d H_MINUS_1           0b1111111111      /* -1 */
-%d V_MINUS_32          (^(0b0000000000000011111) + 0b0000000000000000001) /*-32*/
-%d V_MINUS_1           0b1111111111111111111      /* -1 */
-
-%d CNT_V1                      0b0000000011000111111 /* 1600clock */
-%d CNT_V_DATA_IN       0b0000110000011011111 /* 24800clock */
-%d CNT_V_DATA_OUT      0b1100011110011011111 /* 408800clock */ 
-%d CNT_V2                      0b1100101110000011111 /* 416800clock */
+//%d CNT_H_00                  0b0000000000
+//%d CNT_H1                    0b0001011111 /* 96clock */
+//%d CNT_H_REP32               0b0001101110 /* 110 clock */
+//%d CNT_H_DATA_IN     0b0010001110 /* 142 for 144clock */
+//%d CNT_H_DATA_OUT    0b1100001110 /* 782 for 784clock */
+//%d CNT_H2                    0b1100011111 /* 800clock */
+//%d CNT_32                    0b11111      /* 32dot */
+//%d H_MINUS_32                (^(0b0000011111) + 0b0000000001)      /* -32 */
+//%d H_MINUS_1         0b1111111111      /* -1 */
+//%d V_MINUS_32                (^(0b0000000000000011111) + 0b0000000000000000001) /*-32*/
+//%d V_MINUS_1         0b1111111111111111111      /* -1 */
+//%d CNT_V1                    0b0000000011000111111 /* 1600clock */
+//%d CNT_V_DATA_IN     0b0000110000011011111 /* 24800clock */
+//%d CNT_V_DATA_OUT    0b1100011110011011111 /* 408800clock */ 
+//%d CNT_V2                    0b1100101110000011111 /* 416800clock */
+
+/**
+*      @name   VGA\81@Signal Generate Circuit
+*      @auther Yujiro Kaneko
+*
+*
+*
+*
+**/
+
+%d CNT_H_00                    10'd0           /* for Initialize */
+%d CNT_H1                      10'd96          /* 96clock */
+%d CNT_H_REP32         10'd110         /* 110 clock */
+%d CNT_H_DATA_IN       10'd142         /* 142 for 144clock */
+%d CNT_H_DATA_OUT      10'd782         /* 782 for 784clock */
+%d CNT_H2                      10'd800         /* 800clock */
+
+%d CNT_32                      5'b11111        /* 32dot */
+
+%d H_MINUS_32          10'd1111100001          /* -31 */
+%d H_MINUS_1           10'b1111111111          /* -1 */
+
+%d V_MINUS_32          19'b1111111111111100001 /* -32 */
+%d V_MINUS_1           19'b1111111111111111111 /* -1 */
+
+%d CNT_V1                      19'd1599        /* 1600clock */
+%d CNT_V_DATA_IN       19'd24799       /* 24800clock */
+%d CNT_V_DATA_OUT      19'd408799      /* 408800clock */ 
+%d CNT_V2                      19'd416799      /* 416800clock */
+
 
 declare vga_generate  interface {
        input  p_reset ;