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ARM: dts: imx6ull: fix the imx6ull-14x14-evk configuration
authorLothar Waßmann <LW@KARO-electronics.de>
Thu, 8 Feb 2018 07:07:37 +0000 (15:07 +0800)
committerShawn Guo <shawnguo@kernel.org>
Mon, 12 Feb 2018 13:13:21 +0000 (21:13 +0800)
imx6ull-14x14-evk.dts currently includes the imx6ul.dtsi file for an
i.MX6ULL SoC which is plain wrong.

Rename the current imx6ul-14x14-evk.dts to .dtsi and include it from
imx6ul-14x14-evk.dts and imx6ull-14x14-evk.dts, so that both can
include the appropriate SoC specific (imx6ul.dtsi/imx6ull.dtsi) file.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6ul-14x14-evk.dts
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx6ull-14x14-evk.dts

index 5db8329..6d720b2 100644 (file)
@@ -9,498 +9,9 @@
 /dts-v1/;
 
 #include "imx6ul.dtsi"
+#include "imx6ul-14x14-evk.dtsi"
 
 / {
        model = "Freescale i.MX6 UltraLite 14x14 EVK Board";
        compatible = "fsl,imx6ul-14x14-evk", "fsl,imx6ul";
-
-       chosen {
-               stdout-path = &uart1;
-       };
-
-       memory@80000000 {
-               reg = <0x80000000 0x20000000>;
-       };
-
-       backlight_display: backlight-display {
-               compatible = "pwm-backlight";
-               pwms = <&pwm1 0 5000000>;
-               brightness-levels = <0 4 8 16 32 64 128 255>;
-               default-brightness-level = <6>;
-               status = "okay";
-       };
-
-
-       reg_sd1_vmmc: regulator-sd1-vmmc {
-               compatible = "regulator-fixed";
-               regulator-name = "VSD_3V3";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
-               enable-active-high;
-       };
-
-       sound {
-               compatible = "simple-audio-card";
-               simple-audio-card,name = "mx6ul-wm8960";
-               simple-audio-card,format = "i2s";
-               simple-audio-card,bitclock-master = <&dailink_master>;
-               simple-audio-card,frame-master = <&dailink_master>;
-               simple-audio-card,widgets =
-                       "Microphone", "Mic Jack",
-                       "Line", "Line In",
-                       "Line", "Line Out",
-                       "Speaker", "Speaker",
-                       "Headphone", "Headphone Jack";
-               simple-audio-card,routing =
-                       "Headphone Jack", "HP_L",
-                       "Headphone Jack", "HP_R",
-                       "Speaker", "SPK_LP",
-                       "Speaker", "SPK_LN",
-                       "Speaker", "SPK_RP",
-                       "Speaker", "SPK_RN",
-                       "LINPUT1", "Mic Jack",
-                       "LINPUT3", "Mic Jack",
-                       "RINPUT1", "Mic Jack",
-                       "RINPUT2", "Mic Jack";
-
-               simple-audio-card,cpu {
-                       sound-dai = <&sai2>;
-               };
-
-               dailink_master: simple-audio-card,codec {
-                       sound-dai = <&codec>;
-                       clocks = <&clks IMX6UL_CLK_SAI2>;
-               };
-       };
-
-       panel {
-               compatible = "innolux,at043tn24";
-               backlight = <&backlight_display>;
-
-               port {
-                       panel_in: endpoint {
-                               remote-endpoint = <&display_out>;
-                       };
-               };
-       };
-};
-
-&clks {
-       assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-       assigned-clock-rates = <786432000>;
-};
-
-&i2c2 {
-       clock_frequency = <100000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c2>;
-       status = "okay";
-
-       codec: wm8960@1a {
-               #sound-dai-cells = <0>;
-               compatible = "wlf,wm8960";
-               reg = <0x1a>;
-               wlf,shared-lrclk;
-       };
-};
-
-&fec1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet1>;
-       phy-mode = "rmii";
-       phy-handle = <&ethphy0>;
-       status = "okay";
-};
-
-&fec2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet2>;
-       phy-mode = "rmii";
-       phy-handle = <&ethphy1>;
-       status = "okay";
-
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               ethphy0: ethernet-phy@2 {
-                       reg = <2>;
-                       micrel,led-mode = <1>;
-                       clocks = <&clks IMX6UL_CLK_ENET_REF>;
-                       clock-names = "rmii-ref";
-               };
-
-               ethphy1: ethernet-phy@1 {
-                       reg = <1>;
-                       micrel,led-mode = <1>;
-                       clocks = <&clks IMX6UL_CLK_ENET2_REF>;
-                       clock-names = "rmii-ref";
-               };
-       };
-};
-
-&i2c1 {
-       clock-frequency = <100000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_i2c1>;
-       status = "okay";
-
-       mag3110@e {
-               compatible = "fsl,mag3110";
-               reg = <0x0e>;
-       };
-};
-
-&lcdif {
-       assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
-       assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_lcdif_dat
-                    &pinctrl_lcdif_ctrl>;
-       status = "okay";
-
-       port {
-               display_out: endpoint {
-                       remote-endpoint = <&panel_in>;
-               };
-       };
-};
-
-&pwm1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_pwm1>;
-       status = "okay";
-};
-
-&qspi {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_qspi>;
-       status = "okay";
-
-       flash0: n25q256a@0 {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               compatible = "micron,n25q256a";
-               spi-max-frequency = <29000000>;
-               reg = <0>;
-       };
-};
-
-&sai2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_sai2>;
-       assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
-                         <&clks IMX6UL_CLK_SAI2>;
-       assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
-       assigned-clock-rates = <0>, <12288000>;
-       fsl,sai-mclk-direction-output;
-       status = "okay";
-};
-
-&snvs_poweroff {
-       status = "okay";
-};
-
-&tsc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_tsc>;
-       xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
-       measure-delay-time = <0xffff>;
-       pre-charge-time = <0xfff>;
-       status = "okay";
-};
-
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart1>;
-       status = "okay";
-};
-
-&uart2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart2>;
-       uart-has-rtscts;
-       status = "okay";
-};
-
-&usbotg1 {
-       dr_mode = "otg";
-       status = "okay";
-};
-
-&usbotg2 {
-       dr_mode = "host";
-       disable-over-current;
-       status = "okay";
-};
-
-&usbphy1 {
-       fsl,tx-d-cal = <106>;
-};
-
-&usbphy2 {
-       fsl,tx-d-cal = <106>;
-};
-
-&usdhc1 {
-       pinctrl-names = "default", "state_100mhz", "state_200mhz";
-       pinctrl-0 = <&pinctrl_usdhc1>;
-       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
-       cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
-       keep-power-in-suspend;
-       wakeup-source;
-       vmmc-supply = <&reg_sd1_vmmc>;
-       status = "okay";
-};
-
-&usdhc2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc2>;
-       no-1-8-v;
-       keep-power-in-suspend;
-       wakeup-source;
-       status = "okay";
-};
-
-&wdog1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_wdog>;
-       fsl,ext-reset-output;
-};
-
-&iomuxc {
-       pinctrl-names = "default";
-
-       pinctrl_csi1: csi1grp {
-               fsl,pins = <
-                       MX6UL_PAD_CSI_MCLK__CSI_MCLK            0x1b088
-                       MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK        0x1b088
-                       MX6UL_PAD_CSI_VSYNC__CSI_VSYNC          0x1b088
-                       MX6UL_PAD_CSI_HSYNC__CSI_HSYNC          0x1b088
-                       MX6UL_PAD_CSI_DATA00__CSI_DATA02        0x1b088
-                       MX6UL_PAD_CSI_DATA01__CSI_DATA03        0x1b088
-                       MX6UL_PAD_CSI_DATA02__CSI_DATA04        0x1b088
-                       MX6UL_PAD_CSI_DATA03__CSI_DATA05        0x1b088
-                       MX6UL_PAD_CSI_DATA04__CSI_DATA06        0x1b088
-                       MX6UL_PAD_CSI_DATA05__CSI_DATA07        0x1b088
-                       MX6UL_PAD_CSI_DATA06__CSI_DATA08        0x1b088
-                       MX6UL_PAD_CSI_DATA07__CSI_DATA09        0x1b088
-               >;
-       };
-
-       pinctrl_enet1: enet1grp {
-               fsl,pins = <
-                       MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
-                       MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER      0x1b0b0
-                       MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
-                       MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
-                       MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
-                       MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
-                       MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
-                       MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
-               >;
-       };
-
-       pinctrl_enet2: enet2grp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0
-                       MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
-                       MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0
-                       MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0
-                       MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
-                       MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
-                       MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0
-                       MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
-                       MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
-                       MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b031
-               >;
-       };
-
-       pinctrl_flexcan1: flexcan1grp{
-               fsl,pins = <
-                       MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX      0x1b020
-                       MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX      0x1b020
-               >;
-       };
-
-       pinctrl_flexcan2: flexcan2grp{
-               fsl,pins = <
-                       MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX      0x1b020
-                       MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX      0x1b020
-               >;
-       };
-
-       pinctrl_i2c1: i2c1grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
-                       MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
-               >;
-       };
-
-       pinctrl_i2c2: i2c2grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
-                       MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
-               >;
-       };
-
-       pinctrl_lcdif_dat: lcdifdatgrp {
-               fsl,pins = <
-                       MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
-                       MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
-                       MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
-                       MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
-                       MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
-                       MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
-                       MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
-                       MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
-                       MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
-                       MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
-                       MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
-                       MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
-                       MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
-                       MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
-                       MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
-                       MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
-                       MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x79
-                       MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x79
-                       MX6UL_PAD_LCD_DATA18__LCDIF_DATA18  0x79
-                       MX6UL_PAD_LCD_DATA19__LCDIF_DATA19  0x79
-                       MX6UL_PAD_LCD_DATA20__LCDIF_DATA20  0x79
-                       MX6UL_PAD_LCD_DATA21__LCDIF_DATA21  0x79
-                       MX6UL_PAD_LCD_DATA22__LCDIF_DATA22  0x79
-                       MX6UL_PAD_LCD_DATA23__LCDIF_DATA23  0x79
-               >;
-       };
-
-       pinctrl_lcdif_ctrl: lcdifctrlgrp {
-               fsl,pins = <
-                       MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x79
-                       MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
-                       MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
-                       MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
-                       /* used for lcd reset */
-                       MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x79
-               >;
-       };
-
-       pinctrl_qspi: qspigrp {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK        0x70a1
-                       MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00   0x70a1
-                       MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01     0x70a1
-                       MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02     0x70a1
-                       MX6UL_PAD_NAND_CLE__QSPI_A_DATA03       0x70a1
-                       MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B        0x70a1
-               >;
-       };
-
-       pinctrl_sai2: sai2grp {
-               fsl,pins = <
-                       MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK        0x17088
-                       MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC        0x17088
-                       MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA     0x11088
-                       MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA        0x11088
-                       MX6UL_PAD_JTAG_TMS__SAI2_MCLK           0x17088
-                       MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04      0x17059
-               >;
-       };
-
-       pinctrl_pwm1: pwm1grp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO08__PWM1_OUT   0x110b0
-               >;
-       };
-
-       pinctrl_sim2: sim2grp {
-               fsl,pins = <
-                       MX6UL_PAD_CSI_DATA03__SIM2_PORT1_PD             0xb808
-                       MX6UL_PAD_CSI_DATA04__SIM2_PORT1_CLK            0x31
-                       MX6UL_PAD_CSI_DATA05__SIM2_PORT1_RST_B          0xb808
-                       MX6UL_PAD_CSI_DATA06__SIM2_PORT1_SVEN           0xb808
-                       MX6UL_PAD_CSI_DATA07__SIM2_PORT1_TRXD           0xb809
-                       MX6UL_PAD_CSI_DATA02__GPIO4_IO23                0x3008
-               >;
-       };
-
-       pinctrl_tsc: tscgrp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO01__GPIO1_IO01                0xb0
-                       MX6UL_PAD_GPIO1_IO02__GPIO1_IO02                0xb0
-                       MX6UL_PAD_GPIO1_IO03__GPIO1_IO03                0xb0
-                       MX6UL_PAD_GPIO1_IO04__GPIO1_IO04                0xb0
-               >;
-       };
-
-       pinctrl_uart1: uart1grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
-                       MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
-               >;
-       };
-
-       pinctrl_uart2: uart2grp {
-               fsl,pins = <
-                       MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX   0x1b0b1
-                       MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX   0x1b0b1
-                       MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS  0x1b0b1
-                       MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS  0x1b0b1
-               >;
-       };
-
-       pinctrl_usdhc1: usdhc1grp {
-               fsl,pins = <
-                       MX6UL_PAD_SD1_CMD__USDHC1_CMD           0x17059
-                       MX6UL_PAD_SD1_CLK__USDHC1_CLK           0x10059
-                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0       0x17059
-                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1       0x17059
-                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2       0x17059
-                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3       0x17059
-                       MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059 /* SD1 CD */
-                       MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059 /* SD1 VSELECT */
-                       MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
-               >;
-       };
-
-       pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
-               fsl,pins = <
-                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
-                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
-                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
-                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
-                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
-                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
-
-               >;
-       };
-
-       pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
-               fsl,pins = <
-                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
-                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
-                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
-                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
-                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
-                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
-               >;
-       };
-
-       pinctrl_usdhc2: usdhc2grp {
-               fsl,pins = <
-                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x17059
-                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
-                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
-                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
-                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
-                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
-               >;
-       };
-
-       pinctrl_wdog: wdoggrp {
-               fsl,pins = <
-                       MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
-               >;
-       };
 };
diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
new file mode 100644 (file)
index 0000000..32a0723
--- /dev/null
@@ -0,0 +1,499 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+       chosen {
+               stdout-path = &uart1;
+       };
+
+       memory@80000000 {
+               reg = <0x80000000 0x20000000>;
+       };
+
+       backlight_display: backlight-display {
+               compatible = "pwm-backlight";
+               pwms = <&pwm1 0 5000000>;
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <6>;
+               status = "okay";
+       };
+
+
+       reg_sd1_vmmc: regulator-sd1-vmmc {
+               compatible = "regulator-fixed";
+               regulator-name = "VSD_3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,name = "mx6ul-wm8960";
+               simple-audio-card,format = "i2s";
+               simple-audio-card,bitclock-master = <&dailink_master>;
+               simple-audio-card,frame-master = <&dailink_master>;
+               simple-audio-card,widgets =
+                       "Microphone", "Mic Jack",
+                       "Line", "Line In",
+                       "Line", "Line Out",
+                       "Speaker", "Speaker",
+                       "Headphone", "Headphone Jack";
+               simple-audio-card,routing =
+                       "Headphone Jack", "HP_L",
+                       "Headphone Jack", "HP_R",
+                       "Speaker", "SPK_LP",
+                       "Speaker", "SPK_LN",
+                       "Speaker", "SPK_RP",
+                       "Speaker", "SPK_RN",
+                       "LINPUT1", "Mic Jack",
+                       "LINPUT3", "Mic Jack",
+                       "RINPUT1", "Mic Jack",
+                       "RINPUT2", "Mic Jack";
+
+               simple-audio-card,cpu {
+                       sound-dai = <&sai2>;
+               };
+
+               dailink_master: simple-audio-card,codec {
+                       sound-dai = <&codec>;
+                       clocks = <&clks IMX6UL_CLK_SAI2>;
+               };
+       };
+
+       panel {
+               compatible = "innolux,at043tn24";
+               backlight = <&backlight_display>;
+
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&display_out>;
+                       };
+               };
+       };
+};
+
+&clks {
+       assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+       assigned-clock-rates = <786432000>;
+};
+
+&i2c2 {
+       clock_frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+
+       codec: wm8960@1a {
+               #sound-dai-cells = <0>;
+               compatible = "wlf,wm8960";
+               reg = <0x1a>;
+               wlf,shared-lrclk;
+       };
+};
+
+&fec1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet1>;
+       phy-mode = "rmii";
+       phy-handle = <&ethphy0>;
+       status = "okay";
+};
+
+&fec2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet2>;
+       phy-mode = "rmii";
+       phy-handle = <&ethphy1>;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ethphy0: ethernet-phy@2 {
+                       reg = <2>;
+                       micrel,led-mode = <1>;
+                       clocks = <&clks IMX6UL_CLK_ENET_REF>;
+                       clock-names = "rmii-ref";
+               };
+
+               ethphy1: ethernet-phy@1 {
+                       reg = <1>;
+                       micrel,led-mode = <1>;
+                       clocks = <&clks IMX6UL_CLK_ENET2_REF>;
+                       clock-names = "rmii-ref";
+               };
+       };
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       mag3110@e {
+               compatible = "fsl,mag3110";
+               reg = <0x0e>;
+       };
+};
+
+&lcdif {
+       assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>;
+       assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lcdif_dat
+                    &pinctrl_lcdif_ctrl>;
+       status = "okay";
+
+       port {
+               display_out: endpoint {
+                       remote-endpoint = <&panel_in>;
+               };
+       };
+};
+
+&pwm1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm1>;
+       status = "okay";
+};
+
+&qspi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_qspi>;
+       status = "okay";
+
+       flash0: n25q256a@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q256a";
+               spi-max-frequency = <29000000>;
+               reg = <0>;
+       };
+};
+
+&sai2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai2>;
+       assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
+                         <&clks IMX6UL_CLK_SAI2>;
+       assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
+       assigned-clock-rates = <0>, <12288000>;
+       fsl,sai-mclk-direction-output;
+       status = "okay";
+};
+
+&snvs_poweroff {
+       status = "okay";
+};
+
+&tsc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_tsc>;
+       xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+       measure-delay-time = <0xffff>;
+       pre-charge-time = <0xfff>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&usbotg1 {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&usbotg2 {
+       dr_mode = "host";
+       disable-over-current;
+       status = "okay";
+};
+
+&usbphy1 {
+       fsl,tx-d-cal = <106>;
+};
+
+&usbphy2 {
+       fsl,tx-d-cal = <106>;
+};
+
+&usdhc1 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+       cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+       keep-power-in-suspend;
+       wakeup-source;
+       vmmc-supply = <&reg_sd1_vmmc>;
+       status = "okay";
+};
+
+&usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       no-1-8-v;
+       keep-power-in-suspend;
+       wakeup-source;
+       status = "okay";
+};
+
+&wdog1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdog>;
+       fsl,ext-reset-output;
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+
+       pinctrl_csi1: csi1grp {
+               fsl,pins = <
+                       MX6UL_PAD_CSI_MCLK__CSI_MCLK            0x1b088
+                       MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK        0x1b088
+                       MX6UL_PAD_CSI_VSYNC__CSI_VSYNC          0x1b088
+                       MX6UL_PAD_CSI_HSYNC__CSI_HSYNC          0x1b088
+                       MX6UL_PAD_CSI_DATA00__CSI_DATA02        0x1b088
+                       MX6UL_PAD_CSI_DATA01__CSI_DATA03        0x1b088
+                       MX6UL_PAD_CSI_DATA02__CSI_DATA04        0x1b088
+                       MX6UL_PAD_CSI_DATA03__CSI_DATA05        0x1b088
+                       MX6UL_PAD_CSI_DATA04__CSI_DATA06        0x1b088
+                       MX6UL_PAD_CSI_DATA05__CSI_DATA07        0x1b088
+                       MX6UL_PAD_CSI_DATA06__CSI_DATA08        0x1b088
+                       MX6UL_PAD_CSI_DATA07__CSI_DATA09        0x1b088
+               >;
+       };
+
+       pinctrl_enet1: enet1grp {
+               fsl,pins = <
+                       MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
+                       MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER      0x1b0b0
+                       MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+                       MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
+                       MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
+               >;
+       };
+
+       pinctrl_enet2: enet2grp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0
+                       MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
+                       MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0
+                       MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0
+                       MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+                       MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+                       MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0
+                       MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+                       MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+                       MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b031
+               >;
+       };
+
+       pinctrl_flexcan1: flexcan1grp{
+               fsl,pins = <
+                       MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX      0x1b020
+                       MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX      0x1b020
+               >;
+       };
+
+       pinctrl_flexcan2: flexcan2grp{
+               fsl,pins = <
+                       MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX      0x1b020
+                       MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX      0x1b020
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+                       MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+               >;
+       };
+
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+                       MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+               >;
+       };
+
+       pinctrl_lcdif_dat: lcdifdatgrp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
+                       MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
+                       MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
+                       MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
+                       MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
+                       MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
+                       MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
+                       MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
+                       MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
+                       MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
+                       MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
+                       MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
+                       MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
+                       MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
+                       MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
+                       MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
+                       MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x79
+                       MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x79
+                       MX6UL_PAD_LCD_DATA18__LCDIF_DATA18  0x79
+                       MX6UL_PAD_LCD_DATA19__LCDIF_DATA19  0x79
+                       MX6UL_PAD_LCD_DATA20__LCDIF_DATA20  0x79
+                       MX6UL_PAD_LCD_DATA21__LCDIF_DATA21  0x79
+                       MX6UL_PAD_LCD_DATA22__LCDIF_DATA22  0x79
+                       MX6UL_PAD_LCD_DATA23__LCDIF_DATA23  0x79
+               >;
+       };
+
+       pinctrl_lcdif_ctrl: lcdifctrlgrp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x79
+                       MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
+                       MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
+                       MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
+                       /* used for lcd reset */
+                       MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x79
+               >;
+       };
+
+       pinctrl_qspi: qspigrp {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK        0x70a1
+                       MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00   0x70a1
+                       MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01     0x70a1
+                       MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02     0x70a1
+                       MX6UL_PAD_NAND_CLE__QSPI_A_DATA03       0x70a1
+                       MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B        0x70a1
+               >;
+       };
+
+       pinctrl_sai2: sai2grp {
+               fsl,pins = <
+                       MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK        0x17088
+                       MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC        0x17088
+                       MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA     0x11088
+                       MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA        0x11088
+                       MX6UL_PAD_JTAG_TMS__SAI2_MCLK           0x17088
+                       MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04      0x17059
+               >;
+       };
+
+       pinctrl_pwm1: pwm1grp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO08__PWM1_OUT   0x110b0
+               >;
+       };
+
+       pinctrl_sim2: sim2grp {
+               fsl,pins = <
+                       MX6UL_PAD_CSI_DATA03__SIM2_PORT1_PD             0xb808
+                       MX6UL_PAD_CSI_DATA04__SIM2_PORT1_CLK            0x31
+                       MX6UL_PAD_CSI_DATA05__SIM2_PORT1_RST_B          0xb808
+                       MX6UL_PAD_CSI_DATA06__SIM2_PORT1_SVEN           0xb808
+                       MX6UL_PAD_CSI_DATA07__SIM2_PORT1_TRXD           0xb809
+                       MX6UL_PAD_CSI_DATA02__GPIO4_IO23                0x3008
+               >;
+       };
+
+       pinctrl_tsc: tscgrp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO01__GPIO1_IO01                0xb0
+                       MX6UL_PAD_GPIO1_IO02__GPIO1_IO02                0xb0
+                       MX6UL_PAD_GPIO1_IO03__GPIO1_IO03                0xb0
+                       MX6UL_PAD_GPIO1_IO04__GPIO1_IO04                0xb0
+               >;
+       };
+
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+                       MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+               >;
+       };
+
+       pinctrl_uart2: uart2grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX   0x1b0b1
+                       MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX   0x1b0b1
+                       MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS  0x1b0b1
+                       MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS  0x1b0b1
+               >;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX6UL_PAD_SD1_CMD__USDHC1_CMD           0x17059
+                       MX6UL_PAD_SD1_CLK__USDHC1_CLK           0x10059
+                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0       0x17059
+                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1       0x17059
+                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2       0x17059
+                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3       0x17059
+                       MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059 /* SD1 CD */
+                       MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059 /* SD1 VSELECT */
+                       MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
+               >;
+       };
+
+       pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+               fsl,pins = <
+                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
+                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
+                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+
+               >;
+       };
+
+       pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+               fsl,pins = <
+                       MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
+                       MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
+                       MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+                       MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+                       MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+                       MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x17059
+                       MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
+                       MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
+                       MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
+                       MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
+                       MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
+               >;
+       };
+
+       pinctrl_wdog: wdoggrp {
+               fsl,pins = <
+                       MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
+               >;
+       };
+};
index 4741871..30ef603 100644 (file)
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "imx6ul-14x14-evk.dts"
+/dts-v1/;
+
+#include "imx6ull.dtsi"
+#include "imx6ul-14x14-evk.dtsi"
 
 / {
        model = "Freescale i.MX6 UlltraLite 14x14 EVK Board";