/// Register cleanup handler, which is used when the recovery context is
/// finished.
- /// The recovery context owns the the handler.
+ /// The recovery context owns the handler.
void registerCleanup(CrashRecoveryContextCleanup *cleanup);
void unregisterCleanup(CrashRecoveryContextCleanup *cleanup);
/// * 1 for each of the remaining characters.
int columnWidthUTF8(StringRef Text);
-/// Fold input unicode character according the the Simple unicode case folding
+/// Fold input unicode character according the Simple unicode case folding
/// rules.
int foldCharSimple(int C);
if (!NewSet.empty())
NodeSets.push_back(NewSet);
- // Create new nodes sets with the connected nodes any any remaining node that
+ // Create new nodes sets with the connected nodes any remaining node that
// has no predecessor.
for (unsigned i = 0; i < SUnits.size(); ++i) {
SUnit *SU = &SUnits[i];
DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr);
- // Make sure we we do any optimizations that will make it easier to fold
+ // Make sure we do any optimizations that will make it easier to fold
// source modifiers before obscuring it with bit operations.
// XXX - Why doesn't this get called when vector_shuffle is expanded?
// VCC, e.g. S_AND_B64 (vcc = V_CMP_...), (vcc = V_CMP_...)
//
// So, instead of forcing the instruction to write to VCC, we provide
- // a hint to the register allocator to use VCC and then we we will run
+ // a hint to the register allocator to use VCC and then we will run
// this pass again after RA and shrink it if it outputs to VCC.
MRI.setRegAllocationHint(MI.getOperand(0).getReg(), 0, AMDGPU::VCC);
continue;
// operands, the following check on the kill flag would suffice.
// if(!jmpInstr->getOperand(0).isKill()) break;
- // This predicate register is live out out of BB
+ // This predicate register is live out of BB
// this would only work if we can actually use Live
// variable analysis on phy regs - but LLVM does not
// provide LV analysis on phys regs.
void X86FlagsCopyLoweringPass::rewriteCopy(MachineInstr &MI,
MachineOperand &FlagUse,
MachineInstr &CopyDefI) {
- // Just replace this copy with the the original copy def.
+ // Just replace this copy with the original copy def.
MRI->replaceRegWith(MI.getOperand(0).getReg(),
CopyDefI.getOperand(0).getReg());
MI.eraseFromParent();
; If computeKnownSignBits (in SelectionDAG) can do a simple
-; look-thru for extractelement then we we know that the add will yield a
+; look-thru for extractelement then we know that the add will yield a
; non-negative result.
define i1 @test1(<4 x i16>* %in) {
; CHECK-LABEL: ! %bb.0:
; RUN: llc < %s -mtriple=i386-linux -mattr=+avx | FileCheck %s
-; In i386 there are only 8 XMMs (xmm0-xmm7), make sure we we are not creating illegal XMM
+; In i386 there are only 8 XMMs (xmm0-xmm7), make sure we are not creating illegal XMM
define float @only_xmm0_7(i32 %arg) {
top:
tail call void asm sideeffect "", "~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{dirflag},~{fpsr},~{flags}"()