riscv: dts: renesas: rzfive-smarc-som: Drop PHY interrupt support for ETH{0,1}

IRQC support for RZ/Five is still missing so drop the interrupts and
interrupt-parent properties from the PHY nodes of ETH{0,1}.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230102222708.274369-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
index 73941a5..d6f1875 100644 (file)
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
@@ -24,10 +24,20 @@
 
 &eth0 {
        status = "disabled";
+
+       phy0: ethernet-phy@7 {
+               /delete-property/ interrupt-parent;
+               /delete-property/ interrupts;
+       };
 };
 
 &eth1 {
        status = "disabled";
+
+       phy1: ethernet-phy@7 {
+               /delete-property/ interrupt-parent;
+               /delete-property/ interrupts;
+       };
 };
 
 &sdhi0 {