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arm64: dts: ls1028a: move Mali DP500 node into /soc
authorMichael Walle <michael@walle.cc>
Tue, 31 Aug 2021 13:40:08 +0000 (15:40 +0200)
committerShawn Guo <shawnguo@kernel.org>
Mon, 4 Oct 2021 13:00:14 +0000 (21:00 +0800)
Move it inside the /soc subnode because it is part of the CCSR space.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

index 9a65a71..92e4f00 100644 (file)
                        clock-names = "wdog_clk", "apb_pclk";
                };
 
+               malidp0: display@f080000 {
+                       compatible = "arm,mali-dp500";
+                       reg = <0x0 0xf080000 0x0 0x10000>;
+                       interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 223 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "DE", "SE";
+                       clocks = <&dpclk>,
+                                <&clockgen QORIQ_CLK_HWACCEL 2>,
+                                <&clockgen QORIQ_CLK_HWACCEL 2>,
+                                <&clockgen QORIQ_CLK_HWACCEL 2>;
+                       clock-names = "pxlclk", "mclk", "aclk", "pclk";
+                       arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+                       arm,malidp-arqos-value = <0xd000d000>;
+
+                       port {
+                               dpi0_out: endpoint {
+
+                               };
+                       };
+               };
+
                sai1: audio-controller@f100000 {
                        #sound-dai-cells = <0>;
                        compatible = "fsl,vf610-sai";
                };
        };
 
-       malidp0: display@f080000 {
-               compatible = "arm,mali-dp500";
-               reg = <0x0 0xf080000 0x0 0x10000>;
-               interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 223 IRQ_TYPE_LEVEL_HIGH>;
-               interrupt-names = "DE", "SE";
-               clocks = <&dpclk>,
-                        <&clockgen QORIQ_CLK_HWACCEL 2>,
-                        <&clockgen QORIQ_CLK_HWACCEL 2>,
-                        <&clockgen QORIQ_CLK_HWACCEL 2>;
-               clock-names = "pxlclk", "mclk", "aclk", "pclk";
-               arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
-               arm,malidp-arqos-value = <0xd000d000>;
-
-               port {
-                       dp0_out: endpoint {
-
-                       };
-               };
-       };
 };