arm64: tegra: Fixup SYSRAM references

The json-schema bindings for SRAM expect the nodes to be called "sram"
rather than "sysram" or "shmem". Furthermore, place the brackets around
the SYSRAM references such that a two-element array is created rather
than a two-element array nested in a single-element array. This is not
relevant for device tree itself, but allows the nodes to be properly
validated against json-schema bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 9ac4f01..5f81328 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -1771,7 +1771,7 @@
                iommus = <&smmu TEGRA186_SID_BPMP>;
                mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB
                                    TEGRA_HSP_DB_MASTER_BPMP>;
-               shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;
+               shmem = <&cpu_bpmp_tx>, <&cpu_bpmp_rx>;
                #clock-cells = <1>;
                #reset-cells = <1>;
                #power-domain-cells = <1>;

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 851e049..8d29b7f 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -2467,7 +2467,7 @@
                compatible = "nvidia,tegra186-bpmp";
                mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB
                                    TEGRA_HSP_DB_MASTER_BPMP>;
-               shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;
+               shmem = <&cpu_bpmp_tx>, <&cpu_bpmp_rx>;
                #clock-cells = <1>;
                #reset-cells = <1>;
                #power-domain-cells = <1>;

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index f0efb3a..28961ed 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -122,20 +122,20 @@
                };
        };
 
-       sysram@40000000 {
+       sram@40000000 {
                compatible = "nvidia,tegra234-sysram", "mmio-sram";
                reg = <0x0 0x40000000 0x0 0x50000>;
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0x0 0x0 0x40000000 0x50000>;
 
-               cpu_bpmp_tx: shmem@4e000 {
+               cpu_bpmp_tx: sram@4e000 {
                        reg = <0x4e000 0x1000>;
                        label = "cpu-bpmp-tx";
                        pool;
                };
 
-               cpu_bpmp_rx: shmem@4f000 {
+               cpu_bpmp_rx: sram@4f000 {
                        reg = <0x4f000 0x1000>;
                        label = "cpu-bpmp-rx";
                        pool;
@@ -146,7 +146,7 @@
                compatible = "nvidia,tegra234-bpmp", "nvidia,tegra186-bpmp";
                mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB
                                    TEGRA_HSP_DB_MASTER_BPMP>;
-               shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;
+               shmem = <&cpu_bpmp_tx>, <&cpu_bpmp_rx>;
                #clock-cells = <1>;
                #reset-cells = <1>;
                #power-domain-cells = <1>;