[NFC][Codegen] Potential add/sub constant folding: fixup non-splat tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362114 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/AArch64/addsub-constant-folding.ll b/test/CodeGen/AArch64/addsub-constant-folding.ll
index 6d0f223..38c3dfd 100644 (file)
--- a/test/CodeGen/AArch64/addsub-constant-folding.ll
+++ b/test/CodeGen/AArch64/addsub-constant-folding.ll
@@ -94,10 +94,13 @@ define <4 x i32> @add_const_sub_const_nonsplat(<4 x i32> %arg) {
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    adrp x8, .LCPI5_0
 ; CHECK-NEXT:    ldr q1, [x8, :lo12:.LCPI5_0]
-; CHECK-NEXT:    sub v0.4s, v1.4s, v0.4s
+; CHECK-NEXT:    adrp x8, .LCPI5_1
+; CHECK-NEXT:    ldr q2, [x8, :lo12:.LCPI5_1]
+; CHECK-NEXT:    add v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    sub v0.4s, v0.4s, v2.4s
 ; CHECK-NEXT:    ret
   %t0 = add <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
-  %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0
+  %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
   ret <4 x i32> %t1
 }
 
@@ -245,10 +248,13 @@ define <4 x i32> @sub_const_sub_const_nonsplat(<4 x i32> %arg) {
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    adrp x8, .LCPI14_0
 ; CHECK-NEXT:    ldr q1, [x8, :lo12:.LCPI14_0]
-; CHECK-NEXT:    sub v0.4s, v1.4s, v0.4s
+; CHECK-NEXT:    adrp x8, .LCPI14_1
+; CHECK-NEXT:    ldr q2, [x8, :lo12:.LCPI14_1]
+; CHECK-NEXT:    sub v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    sub v0.4s, v0.4s, v2.4s
 ; CHECK-NEXT:    ret
   %t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
-  %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0
+  %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
   ret <4 x i32> %t1
 }
 
@@ -393,11 +399,11 @@ define <4 x i32> @const_sub_sub_const_nonsplat(<4 x i32> %arg) {
 ; CHECK-NEXT:    ldr q1, [x8, :lo12:.LCPI23_0]
 ; CHECK-NEXT:    adrp x8, .LCPI23_1
 ; CHECK-NEXT:    ldr q2, [x8, :lo12:.LCPI23_1]
-; CHECK-NEXT:    sub v0.4s, v0.4s, v1.4s
-; CHECK-NEXT:    add v0.4s, v0.4s, v2.4s
+; CHECK-NEXT:    sub v0.4s, v1.4s, v0.4s
+; CHECK-NEXT:    sub v0.4s, v0.4s, v2.4s
 ; CHECK-NEXT:    ret
   %t0 = sub <4 x i32> <i32 21, i32 undef, i32 8, i32 8>, %arg
-  %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0
+  %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
   ret <4 x i32> %t1
 }
 

diff --git a/test/CodeGen/X86/addsub-constant-folding.ll b/test/CodeGen/X86/addsub-constant-folding.ll
index 100c366..dc9ee4c 100644 (file)
--- a/test/CodeGen/X86/addsub-constant-folding.ll
+++ b/test/CodeGen/X86/addsub-constant-folding.ll
@@ -126,19 +126,17 @@ define <4 x i32> @add_const_sub_const_extrause(<4 x i32> %arg) {
 define <4 x i32> @add_const_sub_const_nonsplat(<4 x i32> %arg) {
 ; X86-LABEL: add_const_sub_const_nonsplat:
 ; X86:       # %bb.0:
-; X86-NEXT:    movdqa {{.*#+}} xmm1 = <4294967277,u,u,4294967290>
-; X86-NEXT:    psubd %xmm0, %xmm1
-; X86-NEXT:    movdqa %xmm1, %xmm0
+; X86-NEXT:    paddd {{\.LCPI.*}}, %xmm0
+; X86-NEXT:    psubd {{\.LCPI.*}}, %xmm0
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: add_const_sub_const_nonsplat:
 ; X64:       # %bb.0:
-; X64-NEXT:    movdqa {{.*#+}} xmm1 = <4294967277,u,u,4294967290>
-; X64-NEXT:    psubd %xmm0, %xmm1
-; X64-NEXT:    movdqa %xmm1, %xmm0
+; X64-NEXT:    paddd {{.*}}(%rip), %xmm0
+; X64-NEXT:    psubd {{.*}}(%rip), %xmm0
 ; X64-NEXT:    retq
   %t0 = add <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
-  %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0
+  %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
   ret <4 x i32> %t1
 }
 
@@ -341,19 +339,17 @@ define <4 x i32> @sub_const_sub_const_extrause(<4 x i32> %arg) {
 define <4 x i32> @sub_const_sub_const_nonsplat(<4 x i32> %arg) {
 ; X86-LABEL: sub_const_sub_const_nonsplat:
 ; X86:       # %bb.0:
-; X86-NEXT:    movdqa {{.*#+}} xmm1 = <23,u,u,10>
-; X86-NEXT:    psubd %xmm0, %xmm1
-; X86-NEXT:    movdqa %xmm1, %xmm0
+; X86-NEXT:    psubd {{\.LCPI.*}}, %xmm0
+; X86-NEXT:    psubd {{\.LCPI.*}}, %xmm0
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: sub_const_sub_const_nonsplat:
 ; X64:       # %bb.0:
-; X64-NEXT:    movdqa {{.*#+}} xmm1 = <23,u,u,10>
-; X64-NEXT:    psubd %xmm0, %xmm1
-; X64-NEXT:    movdqa %xmm1, %xmm0
+; X64-NEXT:    psubd {{.*}}(%rip), %xmm0
+; X64-NEXT:    psubd {{.*}}(%rip), %xmm0
 ; X64-NEXT:    retq
   %t0 = sub <4 x i32> %arg, <i32 21, i32 undef, i32 8, i32 8>
-  %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0
+  %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
   ret <4 x i32> %t1
 }
 
@@ -569,17 +565,21 @@ define <4 x i32> @const_sub_sub_const_extrause(<4 x i32> %arg) {
 define <4 x i32> @const_sub_sub_const_nonsplat(<4 x i32> %arg) {
 ; X86-LABEL: const_sub_sub_const_nonsplat:
 ; X86:       # %bb.0:
-; X86-NEXT:    psubd {{\.LCPI.*}}, %xmm0
-; X86-NEXT:    paddd {{\.LCPI.*}}, %xmm0
+; X86-NEXT:    movdqa {{.*#+}} xmm1 = <21,u,8,8>
+; X86-NEXT:    psubd %xmm0, %xmm1
+; X86-NEXT:    psubd {{\.LCPI.*}}, %xmm1
+; X86-NEXT:    movdqa %xmm1, %xmm0
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: const_sub_sub_const_nonsplat:
 ; X64:       # %bb.0:
-; X64-NEXT:    psubd {{.*}}(%rip), %xmm0
-; X64-NEXT:    paddd {{.*}}(%rip), %xmm0
+; X64-NEXT:    movdqa {{.*#+}} xmm1 = <21,u,8,8>
+; X64-NEXT:    psubd %xmm0, %xmm1
+; X64-NEXT:    psubd {{.*}}(%rip), %xmm1
+; X64-NEXT:    movdqa %xmm1, %xmm0
 ; X64-NEXT:    retq
   %t0 = sub <4 x i32> <i32 21, i32 undef, i32 8, i32 8>, %arg
-  %t1 = sub <4 x i32> <i32 2, i32 3, i32 undef, i32 2>, %t0
+  %t1 = sub <4 x i32> %t0, <i32 2, i32 3, i32 undef, i32 2>
   ret <4 x i32> %t1
 }