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iavf: Fix cached head and tail value for iavf_get_tx_pending
authorBrett Creeley <brett.creeley@intel.com>
Thu, 1 Sep 2022 14:34:40 +0000 (16:34 +0200)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Thu, 8 Sep 2022 20:22:25 +0000 (13:22 -0700)
The underlying hardware may or may not allow reading of the head or tail
registers and it really makes no difference if we use the software
cached values. So, always used the software cached values.

Fixes: 9c6c12595b73 ("i40e: Detection and recovery of TX queue hung logic moved to service_task from tx_timeout")
Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Co-developed-by: Norbert Zulinski <norbertx.zulinski@intel.com>
Signed-off-by: Norbert Zulinski <norbertx.zulinski@intel.com>
Signed-off-by: Mateusz Palczewski <mateusz.palczewski@intel.com>
Tested-by: Konrad Jankowski <konrad0.jankowski@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/iavf/iavf_txrx.c

index 06d1879..4c3f3f4 100644 (file)
@@ -114,8 +114,11 @@ u32 iavf_get_tx_pending(struct iavf_ring *ring, bool in_sw)
 {
        u32 head, tail;
 
+       /* underlying hardware might not allow access and/or always return
+        * 0 for the head/tail registers so just use the cached values
+        */
        head = ring->next_to_clean;
-       tail = readl(ring->tail);
+       tail = ring->next_to_use;
 
        if (head != tail)
                return (head < tail) ?