-Wa,-msoft-float is tested with as-option, which will be a problem for
clang with an upcoming change to move as-option to use KBUILD_AFLAGS
instead of KBUILD_CFLAGS due to a lack of '-mno-abicalls' in
KBUILD_AFLAGS at the point that this check occurs; $(cflags-y) is added
to KBUILD_AFLAGS towards the end of this file.
clang: error: ignoring '-fno-PIE' option as it cannot be used with implicit usage of -mabicalls and the N64 ABI [-Werror,-Woption-ignored]
This could be resolved by switching to a cc-option check but
'$(cflags-y)' would need to be added so that '-mno-abicalls' is present
for the test. However, this check is no longer necessary, as
-msoft-float is supported by all supported assembler versions (GNU as
2.25+ and LLVM 11+). Eliminate GAS_HAS_SET_HARDFLOAT and all of its
uses, inlining SET_HARDFLOAT where necessary.
Link: https://lore.kernel.org/202209101939.bvk64Fok-lkp@intel.com/
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
# crossformat linking we rely on the elf2ecoff tool for format conversion.
#
cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
-cflags-y += -msoft-float
+cflags-y += -msoft-float -Wa,-msoft-float
LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
KBUILD_AFLAGS_MODULE += -mlong-calls
KBUILD_CFLAGS_MODULE += -mlong-calls
LDFLAGS_vmlinux += --emit-relocs
endif
-#
-# pass -msoft-float to GAS if it supports it. However on newer binutils
-# (specifically newer than 2.24.51.20140728) we then also need to explicitly
-# set ".set hardfloat" in all files which manipulate floating point registers.
-#
-ifneq ($(call as-option,-Wa$(comma)-msoft-float,),)
- cflags-y += -DGAS_HAS_SET_HARDFLOAT -Wa,-msoft-float
-endif
-
cflags-y += -ffreestanding
cflags-$(CONFIG_CPU_BIG_ENDIAN) += -EB
.macro fpu_save_single thread tmp=t0
.set push
- SET_HARDFLOAT
+ .set hardfloat
cfc1 \tmp, fcr31
s.d $f0, THREAD_FPR0(\thread)
s.d $f2, THREAD_FPR2(\thread)
.macro fpu_restore_single thread tmp=t0
.set push
- SET_HARDFLOAT
+ .set hardfloat
lw \tmp, THREAD_FCR31(\thread)
l.d $f0, THREAD_FPR0(\thread)
l.d $f2, THREAD_FPR2(\thread)
.macro fpu_save_16even thread tmp=t0
.set push
- SET_HARDFLOAT
+ .set hardfloat
cfc1 \tmp, fcr31
sdc1 $f0, THREAD_FPR0(\thread)
sdc1 $f2, THREAD_FPR2(\thread)
.set push
.set mips64r2
.set fp=64
- SET_HARDFLOAT
+ .set hardfloat
sdc1 $f1, THREAD_FPR1(\thread)
sdc1 $f3, THREAD_FPR3(\thread)
sdc1 $f5, THREAD_FPR5(\thread)
.macro fpu_restore_16even thread tmp=t0
.set push
- SET_HARDFLOAT
+ .set hardfloat
lw \tmp, THREAD_FCR31(\thread)
ldc1 $f0, THREAD_FPR0(\thread)
ldc1 $f2, THREAD_FPR2(\thread)
.set push
.set mips64r2
.set fp=64
- SET_HARDFLOAT
+ .set hardfloat
ldc1 $f1, THREAD_FPR1(\thread)
ldc1 $f3, THREAD_FPR3(\thread)
ldc1 $f5, THREAD_FPR5(\thread)
.macro _cfcmsa rd, cs
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x787e0059 | (\cs << 11)
insn32_if_mm 0x587e0056 | (\cs << 11)
move \rd, $1
.macro _ctcmsa cd, rs
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
move $1, \rs
insn_if_mips 0x783e0819 | (\cd << 6)
insn32_if_mm 0x583e0816 | (\cd << 6)
.macro ld_b wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000820 | (\wd << 6)
insn32_if_mm 0x58000807 | (\wd << 6)
.macro ld_h wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000821 | (\wd << 6)
insn32_if_mm 0x58000817 | (\wd << 6)
.macro ld_w wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000822 | (\wd << 6)
insn32_if_mm 0x58000827 | (\wd << 6)
.macro ld_d wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000823 | (\wd << 6)
insn32_if_mm 0x58000837 | (\wd << 6)
.macro st_b wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000824 | (\wd << 6)
insn32_if_mm 0x5800080f | (\wd << 6)
.macro st_h wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000825 | (\wd << 6)
insn32_if_mm 0x5800081f | (\wd << 6)
.macro st_w wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000826 | (\wd << 6)
insn32_if_mm 0x5800082f | (\wd << 6)
.macro st_d wd, off, base
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
PTR_ADDU $1, \base, \off
insn_if_mips 0x78000827 | (\wd << 6)
insn32_if_mm 0x5800083f | (\wd << 6)
.macro copy_s_w ws, n
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x78b00059 | (\n << 16) | (\ws << 11)
insn32_if_mm 0x58b00056 | (\n << 16) | (\ws << 11)
.set pop
.macro copy_s_d ws, n
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x78b80059 | (\n << 16) | (\ws << 11)
insn32_if_mm 0x58b80056 | (\n << 16) | (\ws << 11)
.set pop
.macro insert_w wd, n
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x79300819 | (\n << 16) | (\wd << 6)
insn32_if_mm 0x59300816 | (\n << 16) | (\wd << 6)
.set pop
.macro insert_d wd, n
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
insn_if_mips 0x79380819 | (\n << 16) | (\wd << 6)
insn32_if_mm 0x59380816 | (\n << 16) | (\wd << 6)
.set pop
st_d 29, THREAD_FPR29 - FPR_BASE_OFFS, FPR_BASE
st_d 30, THREAD_FPR30 - FPR_BASE_OFFS, FPR_BASE
st_d 31, THREAD_FPR31 - FPR_BASE_OFFS, FPR_BASE
- SET_HARDFLOAT
+ .set hardfloat
_cfcmsa $1, MSA_CSR
sw $1, THREAD_MSA_CSR(\thread)
.set pop
.macro msa_restore_all thread
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
lw $1, THREAD_MSA_CSR(\thread)
_ctcmsa MSA_CSR, $1
#ifdef TOOLCHAIN_SUPPORTS_MSA
.macro msa_init_all_upper
.set push
.set noat
- SET_HARDFLOAT
+ .set hardfloat
not $1, zero
msa_init_upper 0
msa_init_upper 1
#include <asm/sgidefs.h>
-/*
- * starting with binutils 2.24.51.20140729, MIPS binutils warn about mixing
- * hardfloat and softfloat object files. The kernel build uses soft-float by
- * default, so we also need to pass -msoft-float along to GAS if it supports it.
- * But this in turn causes assembler errors in files which access hardfloat
- * registers. We detect if GAS supports "-msoft-float" in the Makefile and
- * explicitly put ".set hardfloat" where floating point registers are touched.
- */
-#ifdef GAS_HAS_SET_HARDFLOAT
-#define SET_HARDFLOAT .set hardfloat
-#else
-#define SET_HARDFLOAT
-#endif
-
#if _MIPS_SIM == _MIPS_SIM_ABI32
/*
/*
* Macros to access the floating point coprocessor control registers
*/
-#define _read_32bit_cp1_register(source, gas_hardfloat) \
+#define read_32bit_cp1_register(source) \
({ \
unsigned int __res; \
\
" # gas fails to assemble cfc1 for some archs, \n" \
" # like Octeon. \n" \
" .set mips1 \n" \
- " "STR(gas_hardfloat)" \n" \
+ " .set hardfloat \n" \
" cfc1 %0,"STR(source)" \n" \
" .set pop \n" \
: "=r" (__res)); \
__res; \
})
-#define _write_32bit_cp1_register(dest, val, gas_hardfloat) \
+#define write_32bit_cp1_register(dest, val) \
do { \
__asm__ __volatile__( \
" .set push \n" \
" .set reorder \n" \
- " "STR(gas_hardfloat)" \n" \
+ " .set hardfloat \n" \
" ctc1 %0,"STR(dest)" \n" \
" .set pop \n" \
: : "r" (val)); \
} while (0)
-#ifdef GAS_HAS_SET_HARDFLOAT
-#define read_32bit_cp1_register(source) \
- _read_32bit_cp1_register(source, .set hardfloat)
-#define write_32bit_cp1_register(dest, val) \
- _write_32bit_cp1_register(dest, val, .set hardfloat)
-#else
-#define read_32bit_cp1_register(source) \
- _read_32bit_cp1_register(source, )
-#define write_32bit_cp1_register(dest, val) \
- _write_32bit_cp1_register(dest, val, )
-#endif
-
#ifdef TOOLCHAIN_SUPPORTS_DSP
#define rddsp(mask) \
({ \
.set push
/* gas fails to assemble cfc1 for some archs (octeon).*/ \
.set mips1
- SET_HARDFLOAT
+ .set hardfloat
cfc1 a1, fcr31
.set pop
.endm
*/
LEAF(_save_fp_context)
.set push
- SET_HARDFLOAT
+ .set hardfloat
li v0, 0 # assume success
cfc1 t1, fcr31
EX2(s.d $f0, 0(a0))
*/
LEAF(_restore_fp_context)
.set push
- SET_HARDFLOAT
+ .set hardfloat
li v0, 0 # assume success
EX(lw t0, (a1))
EX2(l.d $f0, 0(a0))
.macro EX insn, reg, src
.set push
- SET_HARDFLOAT
+ .set hardfloat
.set nomacro
.ex\@: \insn \reg, \src
.set pop
*/
LEAF(_save_fp_context)
.set push
- SET_HARDFLOAT
+ .set hardfloat
cfc1 t1, fcr31
.set pop
#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
defined(CONFIG_CPU_MIPSR5) || defined(CONFIG_CPU_MIPSR6)
.set push
- SET_HARDFLOAT
+ .set hardfloat
#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5)
.set mips32r2
.set fp=64
#endif
.set push
- SET_HARDFLOAT
+ .set hardfloat
/* Store the 16 even double precision registers */
EX sdc1 $f0, 0(a0)
EX sdc1 $f2, 16(a0)
#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPSR2) || \
defined(CONFIG_CPU_MIPSR5) || defined(CONFIG_CPU_MIPSR6)
.set push
- SET_HARDFLOAT
+ .set hardfloat
#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR5)
.set mips32r2
.set fp=64
1: .set pop
#endif
.set push
- SET_HARDFLOAT
+ .set hardfloat
EX ldc1 $f0, 0(a0)
EX ldc1 $f2, 16(a0)
EX ldc1 $f4, 32(a0)
LEAF(__kvm_save_fpu)
.set push
- SET_HARDFLOAT
+ .set hardfloat
.set fp=64
mfc0 t0, CP0_STATUS
sll t0, t0, 5 # is Status.FR set?
LEAF(__kvm_restore_fpu)
.set push
- SET_HARDFLOAT
+ .set hardfloat
.set fp=64
mfc0 t0, CP0_STATUS
sll t0, t0, 5 # is Status.FR set?
LEAF(__kvm_restore_fcsr)
.set push
- SET_HARDFLOAT
+ .set hardfloat
lw t0, VCPU_FCR31(a0)
/*
* The ctc1 must stay at this offset in __kvm_restore_fcsr.