msm: ipa: do not use delay in SSR

In some rare race condition during SSR, modem might
programmed commands to IPA to lock the pipe, and AP will
enable delay on this pipe which will prevent IPA to read
unlock command. In this case IPA HW will be stalled as it
is locked forever on this pipe.

CRs-Fixed: 1040724
Change-Id: Ifc874c9e881eb1b3ccea321679bb272cd427fabb
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>

diff --git a/drivers/platform/msm/ipa/ipa_v2/ipa.c b/drivers/platform/msm/ipa/ipa_v2/ipa.c
index 1f9fd7a..cb808bd 100644 (file)
--- a/drivers/platform/msm/ipa/ipa_v2/ipa.c
+++ b/drivers/platform/msm/ipa/ipa_v2/ipa.c
@@ -1524,7 +1524,7 @@ static void ipa_free_buffer(void *user1, int user2)
        kfree(user1);
 }
 
-static int ipa_q6_pipe_delay(bool zip_pipes)
+int ipa_q6_pipe_delay(bool zip_pipes)
 {
        u32 reg_val = 0;
        int client_idx;
@@ -1911,14 +1911,14 @@ int ipa_q6_pre_shutdown_cleanup(void)
                BUG();
 
        IPA_ACTIVE_CLIENTS_INC_SPECIAL("Q6");
+
        /*
-        * pipe delay and holb discard for ZIP pipes are handled
-        * in post shutdown callback.
+        * Do not delay Q6 pipes here. This may result in IPA reading a
+        * DMA_TASK with lock bit set and then Q6 pipe delay is set. In this
+        * situation IPA will be remain locked as the DMA_TASK with unlock
+        * bit will not be read by IPA as pipe delay is enabled. IPA uC will
+        * wait for pipe to be empty before issuing a BAM pipe reset.
         */
-       if (ipa_q6_pipe_delay(false)) {
-               IPAERR("Failed to delay Q6 pipes\n");
-               BUG();
-       }
 
        if (ipa_q6_monitor_holb_mitigation(false)) {
                IPAERR("Failed to disable HOLB monitroing on Q6 pipes\n");
@@ -1958,13 +1958,13 @@ int ipa_q6_post_shutdown_cleanup(void)
        int res;
 
        /*
-        * pipe delay and holb discard for ZIP pipes are handled in
-        * post shutdown.
+        * Do not delay Q6 pipes here. This may result in IPA reading a
+        * DMA_TASK with lock bit set and then Q6 pipe delay is set. In this
+        * situation IPA will be remain locked as the DMA_TASK with unlock
+        * bit will not be read by IPA as pipe delay is enabled. IPA uC will
+        * wait for pipe to be empty before issuing a BAM pipe reset.
         */
-       if (ipa_q6_pipe_delay(true)) {
-               IPAERR("Failed to delay Q6 ZIP pipes\n");
-               BUG();
-       }
+
        if (ipa_q6_avoid_holb(true)) {
                IPAERR("Failed to set HOLB on Q6 ZIP pipes\n");
                BUG();