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radeonsi/gfx9: fix an oversight in primitive binning code
author
Marek Olšák
<marek.olsak@amd.com>
Wed, 3 Jul 2019 02:31:14 +0000
(22:31 -0400)
committer
Marek Olšák
<marek.olsak@amd.com>
Tue, 9 Jul 2019 21:24:16 +0000
(17:24 -0400)
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
src/gallium/drivers/radeonsi/si_state_binning.c
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diff --git
a/src/gallium/drivers/radeonsi/si_state_binning.c
b/src/gallium/drivers/radeonsi/si_state_binning.c
index
b3c397c
..
5f280ae
100644
(file)
--- a/
src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/
src/gallium/drivers/radeonsi/si_state_binning.c
@@
-196,7
+196,7
@@
static struct uvec2 si_get_depth_bin_size(struct si_context *sctx)
unsigned stencil_coeff = tex->surface.has_stencil &&
dsa->stencil_enabled ? 1 : 0;
unsigned sum = 4 * (depth_coeff + stencil_coeff) *
-
tex->buffer.b.b.nr_samples
;
+
MAX2(tex->buffer.b.b.nr_samples, 1)
;
static const si_bin_size_subtable table[] = {
{