def FeaturePredCtrl : SubtargetFeature<"predctrl", "HasPredCtrl", "true",
"Enable execution and data prediction invalidation instructions" >;
+def FeatureCacheDeepPersist : SubtargetFeature<"ccdp", "HasCCDP",
+ "true", "Enable Cache Clean to Point of Deep Persistence" >;
+
//===----------------------------------------------------------------------===//
// Architectures.
//
def HasV8_5aOps : SubtargetFeature<
"v8.5a", "HasV8_5aOps", "true", "Support ARM v8.5a instructions",
[HasV8_4aOps, FeatureAltFPCmp, FeatureFRInt3264, FeatureSpecCtrl,
- FeaturePredCtrl]
+ FeaturePredCtrl, FeatureCacheDeepPersist]
>;
//===----------------------------------------------------------------------===//
AssemblerPredicate<"FeatureSpecCtrl", "specctrl">;
def HasPredCtrl : Predicate<"Subtarget->hasPredCtrl()">,
AssemblerPredicate<"FeaturePredCtrl", "predctrl">;
+def HasCCDP : Predicate<"Subtarget->hasCCDP()">,
+ AssemblerPredicate<"FeatureCacheDeepPersist", "ccdp">;
def IsLE : Predicate<"Subtarget->isLittleEndian()">;
def IsBE : Predicate<"!Subtarget->isLittleEndian()">;
def UseAlternateSExtLoadCVTF32
bool HasFRInt3264 = false;
bool HasSpecCtrl = false;
bool HasPredCtrl = false;
+ bool HasCCDP = false;
// HasZeroCycleRegMove - Has zero-cycle register mov instructions.
bool HasZeroCycleRegMove = false;
bool hasFRInt3264() const { return HasFRInt3264; }
bool hasSpecCtrl() { return HasSpecCtrl; }
bool hasPredCtrl() { return HasPredCtrl; }
+ bool hasCCDP() { return HasCCDP; }
bool isLittleEndian() const { return IsLittle; }
let Requires = [{ {AArch64::HasV8_2aOps} }] in
def : DC<"CVAP", 0b011, 0b0111, 0b1100, 0b001>;
+let Requires = [{ {AArch64::FeatureCacheDeepPersist} }] in
+def : DC<"CVADP", 0b011, 0b0111, 0b1101, 0b001>;
+
//===----------------------------------------------------------------------===//
// IC (instruction cache maintenance) instruction options.
//===----------------------------------------------------------------------===//
{ "ras", {AArch64::FeatureRAS} },
{ "lse", {AArch64::FeatureLSE} },
{ "predctrl", {AArch64::FeaturePredCtrl} },
+ { "ccdp", {AArch64::FeatureCacheDeepPersist} },
// FIXME: Unsupported extensions
{ "pan", {} },
}
break;
// DC aliases
- case 4: case 6: case 10: case 11: case 12: case 14:
+ case 4: case 6: case 10: case 11: case 12: case 13: case 14:
{
const AArch64DC::DC *DC = AArch64DC::lookupDCByEncoding(Encoding);
if (!DC || !DC->haveFeatures(STI.getFeatureBits()))
--- /dev/null
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+ccdp < %s | FileCheck %s
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.5a < %s | FileCheck %s
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-ccdp < %s 2>&1 | FileCheck %s --check-prefix=NOCCDP
+
+dc cvadp, x7
+// CHECK: dc cvadp, x7 // encoding: [0x27,0x7d,0x0b,0xd5]
+// NOCCDP: error: DC CVADP requires ccdp
--- /dev/null
+# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+ccdp --disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.5a --disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=-ccdp --disassemble < %s | FileCheck %s --check-prefix=NOCCDP
+
+[0x27,0x7d,0x0b,0xd5]
+# CHECK: dc cvadp, x7
+# NOCCDP: sys #3, c7, c13, #1, x7