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i965: set BRW_MASK_DISABLE flag in "send" instruction in brw_dp_READ_4()
authorBrian Paul <brianp@vmware.com>
Thu, 9 Apr 2009 01:35:24 +0000 (19:35 -0600)
committerBrian Paul <brianp@vmware.com>
Thu, 9 Apr 2009 01:37:33 +0000 (19:37 -0600)
This fixes the random results that were seen when fetching a constant
inside an IF/ELSE clause.  Disabling the execution mask ensures that all
the components of the register are written.

src/mesa/drivers/dri/i965/brw_eu_emit.c

index 21ce836..220c3af 100644 (file)
@@ -978,9 +978,10 @@ void brw_dp_READ_4( struct brw_compile *p,
    {
       struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
    
-      insn->header.predicate_control = 0; /* XXX */
+      insn->header.predicate_control = BRW_PREDICATE_NONE;
       insn->header.compression_control = BRW_COMPRESSION_NONE; 
       insn->header.destreg__conditonalmod = msg_reg_nr;
+      insn->header.mask_control = BRW_MASK_DISABLE;
   
       /* cast dest to a uword[8] vector */
       dest = retype(vec8(dest), BRW_REGISTER_TYPE_UW);