case HAL_RATE_CONTROL_VBR_VFR:
pkt->rg_property_data[1] = HFI_RATE_CONTROL_VBR_VFR;
break;
+ case HAL_RATE_CONTROL_MBR_CFR:
+ pkt->rg_property_data[1] = HFI_RATE_CONTROL_MBR_CFR;
+ break;
+ case HAL_RATE_CONTROL_MBR_VFR:
+ pkt->rg_property_data[1] = HFI_RATE_CONTROL_MBR_VFR;
+ break;
default:
dprintk(VIDC_ERR,
"Invalid Rate control setting: %p\n",
"VBR CFR",
"CBR VFR",
"CBR CFR",
+ "MBR CFR",
+ "MBR VFR",
NULL
};
.name = "Video Framerate and Bitrate Control",
.type = V4L2_CTRL_TYPE_MENU,
.minimum = V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_OFF,
- .maximum = V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_CBR_CFR,
+ .maximum = V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_VFR,
.default_value = V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_OFF,
.step = 0,
.menu_skip_mask = ~(
(1 << V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_VBR_VFR) |
(1 << V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_VBR_CFR) |
(1 << V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_CBR_VFR) |
- (1 << V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_CBR_CFR)
+ (1 << V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_CBR_CFR) |
+ (1 << V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_CFR) |
+ (1 << V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_VFR)
),
.qmenu = mpeg_video_rate_control,
},
case V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_VBR_CFR:
update_ctrl.val =
V4L2_MPEG_VIDEO_BITRATE_MODE_VBR;
+ break;
case V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_CBR_VFR:
case V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_CBR_CFR:
+ case V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_CFR:
+ case V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_VFR:
update_ctrl.val =
V4L2_MPEG_VIDEO_BITRATE_MODE_CBR;
+ break;
}
final_mode = ctrl->val;
#define HFI_RATE_CONTROL_VBR_CFR (HFI_OX_BASE + 0x3)
#define HFI_RATE_CONTROL_CBR_VFR (HFI_OX_BASE + 0x4)
#define HFI_RATE_CONTROL_CBR_CFR (HFI_OX_BASE + 0x5)
+#define HFI_RATE_CONTROL_MBR_CFR (HFI_OX_BASE + 0x6)
+#define HFI_RATE_CONTROL_MBR_VFR (HFI_OX_BASE + 0x7)
+
struct hfi_uncompressed_plane_actual_constraints_info {
u32 buffer_type;
HAL_RATE_CONTROL_VBR_CFR,
HAL_RATE_CONTROL_CBR_VFR,
HAL_RATE_CONTROL_CBR_CFR,
+ HAL_RATE_CONTROL_MBR_CFR,
+ HAL_RATE_CONTROL_MBR_VFR,
HAL_UNUSED_RC = 0x10000000,
};
V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_VBR_CFR = 2,
V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_CBR_VFR = 3,
V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_CBR_CFR = 4,
+ V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_CFR = 5,
+ V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_VFR = 6,
};
+#define V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_CFR \
+ V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_CFR
+#define V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_VFR \
+ V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_MBR_VFR
#define V4L2_CID_MPEG_VIDC_VIDEO_ROTATION (V4L2_CID_MPEG_MSM_VIDC_BASE+14)
enum v4l2_mpeg_vidc_video_rotation {