drm/amdkfd: Enable HW_UPDATE_RPTR on GC 9.4.3

GC 9.4.3 uses the hardware to update AQL queues read pointer, so
remove CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK flag from MQD if it's
GC 9.4.3, and keep it for other existing gfx9 ASICs.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
index 4dfae19..fdbfd72 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
@@ -224,6 +224,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
                        struct queue_properties *q,
                        struct mqd_update_info *minfo)
 {
+       struct amdgpu_device *adev = (struct amdgpu_device *)mm->dev->adev;
        struct v9_mqd *m;
 
        m = get_mqd(mqd);
@@ -269,10 +270,13 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
        m->cp_hqd_vmid = q->vmid;
 
        if (q->format == KFD_QUEUE_FORMAT_AQL) {
-               m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK |
+               m->cp_hqd_pq_control |=
                                2 << CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT |
                                1 << CP_HQD_PQ_CONTROL__QUEUE_FULL_EN__SHIFT |
                                1 << CP_HQD_PQ_CONTROL__WPP_CLAMP_EN__SHIFT;
+               if (adev->ip_versions[GC_HWIP][0] != IP_VERSION(9, 4, 3))
+                       m->cp_hqd_pq_control |=
+                                CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK;
                m->cp_hqd_pq_doorbell_control |= 1 <<
                        CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT;
        }