rx: DTS update

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

diff --git a/arch/rx/boot/dts/rx_sim.dts b/arch/rx/boot/dts/rx_sim.dts
index 6634adf..c3192c6 100644 (file)
--- a/arch/rx/boot/dts/rx_sim.dts
+++ b/arch/rx/boot/dts/rx_sim.dts
@@ -65,20 +65,19 @@
                interrupt-controller;
                reg = <0x00087000 0x600>;
        };
-       
-       tpu: timer@00088100 {
-               compatible = "renesas,rx-tpu";
-               reg = <0x00088100 0x70>;
-               clocks = <&pclk>;
-               clock-names = "fck";
-       };
        cmt: timer@00088000 {
                compatible = "renesas,rx-cmt";
                reg = <0x00088000 0x70>;
                clocks = <&pclk>;
+               clock-names = "fck";
                interrupts = <28 0>;
        };
-               
+       tpu: timer@00088100 {
+               compatible = "renesas,rx-tpu";
+               reg = <0x00088100 0x70>;
+               clocks = <&pclk>;
+               clock-names = "fck";
+       };
        sci0: serial@00088240 {
                compatible = "renesas,sci";
                reg = <0x00088240 8>;

diff --git a/arch/rx/boot/dts/tkdn_rx62n.dts b/arch/rx/boot/dts/tkdn_rx62n.dts
index 4ab59c2..9ec2e1b 100644 (file)
--- a/arch/rx/boot/dts/tkdn_rx62n.dts
+++ b/arch/rx/boot/dts/tkdn_rx62n.dts
@@ -51,7 +51,7 @@
                cpu@0 {
                        compatible = "renesas,rx";
                        clock-frequency = <96000000>;
-                       mem-cycle = <6>;
+                       mem-cycle = <1>;
                };
        };
        memory@08000000 {
@@ -94,4 +94,17 @@
                clocks = <&pclk>;
                clock-names = "sci_ick";
        };
+       ether: ethernet@000c0000 {
+               compatible = "renesas,ether-rx62n";
+               reg = <0x000c0000 0x200>;
+               interrupts = <32 0>;
+               phy-mode = "rmii";
+               phy-handle = <&phy1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               phy1: ethernet-phy@0 {
+                     reg = <0>;
+                     interrupt-parent = <&rxicu>;
+               };
+       };
 };