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drm/amdgpu: Remove duplicate code in gfx_v9_0.c
authorRex Zhu <Rex.Zhu@amd.com>
Fri, 17 Aug 2018 08:42:35 +0000 (16:42 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 27 Aug 2018 20:11:42 +0000 (15:11 -0500)
There are no any logical changes here.

1. if kcq can be enabled via kiq, we don't need to
   do kiq ring test.
2. amdgpu_ring_test_ring function can be used to
   sync the ring complete, remove the duplicate code.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index ab5cace..37c95c4 100644 (file)
@@ -2666,7 +2666,6 @@ static void gfx_v9_0_kiq_setting(struct amdgpu_ring *ring)
 static int gfx_v9_0_kiq_kcq_enable(struct amdgpu_device *adev)
 {
        struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring;
-       uint32_t scratch, tmp = 0;
        uint64_t queue_mask = 0;
        int r, i;
 
@@ -2685,17 +2684,10 @@ static int gfx_v9_0_kiq_kcq_enable(struct amdgpu_device *adev)
                queue_mask |= (1ull << i);
        }
 
-       r = amdgpu_gfx_scratch_get(adev, &scratch);
-       if (r) {
-               DRM_ERROR("Failed to get scratch reg (%d).\n", r);
-               return r;
-       }
-       WREG32(scratch, 0xCAFEDEAD);
-
-       r = amdgpu_ring_alloc(kiq_ring, (7 * adev->gfx.num_compute_rings) + 11);
+       kiq_ring->ready = true;
+       r = amdgpu_ring_alloc(kiq_ring, (7 * adev->gfx.num_compute_rings) + 8);
        if (r) {
                DRM_ERROR("Failed to lock KIQ (%d).\n", r);
-               amdgpu_gfx_scratch_free(adev, scratch);
                return r;
        }
 
@@ -2732,24 +2724,12 @@ static int gfx_v9_0_kiq_kcq_enable(struct amdgpu_device *adev)
                amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));
                amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));
        }
-       /* write to scratch for completion */
-       amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));
-       amdgpu_ring_write(kiq_ring, (scratch - PACKET3_SET_UCONFIG_REG_START));
-       amdgpu_ring_write(kiq_ring, 0xDEADBEEF);
-       amdgpu_ring_commit(kiq_ring);
 
-       for (i = 0; i < adev->usec_timeout; i++) {
-               tmp = RREG32(scratch);
-               if (tmp == 0xDEADBEEF)
-                       break;
-               DRM_UDELAY(1);
-       }
-       if (i >= adev->usec_timeout) {
-               DRM_ERROR("KCQ enable failed (scratch(0x%04X)=0x%08X)\n",
-                         scratch, tmp);
-               r = -EINVAL;
+       r = amdgpu_ring_test_ring(kiq_ring);
+       if (r) {
+               DRM_ERROR("KCQ enable failed\n");
+               kiq_ring->ready = false;
        }
-       amdgpu_gfx_scratch_free(adev, scratch);
 
        return r;
 }
@@ -3188,12 +3168,6 @@ static int gfx_v9_0_cp_resume(struct amdgpu_device *adev)
                return r;
        }
 
-       ring = &adev->gfx.kiq.ring;
-       ring->ready = true;
-       r = amdgpu_ring_test_ring(ring);
-       if (r)
-               ring->ready = false;
-
        for (i = 0; i < adev->gfx.num_compute_rings; i++) {
                ring = &adev->gfx.compute_ring[i];
 
@@ -3244,21 +3218,11 @@ static int gfx_v9_0_hw_init(void *handle)
 
 static int gfx_v9_0_kcq_disable(struct amdgpu_ring *kiq_ring,struct amdgpu_ring *ring)
 {
-       struct amdgpu_device *adev = kiq_ring->adev;
-       uint32_t scratch, tmp = 0;
-       int r, i;
-
-       r = amdgpu_gfx_scratch_get(adev, &scratch);
-       if (r) {
-               DRM_ERROR("Failed to get scratch reg (%d).\n", r);
-               return r;
-       }
-       WREG32(scratch, 0xCAFEDEAD);
+       int r;
 
-       r = amdgpu_ring_alloc(kiq_ring, 10);
+       r = amdgpu_ring_alloc(kiq_ring, 6);
        if (r) {
                DRM_ERROR("Failed to lock KIQ (%d).\n", r);
-               amdgpu_gfx_scratch_free(adev, scratch);
                return r;
        }
 
@@ -3273,23 +3237,11 @@ static int gfx_v9_0_kcq_disable(struct amdgpu_ring *kiq_ring,struct amdgpu_ring
        amdgpu_ring_write(kiq_ring, 0);
        amdgpu_ring_write(kiq_ring, 0);
        amdgpu_ring_write(kiq_ring, 0);
-       /* write to scratch for completion */
-       amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));
-       amdgpu_ring_write(kiq_ring, (scratch - PACKET3_SET_UCONFIG_REG_START));
-       amdgpu_ring_write(kiq_ring, 0xDEADBEEF);
-       amdgpu_ring_commit(kiq_ring);
 
-       for (i = 0; i < adev->usec_timeout; i++) {
-               tmp = RREG32(scratch);
-               if (tmp == 0xDEADBEEF)
-                       break;
-               DRM_UDELAY(1);
-       }
-       if (i >= adev->usec_timeout) {
-               DRM_ERROR("KCQ disabled failed (scratch(0x%04X)=0x%08X)\n", scratch, tmp);
-               r = -EINVAL;
-       }
-       amdgpu_gfx_scratch_free(adev, scratch);
+       r = amdgpu_ring_test_ring(kiq_ring);
+       if (r)
+               DRM_ERROR("KCQ disable failed\n");
+
        return r;
 }