clk: qcom: osm: program SEQ_REG32 unconditionally

Program SEQ_REG32 unconditionally with the L_VAL corresponding to
the first virtual corner with MEM ACC level 3.

CRs-Fixed: 2011483
Change-Id: I3b8a5bed2c78f0f5f3aae22c4a58c57b75ddf3bb
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>

diff --git a/drivers/clk/qcom/clk-cpu-osm.c b/drivers/clk/qcom/clk-cpu-osm.c
index e88d70f..6b00bee 100644 (file)
--- a/drivers/clk/qcom/clk-cpu-osm.c
+++ b/drivers/clk/qcom/clk-cpu-osm.c
@@ -1952,16 +1952,21 @@ static void clk_osm_program_mem_acc_regs(struct clk_osm *c)
                }
        }
 
+       threshold_vc[0] = mem_acc_level_map[0];
+       threshold_vc[1] = mem_acc_level_map[0] + 1;
+       threshold_vc[2] = mem_acc_level_map[1];
+       threshold_vc[3] = mem_acc_level_map[1] + 1;
+
        if (c->secure_init) {
                clk_osm_write_reg(c, MEM_ACC_SEQ_CONST(1), SEQ_REG(51));
                clk_osm_write_reg(c, MEM_ACC_SEQ_CONST(2), SEQ_REG(52));
                clk_osm_write_reg(c, MEM_ACC_SEQ_CONST(3), SEQ_REG(53));
                clk_osm_write_reg(c, MEM_ACC_SEQ_CONST(4), SEQ_REG(54));
                clk_osm_write_reg(c, MEM_ACC_APM_READ_MASK, SEQ_REG(59));
-               clk_osm_write_reg(c, mem_acc_level_map[0], SEQ_REG(55));
-               clk_osm_write_reg(c, mem_acc_level_map[0] + 1, SEQ_REG(56));
-               clk_osm_write_reg(c, mem_acc_level_map[1], SEQ_REG(57));
-               clk_osm_write_reg(c, mem_acc_level_map[1] + 1, SEQ_REG(58));
+               clk_osm_write_reg(c, threshold_vc[0], SEQ_REG(55));
+               clk_osm_write_reg(c, threshold_vc[1], SEQ_REG(56));
+               clk_osm_write_reg(c, threshold_vc[2], SEQ_REG(57));
+               clk_osm_write_reg(c, threshold_vc[3], SEQ_REG(58));
                clk_osm_write_reg(c, c->pbases[OSM_BASE] + SEQ_REG(28),
                                  SEQ_REG(49));
 
@@ -1977,11 +1982,6 @@ static void clk_osm_program_mem_acc_regs(struct clk_osm *c)
                        scm_io_write(c->pbases[OSM_BASE] + SEQ_REG(88),
                                        c->mem_acc_crossover_vc);
 
-               threshold_vc[0] = mem_acc_level_map[0];
-               threshold_vc[1] = mem_acc_level_map[0] + 1;
-               threshold_vc[2] = mem_acc_level_map[1];
-               threshold_vc[3] = mem_acc_level_map[1] + 1;
-
                /*
                 * Use dynamic MEM ACC threshold voltage based value for the
                 * highest MEM ACC threshold if it is specified instead of the
@@ -2011,11 +2011,10 @@ static void clk_osm_program_mem_acc_regs(struct clk_osm *c)
         * Program L_VAL corresponding to the first virtual
         * corner with MEM ACC level 3.
         */
-       if (c->mem_acc_threshold_vc)
-               for (i = 0; i < c->num_entries; i++)
-                       if (c->mem_acc_threshold_vc == table[i].virtual_corner)
-                               scm_io_write(c->pbases[OSM_BASE] + SEQ_REG(32),
-                                               L_VAL(table[i].freq_data));
+       for (i = 0; i < c->num_entries; i++)
+               if (threshold_vc[3] == table[i].virtual_corner)
+                       scm_io_write(c->pbases[OSM_BASE] + SEQ_REG(32),
+                                       L_VAL(table[i].freq_data));
 }
 
 void clk_osm_setup_sequencer(struct clk_osm *c)