-// ADS1255 definitions\r
-\r
-enum {\r
- ADC_WAKEUP = 0x00,\r
- ADC_RDATA = 0x01,\r
- ADC_RDATAC = 0x03,\r
- ADC_STOPC = 0x0F,\r
- ADC_RREG = 0x10,\r
- ADC_WREG = 0x50,\r
- ADC_SELFCAL = 0xF0,\r
- ADC_SELFOCAL = 0xF1,\r
- ADC_SELFGCAL = 0xF2,\r
- ADC_SYSOCAL = 0xF3,\r
- ADC_SYSGCAL = 0xF4,\r
- ADC_SYNC = 0xFC,\r
- ADC_STANDBY = 0xFD,\r
- ADC_RESET = 0xFE\r
-};\r
-\r
-enum {\r
- MUX_00 = 0x00, // PSEL = A0, NSEL = A0\r
- MUX_10 = 0x01, // PSEL = A0, NSEL = A1\r
- MUX_01 = 0x10 // PSEL = A1, NSEL = A0\r
-};\r
-\r
-enum { // ADCON\r
- // ADCON, PGA\r
- PGA_1 = 0x0,\r
- PGA_2 = 0x1,\r
- PGA_4 = 0x2,\r
- PGA_8 = 0x3,\r
- PGA_16 = 0x4,\r
- PGA_32 = 0x5,\r
- PGA_64 = 0x6,\r
- // ADCON, SD\r
- SD_OFF = 0x00, // OFF\r
- SD_0_5 = 0x08, // 0.5uA\r
- SD_2 = 0x10, // 2uA\r
- SD_10 = 0x18, // 10uA\r
- // ADCON, CLK output\r
- CLK_0 = 0x00, // OFF\r
- CLK_1 = 0x20, // fclkin\r
- CLK_2 = 0x40, // fclkin/2\r
- CLK_4 = 0x60 // fclkin/4\r
-};\r
-\r
-enum {\r
- ADC_RATE_30000 = 0xF0, // 30000 SPS\r
- ADC_RATE_15000 = 0xE0, // 15000 SPS\r
- ADC_RATE_7500 = 0xD0, // 7500 SPS\r
- ADC_RATE_3750 = 0xC0, // 3750 SPS\r
- ADC_RATE_2000 = 0xB0, // 2000 SPS\r
- ADC_RATE_1000 = 0xA1, // 1000 SPS\r
- ADC_RATE_500 = 0x92, // 500 SPS\r
- ADC_RATE_100 = 0x82, // 100 SPS\r
- ADC_RATE_50 = 0x63, // 50 SPS\r
- ADC_RATE_10 = 0x23, // 10 SPS\r
- ADC_RATE_5 = 0x13, // 5 SPS\r
- ADC_RATE_2_5 = 0x03 // 2.5 SPS\r
-};\r
+// TI ADS1255
+// 24 Bit, 30kSPS Very Low Noise Delta-Sigma ADC
+// http://www.ti.com/product/ADS1255
+
+#ifndef HW_ADS1255_H
+#define HW_ADS1255_H
+
+enum {
+ ADC_WAKEUP = 0x00,
+ ADC_RDATA = 0x01,
+ ADC_RDATAC = 0x03,
+ ADC_STOPC = 0x0F,
+ ADC_RREG = 0x10,
+ ADC_WREG = 0x50,
+ ADC_SELFCAL = 0xF0,
+ ADC_SELFOCAL = 0xF1,
+ ADC_SELFGCAL = 0xF2,
+ ADC_SYSOCAL = 0xF3,
+ ADC_SYSGCAL = 0xF4,
+ ADC_SYNC = 0xFC,
+ ADC_STANDBY = 0xFD,
+ ADC_RESET = 0xFE
+};
+
+enum {
+ MUX_00 = 0x00, // PSEL = A0, NSEL = A0
+ MUX_10 = 0x01, // PSEL = A0, NSEL = A1
+ MUX_01 = 0x10 // PSEL = A1, NSEL = A0
+};
+
+enum { // ADCON
+ // ADCON, PGA
+ PGA_1 = 0x0,
+ PGA_2 = 0x1,
+ PGA_4 = 0x2,
+ PGA_8 = 0x3,
+ PGA_16 = 0x4,
+ PGA_32 = 0x5,
+ PGA_64 = 0x6,
+ // ADCON, SD
+ SD_OFF = 0x00, // OFF
+ SD_0_5 = 0x08, // 0.5uA
+ SD_2 = 0x10, // 2uA
+ SD_10 = 0x18, // 10uA
+ // ADCON, CLK output
+ CLK_0 = 0x00, // OFF
+ CLK_1 = 0x20, // fclkin
+ CLK_2 = 0x40, // fclkin/2
+ CLK_4 = 0x60 // fclkin/4
+};
+
+enum {
+ ADC_RATE_30000 = 0xF0, // 30000 SPS
+ ADC_RATE_15000 = 0xE0, // 15000 SPS
+ ADC_RATE_7500 = 0xD0, // 7500 SPS
+ ADC_RATE_3750 = 0xC0, // 3750 SPS
+ ADC_RATE_2000 = 0xB0, // 2000 SPS
+ ADC_RATE_1000 = 0xA1, // 1000 SPS
+ ADC_RATE_500 = 0x92, // 500 SPS
+ ADC_RATE_100 = 0x82, // 100 SPS
+ ADC_RATE_50 = 0x63, // 50 SPS
+ ADC_RATE_10 = 0x23, // 10 SPS
+ ADC_RATE_5 = 0x13, // 5 SPS
+ ADC_RATE_2_5 = 0x03 // 2.5 SPS
+};
+
+#endif // HW_ADS1255_H
-// ADS1299 definitions
+// TI ADS1299
+// Low-Noise, 8-Channel, 24-Bit Analog-to-Digital Converter
+// http://www.ti.com/product/ADS1299
#ifndef HW_ADS1299_H
#define HW_ADS1299_H
-// ADS131E0x definitions
+// TI ADS131E0x
+// Analog Front-End for Power Monitoring, Control and Protection
+// http://www.ti.com/product/ADS131E08
// ADS131E0x SPI commands
enum {
-// ADXL345
+// Analog Devices ADXL345
+// 3-Axis, ±2 g/±4 g/±8 g/±16 g Digital Accelerometer
+// http://www.analog.com/en/products/mems/accelerometers/adxl345.html
-enum {
- // flags
+enum { // flags
ADXL_READ = 1<<7, // Read flag
ADXL_WRITE = 0<<7, // Write flag
ADXL_MULTI = 1<<6, // Multiple-Byte flag
+};
- // registers
- ADXL_DEVID = 0, // DEVID register
+enum { // registers
+ ADXL_DEVID = 0x00, // DEVID register
ADXL_DEVID_V = 0xE5, // DEVID value
ADXL_BW_RATE = 0x2C, // BW_RATE register
ADXL_RANGE_8G = 2<<0, // Range: +/- 8g
ADXL_RANGE_16G = 3<<0, // Range: +/-16g
- ADXL_DATAX0 = 0x32, // DATAX0 register
+ ADXL_DATAX0 = 0x32, // DATAX0 register
ADXL_FIFO_CTL = 0x38, // FIFO_CTL register
ADXL_FIFO_BYPASS = 0<<6, // FIFO Bypass
-// CC1101 defs
+// TI CC1101
-enum {
- // RF ctrl
+enum { // RF ctrl
RF_SINGLERD = 0x80, // Single Read
RF_SINGLEWR = 0x00, // Single Write
RF_BURSTRD = 0x40 | RF_SINGLERD, // Burst Read
RF_BURSTWR = 0x40 | RF_SINGLEWR, // Burst Write
};
-enum {
- // RF Registers
+
+enum { // RF Registers
RF_IOCFG2 = 0x00, // IOCFG2 - GDO2 output pin configuration
RF_IOCFG1 = 0x01, // IOCFG1 - GDO1 output pin configuration
RF_IOCFG0 = 0x02, // IOCFG1 - GDO0 output pin configuration
RF_TEST1 = 0x2D, // TEST1 - Various test settings
RF_TEST0 = 0x2E, // TEST0 - Various test settings
};
+
#ifndef RF_SRES
-enum {
- // RF Command Strobe
+enum { // RF Command Strobe
RF_SRES = 0x30, // SRES - Reset chip.
RF_SFSTXON = 0x31, // SFSTXON - Enable and calibrate frequency synthesizer.
RF_SXOFF = 0x32, // SXOFF - Turn off crystal oscillator.
RF_SNOP = 0x3D, // SNOP - No operation. Returns status byte.
};
#endif
+
enum {
// RF Status Registers - single read only
RF_PARTNUM = 0xF0, // Part number, Chip ID
RF_PATABLE = 0x3E, // PA control settings table
RF_FIFO = 0x3F, // Rx/Tx FIFO
};
+
enum {
RF_FIFO_SIZE = 0x40 // Rx/Tx FIFO size (bytes)
};
-// CC2420 definitions
+// TI CC2420
// Source: SWRS041B.pdf
-#ifndef _CC2420_H
-#define _CC2420_H
+#ifndef HW_CC2420_H
+#define HW_CC2420_H
// CC2420 Access
enum CC2420_access_t {
CC2420_RAM_SIZE = 0x170
};
-
// CC2420 Configuration Registers
enum CC2420_reg_index_t {
// Strobe Command Registers
CC2420_STATUS_RSSI_VALID = (1 << 1)
};
-#endif // _CC2420_H
+#endif // HW_CC2420_H
-// HMC5883L
+// Honeywell HMC5883L
+// 3 Axis Compass
enum {
HMC_ADDR = 0x3C, // I2C address (write)
+
// registers
HMC_CFG_A = 0, // Configuration Register A (RW)
HMC_CFG_B = 1, // Configuration Register B (RW)
-// MC3630
+// mCube MC3630
+// 3-Axis Accelerometer
+// http://www.mcubemems.com/product/mc3630-3-axis-accelerometer
enum {
// first byte, flags
-// SHT25, Sensirion Humidity sensor
+// Sensirion SHT25
+// Humidity sensor
+// http://www.sensirion.com/sht25
enum {
// I2C address
enum {
// Command codes
- SSD_SET_COL = 0x15, // Set Column Address
- SSD_SET_ROW = 0x75, // Set Row Address
- SSD_RAM_WR = 0x5C, // Write RAM
- SSD_RAM_RD = 0x5D, // Read RAM
- SSD_SET_MAP = 0xA0, // Set Re-map / Color Depth (Display RAM to Panel)
- SSD_LINE = 0xA1, // Set Display Start Line
- SSD_OFFSET = 0xA2, // Set Display Offset (locked)
+ SSD_SET_COL = 0x15, // Set Column Address
+ SSD_SET_ROW = 0x75, // Set Row Address
+ SSD_RAM_WR = 0x5C, // Write RAM
+ SSD_RAM_RD = 0x5D, // Read RAM
+ SSD_SET_MAP = 0xA0, // Set Re-map / Color Depth (Display RAM to Panel)
+ SSD_LINE = 0xA1, // Set Display Start Line
+ SSD_OFFSET = 0xA2, // Set Display Offset (locked)
SSD_MODE_ALL_OFF = 0xA4, // Set Display Mode: All Off
SSD_MODE_ALL_ON = 0xA5, // Set Display Mode: All On
SSD_MODE_NORMAL = 0xA6, // Set Display Mode: Normal (default)
SSD_MODE_INVERSE = 0xA7, // Set Display Mode: Inverse
- SSD_FUNCTION = 0xAB, // Function Selection (Vdd, width)
- SSD_DISP_OFF = 0xAE, // Set Sleep mode On (Display Off)
- SSD_DISP_ON = 0xAF, // Set Sleep mode Off (Display On)
- SSD_P12_PERIOD = 0xB1, // Set Reset (Phase 1) / Pre-charge (Phase 2) period
- SSD_ENHANCE = 0xB2, // Display Enhancement
- SSD_CLK_DIV = 0xB3, // Front Clock Divider (DivSet) / Oscillator Frequency
- SSD_LOW_VOLT = 0xB4, // Set Segment Low Voltage (VSL)
- SSD_GPIO = 0xB5, // Set GPIO
- SSD_SP_PERIOD = 0xB6, // Set Second Pre-charge Period
- SSD_LUT_TABLE = 0xB8, // Look Up Table for Gray Scale Pulse width
- SSD_LUT_RESET = 0xB9, // Use Built-in Linear LUT
- SSD_PRECHARGE = 0xBB, // Set Pre-charge voltage
- SSD_VCOMH = 0xBE, // Set Vcomh voltage
- SSD_CONTRAST1 = 0xC1, // Set Contrast Current for Color A,B,C
- SSD_CONTRAST2 = 0xC7, // Master Contrast Current Control
- SSD_MUX = 0xCA, // Set MUX Ratio
- SSD_LOCK = 0xFD, // Set Command Lock
+ SSD_FUNCTION = 0xAB, // Function Selection (Vdd, width)
+ SSD_DISP_OFF = 0xAE, // Set Sleep mode On (Display Off)
+ SSD_DISP_ON = 0xAF, // Set Sleep mode Off (Display On)
+ SSD_P12_PERIOD = 0xB1, // Set Reset (Phase 1) / Pre-charge (Phase 2) period
+ SSD_ENHANCE = 0xB2, // Display Enhancement
+ SSD_CLK_DIV = 0xB3, // Front Clock Divider (DivSet) / Oscillator Frequency
+ SSD_LOW_VOLT = 0xB4, // Set Segment Low Voltage (VSL)
+ SSD_GPIO = 0xB5, // Set GPIO
+ SSD_SP_PERIOD = 0xB6, // Set Second Pre-charge Period
+ SSD_LUT_TABLE = 0xB8, // Look Up Table for Gray Scale Pulse width
+ SSD_LUT_RESET = 0xB9, // Use Built-in Linear LUT
+ SSD_PRECHARGE = 0xBB, // Set Pre-charge voltage
+ SSD_VCOMH = 0xBE, // Set Vcomh voltage
+ SSD_CONTRAST1 = 0xC1, // Set Contrast Current for Color A,B,C
+ SSD_CONTRAST2 = 0xC7, // Master Contrast Current Control
+ SSD_MUX = 0xCA, // Set MUX Ratio
+ SSD_LOCK = 0xFD, // Set Command Lock
- SSD_HOR_SCROLL = 0x96, // Horizontal Scroll
- SSD_HOR_STOP = 0x9E, // Stop horizontal scroll
- SSD_HOR_START = 0x9F, // Start horizontal scroll
+ SSD_HOR_SCROLL = 0x96, // Horizontal Scroll
+ SSD_HOR_STOP = 0x9E, // Stop horizontal scroll
+ SSD_HOR_START = 0x9F, // Start horizontal scroll
};
-// Si4735
+// Silicon Labs Si4735
+// AM/FM/SW/LW Radio Receiver with RDS
enum {
SI_I2C_ADDR0 = 0x22, // I2C addr when SEN=0
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