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staging: rtl8192e: Join constants Rtl819XMACPHY_..PG with Rtl8192PciE..
authorPhilipp Hortmann <philipp.g.hortmann@gmail.com>
Tue, 14 Mar 2023 18:43:43 +0000 (19:43 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 16 Mar 2023 08:37:19 +0000 (09:37 +0100)
Join constants Rtl819XMACPHY_Array_PG with Rtl8192PciEMACPHY_Array_PG to
RTL8192E_MACPHY_ARR_PG to improve readability.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/c8effbad931c1f7bcdee7245bf16bd2e85c03679.1678814935.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
drivers/staging/rtl8192e/rtl8192e/table.c
drivers/staging/rtl8192e/rtl8192e/table.h

index 231bd49..ef33f65 100644 (file)
@@ -288,7 +288,7 @@ void rtl92e_config_mac(struct net_device *dev)
 
        if (priv->tx_pwr_data_read_from_eeprom) {
                dwArrayLen = RTL8192E_MACPHY_ARR_PG_LEN;
-               pdwArray = Rtl819XMACPHY_Array_PG;
+               pdwArray = RTL8192E_MACPHY_ARR_PG;
 
        } else {
                dwArrayLen = RTL8192E_MACPHY_ARR_LEN;
index 96c5814..694528c 100644 (file)
@@ -9,7 +9,6 @@
 
 #define MAX_DOZE_WAITING_TIMES_9x 64
 
-#define Rtl819XMACPHY_Array_PG                 Rtl8192PciEMACPHY_Array_PG
 #define Rtl819XMACPHY_Array                    Rtl8192PciEMACPHY_Array
 #define Rtl819XRadioA_Array                    Rtl8192PciERadioA_Array
 #define Rtl819XRadioB_Array                    Rtl8192PciERadioB_Array
index b2cf4d1..aed1c46 100644 (file)
@@ -334,7 +334,7 @@ u32 Rtl8192PciEMACPHY_Array[] = {
        0x318, 0x00000fff, 0x00000100,
 };
 
-u32 Rtl8192PciEMACPHY_Array_PG[] = {
+u32 RTL8192E_MACPHY_ARR_PG[] = {
        0x03c, 0xffff0000, 0x00000f0f,
        0xe00, 0xffffffff, 0x06090909,
        0xe04, 0xffffffff, 0x00030306,
index d00aa39..f94975b 100644 (file)
@@ -20,7 +20,7 @@ extern u32 Rtl8192PciERadioB_Array[RTL8192E_RADIO_B_ARR_LEN];
 #define RTL8192E_MACPHY_ARR_LEN 18
 extern u32 Rtl8192PciEMACPHY_Array[RTL8192E_MACPHY_ARR_LEN];
 #define RTL8192E_MACPHY_ARR_PG_LEN 30
-extern u32 Rtl8192PciEMACPHY_Array_PG[RTL8192E_MACPHY_ARR_PG_LEN];
+extern u32 RTL8192E_MACPHY_ARR_PG[RTL8192E_MACPHY_ARR_PG_LEN];
 #define RTL8192E_AGCTAB_ARR_LEN 384
 extern u32 Rtl8192PciEAGCTAB_Array[RTL8192E_AGCTAB_ARR_LEN];