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drm/amd/amdgpu: fix psp tmr bo pin count leak in SRIOV
authorJingwen Chen <Jingwen.Chen2@amd.com>
Tue, 14 Dec 2021 03:31:16 +0000 (11:31 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 14 Dec 2021 21:09:49 +0000 (16:09 -0500)
[Why]
psp tmr bo will be pinned during loading amdgpu and reset in SRIOV while
only unpinned in unload amdgpu

[How]
add amdgpu_in_reset and sriov judgement to skip pin bo

v2: fix wrong judgement

Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Reviewed-by: Horace Chen <horace.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

index 103bcad..dee17a0 100644 (file)
@@ -2017,12 +2017,16 @@ static int psp_hw_start(struct psp_context *psp)
                return ret;
        }
 
+       if (amdgpu_sriov_vf(adev) && amdgpu_in_reset(adev))
+               goto skip_pin_bo;
+
        ret = psp_tmr_init(psp);
        if (ret) {
                DRM_ERROR("PSP tmr init failed!\n");
                return ret;
        }
 
+skip_pin_bo:
        /*
         * For ASICs with DF Cstate management centralized
         * to PMFW, TMR setup should be performed after PMFW