#define VIRGL_CAP_INDIRECT_PARAMS (1 << 22)
#define VIRGL_CAP_TRANSFORM_FEEDBACK3 (1 << 23)
#define VIRGL_CAP_INDIRECT_INPUT_ADDR (1 << 25)
+#define VIRGL_CAP_CLIP_HALFZ (1 << 27)
/* virgl bind flags - these are compatible with mesa 10.5 gallium.
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
- case PIPE_CAP_CLIP_HALFZ:
case PIPE_CAP_VERTEXID_NOBASE:
case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
return 0;
+ case PIPE_CAP_CLIP_HALFZ:
+ return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_CLIP_HALFZ;
case PIPE_CAP_MAX_GS_INVOCATIONS:
return 32;
case PIPE_CAP_MAX_SHADER_BUFFER_SIZE: