Define amdgpu_ras_late_init to call all ras blocks' .ras_late_init.
Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
adev->ip_blocks[i].status.late_initialized = true;
}
+ r = amdgpu_ras_late_init(adev);
+ if (r) {
+ DRM_ERROR("amdgpu_ras_late_init failed %d", r);
+ return r;
+ }
+
amdgpu_ras_set_error_query_ready(adev, true);
amdgpu_device_set_cg_state(adev, AMD_CG_STATE_GATE);
int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
{
- int r;
-
- if (adev->umc.ras && adev->umc.ras->ras_block.ras_late_init) {
- r = adev->umc.ras->ras_block.ras_late_init(adev, adev->umc.ras_if);
- if (r)
- return r;
- }
-
- if (adev->mmhub.ras && adev->mmhub.ras->ras_block.ras_late_init) {
- r = adev->mmhub.ras->ras_block.ras_late_init(adev, adev->mmhub.ras_if);
- if (r)
- return r;
- }
-
- if (adev->gmc.xgmi.ras && adev->gmc.xgmi.ras->ras_block.ras_late_init) {
- r = adev->gmc.xgmi.ras->ras_block.ras_late_init(adev, adev->gmc.xgmi.ras_if);
- if (r)
- return r;
- }
-
- if (adev->hdp.ras && adev->hdp.ras->ras_block.ras_late_init) {
- r = adev->hdp.ras->ras_block.ras_late_init(adev, adev->hdp.ras_if);
- if (r)
- return r;
- }
-
- if (adev->mca.mp0.ras && adev->mca.mp0.ras->ras_block.ras_late_init) {
- r = adev->mca.mp0.ras->ras_block.ras_late_init(adev, adev->mca.mp0.ras_if);
- if (r)
- return r;
- }
-
- if (adev->mca.mp1.ras && adev->mca.mp1.ras->ras_block.ras_late_init) {
- r = adev->mca.mp1.ras->ras_block.ras_late_init(adev, adev->mca.mp1.ras_if);
- if (r)
- return r;
- }
-
- if (adev->mca.mpio.ras && adev->mca.mpio.ras->ras_block.ras_late_init) {
- r = adev->mca.mpio.ras->ras_block.ras_late_init(adev, adev->mca.mpio.ras_if);
- if (r)
- return r;
- }
-
return 0;
}
amdgpu_ras_disable_all_features(adev, 1);
}
+int amdgpu_ras_late_init(struct amdgpu_device *adev)
+{
+ struct amdgpu_ras_block_list *node, *tmp;
+ struct amdgpu_ras_block_object *obj;
+ int r;
+
+ list_for_each_entry_safe(node, tmp, &adev->ras_list, node) {
+ if (!node->ras_obj) {
+ dev_warn(adev->dev, "Warning: abnormal ras list node.\n");
+ continue;
+ }
+ obj = node->ras_obj;
+ if (obj->ras_late_init) {
+ r = obj->ras_late_init(adev, &obj->ras_comm);
+ if (r) {
+ dev_err(adev->dev, "%s failed to execute ras_late_init! ret:%d\n",
+ obj->ras_comm.name, r);
+ return r;
+ }
+ }
+ }
+
+ return 0;
+}
+
/* do some fini work before IP fini as dependence */
int amdgpu_ras_pre_fini(struct amdgpu_device *adev)
{
/* called in ip_init and ip_fini */
int amdgpu_ras_init(struct amdgpu_device *adev);
+int amdgpu_ras_late_init(struct amdgpu_device *adev);
int amdgpu_ras_fini(struct amdgpu_device *adev);
int amdgpu_ras_pre_fini(struct amdgpu_device *adev);
if (r)
return r;
- if (adev->gfx.ras && adev->gfx.ras->ras_block.ras_late_init) {
- r = adev->gfx.ras->ras_block.ras_late_init(adev, adev->gfx.ras_if);
- if (r)
- return r;
- }
-
if (adev->gfx.ras &&
adev->gfx.ras->enable_watchdog_timer)
adev->gfx.ras->enable_watchdog_timer(adev);
adev->sdma.ras->ras_block.hw_ops->reset_ras_error_count(adev);
}
- if (adev->sdma.ras && adev->sdma.ras->ras_block.ras_late_init)
- return adev->sdma.ras->ras_block.ras_late_init(adev, adev->sdma.ras_if);
- else
- return 0;
+ return 0;
}
static int sdma_v4_0_sw_init(void *handle)
static int soc15_common_late_init(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- int r = 0;
if (amdgpu_sriov_vf(adev))
xgpu_ai_mailbox_get_irq(adev);
- if (adev->nbio.ras && adev->nbio.ras->ras_block.ras_late_init)
- r = adev->nbio.ras->ras_block.ras_late_init(adev, adev->nbio.ras_if);
-
- return r;
+ return 0;
}
static int soc15_common_sw_init(void *handle)