Merge tag 'uniphier-dt-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/masahi...

UniPhier ARM SoC DT updates for v4.20

- Add more clocks to NAND controller nodes

- Add SPI controller nodes

- Add SD controller nodes

- Add USB 3.0 and its PHY nodes

- Add PHY nodes for USB 2.0

* tag 'uniphier-dt-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: Add USB2 PHY nodes
  arm64: dts: uniphier: Add USB3 controller nodes
  ARM: dts: uniphier: Add USB2 PHY nodes
  ARM: dts: uniphier: Add USB3 controller nodes
  arm64: dts: uniphier: add SD controller nodes
  ARM: dts: uniphier: add SD/eMMC controller nodes
  arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3
  ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs
  ARM: dts: uniphier: add SPI pin-mux node
  arm64: uniphier: dts: add more clocks to Denali NAND controller node
  ARM: uniphier: dts: add more clocks to Denali NAND controller node

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/boot/dts/uniphier-ld4-ref.dts b/arch/arm/boot/dts/uniphier-ld4-ref.dts
index 21407e1..3aaca10 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ld4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ld4-ref.dts
@@ -63,6 +63,10 @@
        status = "okay";
 };
 
+&sd {
+       status = "okay";
+};
+
 &usb0 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi
index 37950ad..b73d594 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ld4.dtsi
@@ -63,6 +63,17 @@
                        cache-level = <2>;
                };
 
+               spi: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";
@@ -224,6 +235,40 @@
                        };
                };
 
+               sd: sdhc@5a400000 {
+                       compatible = "socionext,uniphier-sd-v2.91";
+                       status = "disabled";
+                       reg = <0x5a400000 0x200>;
+                       interrupts = <0 76 4>;
+                       pinctrl-names = "default", "uhs";
+                       pinctrl-0 = <&pinctrl_sd>;
+                       pinctrl-1 = <&pinctrl_sd_uhs>;
+                       clocks = <&mio_clk 0>;
+                       reset-names = "host", "bridge";
+                       resets = <&mio_rst 0>, <&mio_rst 3>;
+                       bus-width = <4>;
+                       cap-sd-highspeed;
+                       sd-uhs-sdr12;
+                       sd-uhs-sdr25;
+                       sd-uhs-sdr50;
+               };
+
+               emmc: sdhc@5a500000 {
+                       compatible = "socionext,uniphier-sd-v2.91";
+                       status = "disabled";
+                       reg = <0x5a500000 0x200>;
+                       interrupts = <0 78 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_emmc>;
+                       clocks = <&mio_clk 1>;
+                       reset-names = "host", "bridge", "hw";
+                       resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
+                       bus-width = <8>;
+                       cap-mmc-highspeed;
+                       cap-mmc-hw-reset;
+                       non-removable;
+               };
+
                usb0: usb@5a800100 {
                        compatible = "socionext,uniphier-ehci", "generic-ehci";
                        status = "disabled";
@@ -347,7 +392,8 @@
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand2cs>;
-                       clocks = <&sys_clk 2>;
+                       clock-names = "nand", "nand_x", "ecc";
+                       clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
                };
        };

diff --git a/arch/arm/boot/dts/uniphier-ld6b-ref.dts b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
index a0a44a4..3d9080e 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ld6b-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ld6b-ref.dts
@@ -65,6 +65,10 @@
        status = "okay";
 };
 
+&sd {
+       status = "okay";
+};
+
 &eth {
        status = "okay";
        phy-handle = <&ethphy>;
@@ -76,6 +80,14 @@
        };
 };
 
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};
+
 &nand {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi b/arch/arm/boot/dts/uniphier-pinctrl.dtsi
index 51f0e69..1fee5ff 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
+++ b/arch/arm/boot/dts/uniphier-pinctrl.dtsi
@@ -121,11 +121,36 @@
                function = "sd";
        };
 
+       pinctrl_sd_uhs: sd-uhs {
+               groups = "sd";
+               function = "sd";
+       };
+
        pinctrl_sd1: sd1 {
                groups = "sd1";
                function = "sd1";
        };
 
+       pinctrl_spi0: spi0 {
+               groups = "spi0";
+               function = "spi0";
+       };
+
+       pinctrl_spi1: spi1 {
+               groups = "spi1";
+               function = "spi1";
+       };
+
+       pinctrl_spi2: spi2 {
+               groups = "spi2";
+               function = "spi2";
+       };
+
+       pinctrl_spi3: spi3 {
+               groups = "spi3";
+               function = "spi3";
+       };
+
        pinctrl_system_bus: system-bus {
                groups = "system_bus", "system_bus_cs1";
                function = "system_bus";

diff --git a/arch/arm/boot/dts/uniphier-pro4-ace.dts b/arch/arm/boot/dts/uniphier-pro4-ace.dts
index db1b089..92cc48d 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pro4-ace.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-ace.dts
@@ -68,6 +68,10 @@
        status = "okay";
 };
 
+&sd {
+       status = "okay";
+};
+
 &usb2 {
        status = "okay";
 };
@@ -86,3 +90,11 @@
                reg = <1>;
        };
 };
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/uniphier-pro4-ref.dts b/arch/arm/boot/dts/uniphier-pro4-ref.dts
index efb0849..28038b1 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-ref.dts
@@ -65,6 +65,10 @@
        status = "okay";
 };
 
+&sd {
+       status = "okay";
+};
+
 &usb2 {
        status = "okay";
 };
@@ -84,6 +88,14 @@
        };
 };
 
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};
+
 &nand {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/uniphier-pro4-sanji.dts b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
index dac4d66..dda1a2f 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pro4-sanji.dts
+++ b/arch/arm/boot/dts/uniphier-pro4-sanji.dts
@@ -71,6 +71,10 @@
        status = "okay";
 };
 
+&emmc {
+       status = "okay";
+};
+
 &eth {
        status = "okay";
        phy-handle = <&ethphy>;
@@ -81,3 +85,11 @@
                reg = <1>;
        };
 };
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 49539f0..0beb606 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -71,6 +71,17 @@
                        cache-level = <2>;
                };
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";
@@ -258,6 +269,54 @@
                        };
                };
 
+               sd: sdhc@5a400000 {
+                       compatible = "socionext,uniphier-sd-v2.91";
+                       status = "disabled";
+                       reg = <0x5a400000 0x200>;
+                       interrupts = <0 76 4>;
+                       pinctrl-names = "default", "uhs";
+                       pinctrl-0 = <&pinctrl_sd>;
+                       pinctrl-1 = <&pinctrl_sd_uhs>;
+                       clocks = <&mio_clk 0>;
+                       reset-names = "host", "bridge";
+                       resets = <&mio_rst 0>, <&mio_rst 3>;
+                       bus-width = <4>;
+                       cap-sd-highspeed;
+                       sd-uhs-sdr12;
+                       sd-uhs-sdr25;
+                       sd-uhs-sdr50;
+               };
+
+               emmc: sdhc@5a500000 {
+                       compatible = "socionext,uniphier-sd-v2.91";
+                       status = "disabled";
+                       reg = <0x5a500000 0x200>;
+                       interrupts = <0 78 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_emmc>;
+                       clocks = <&mio_clk 1>;
+                       reset-names = "host", "bridge", "hw";
+                       resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
+                       bus-width = <8>;
+                       cap-mmc-highspeed;
+                       cap-mmc-hw-reset;
+                       non-removable;
+               };
+
+               sd1: sdhc@5a600000 {
+                       compatible = "socionext,uniphier-sd-v2.91";
+                       status = "disabled";
+                       reg = <0x5a600000 0x200>;
+                       interrupts = <0 85 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_sd1>;
+                       clocks = <&mio_clk 2>;
+                       reset-names = "host", "bridge";
+                       resets = <&mio_rst 2>, <&mio_rst 5>;
+                       bus-width = <4>;
+                       cap-sd-highspeed;
+               };
+
                usb2: usb@5a800100 {
                        compatible = "socionext,uniphier-ehci", "generic-ehci";
                        status = "disabled";
@@ -269,6 +328,8 @@
                                 <&mio_clk 12>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
                                 <&mio_rst 12>;
+                       phy-names = "usb";
+                       phys = <&usb_phy0>;
                        has-transaction-translator;
                };
 
@@ -283,6 +344,8 @@
                                 <&mio_clk 13>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
                                 <&mio_rst 13>;
+                       phy-names = "usb";
+                       phys = <&usb_phy1>;
                        has-transaction-translator;
                };
 
@@ -294,6 +357,34 @@
                        pinctrl: pinctrl {
                                compatible = "socionext,uniphier-pro4-pinctrl";
                        };
+
+                       usb-phy {
+                               compatible = "socionext,uniphier-pro4-usb2-phy";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               usb_phy0: phy@0 {
+                                       reg = <0>;
+                                       #phy-cells = <0>;
+                               };
+
+                               usb_phy1: phy@1 {
+                                       reg = <1>;
+                                       #phy-cells = <0>;
+                               };
+
+                               usb_phy2: phy@2 {
+                                       reg = <2>;
+                                       #phy-cells = <0>;
+                                       vbus-supply = <&usb0_vbus>;
+                               };
+
+                               usb_phy3: phy@3 {
+                                       reg = <3>;
+                                       #phy-cells = <0>;
+                                       vbus-supply = <&usb1_vbus>;
+                               };
+                       };
                };
 
                soc-glue@5f900000 {
@@ -386,6 +477,101 @@
                        };
                };
 
+               usb0: usb@65a00000 {
+                       compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+                       status = "disabled";
+                       reg = <0x65a00000 0xcd00>;
+                       interrupt-names = "host", "peripheral";
+                       interrupts = <0 134 4>, <0 135 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usb0>;
+                       clock-names = "ref", "bus_early", "suspend";
+                       clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+                       resets = <&usb0_rst 4>;
+                       phys = <&usb_phy2>, <&usb0_ssphy>;
+                       dr_mode = "host";
+               };
+
+               usb-glue@65b00000 {
+                       compatible = "socionext,uniphier-pro4-dwc3-glue",
+                                    "simple-mfd";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x65b00000 0x100>;
+
+                       usb0_vbus: regulator@0 {
+                               compatible = "socionext,uniphier-pro4-usb3-regulator";
+                               reg = <0 0x10>;
+                               clock-names = "gio", "link";
+                               clocks = <&sys_clk 12>, <&sys_clk 14>;
+                               reset-names = "gio", "link";
+                               resets = <&sys_rst 12>, <&sys_rst 14>;
+                       };
+
+                       usb0_ssphy: ss-phy@10 {
+                               compatible = "socionext,uniphier-pro4-usb3-ssphy";
+                               reg = <0x10 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "gio", "link";
+                               clocks = <&sys_clk 12>, <&sys_clk 14>;
+                               reset-names = "gio", "link";
+                               resets = <&sys_rst 12>, <&sys_rst 14>;
+                               vbus-supply = <&usb0_vbus>;
+                       };
+
+                       usb0_rst: reset@40 {
+                               compatible = "socionext,uniphier-pro4-usb3-reset";
+                               reg = <0x40 0x4>;
+                               #reset-cells = <1>;
+                               clock-names = "gio", "link";
+                               clocks = <&sys_clk 12>, <&sys_clk 14>;
+                               reset-names = "gio", "link";
+                               resets = <&sys_rst 12>, <&sys_rst 14>;
+                       };
+               };
+
+               usb1: usb@65c00000 {
+                       compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+                       status = "disabled";
+                       reg = <0x65c00000 0xcd00>;
+                       interrupt-names = "host", "peripheral";
+                       interrupts = <0 137 4>, <0 138 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usb1>;
+                       clock-names = "ref", "bus_early", "suspend";
+                       clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+                       resets = <&usb1_rst 4>;
+                       phys = <&usb_phy3>;
+                       dr_mode = "host";
+               };
+
+               usb-glue@65d00000 {
+                       compatible = "socionext,uniphier-pro4-dwc3-glue",
+                                    "simple-mfd";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x65d00000 0x100>;
+
+                       usb1_vbus: regulator@0 {
+                               compatible = "socionext,uniphier-pro4-usb3-regulator";
+                               reg = <0 0x10>;
+                               clock-names = "gio", "link";
+                               clocks = <&sys_clk 12>, <&sys_clk 15>;
+                               reset-names = "gio", "link";
+                               resets = <&sys_rst 12>, <&sys_rst 15>;
+                       };
+
+                       usb1_rst: reset@40 {
+                               compatible = "socionext,uniphier-pro4-usb3-reset";
+                               reg = <0x40 0x4>;
+                               #reset-cells = <1>;
+                               clock-names = "gio", "link";
+                               clocks = <&sys_clk 12>, <&sys_clk 15>;
+                               reset-names = "gio", "link";
+                               resets = <&sys_rst 12>, <&sys_rst 15>;
+                       };
+               };
+
                nand: nand@68000000 {
                        compatible = "socionext,uniphier-denali-nand-v5a";
                        status = "disabled";
@@ -394,7 +580,8 @@
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;
-                       clocks = <&sys_clk 2>;
+                       clock-names = "nand", "nand_x", "ecc";
+                       clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
                };
        };

diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index 06c2cef..3657387 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -156,6 +156,28 @@
                        cache-level = <3>;
                };
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi1: spi@54006100 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006100 0x100>;
+                       interrupts = <0 216 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi1>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";
@@ -439,9 +461,44 @@
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand2cs>;
-                       clocks = <&sys_clk 2>;
+                       clock-names = "nand", "nand_x", "ecc";
+                       clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
                };
+
+               emmc: sdhc@68400000 {
+                       compatible = "socionext,uniphier-sd-v3.1";
+                       status = "disabled";
+                       reg = <0x68400000 0x800>;
+                       interrupts = <0 78 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_emmc>;
+                       clocks = <&sd_clk 1>;
+                       reset-names = "host", "hw";
+                       resets = <&sd_rst 1>, <&sd_rst 6>;
+                       bus-width = <8>;
+                       cap-mmc-highspeed;
+                       cap-mmc-hw-reset;
+                       non-removable;
+               };
+
+               sd: sdhc@68800000 {
+                       compatible = "socionext,uniphier-sd-v3.1";
+                       status = "disabled";
+                       reg = <0x68800000 0x800>;
+                       interrupts = <0 76 4>;
+                       pinctrl-names = "default", "uhs";
+                       pinctrl-0 = <&pinctrl_sd>;
+                       pinctrl-1 = <&pinctrl_sd_uhs>;
+                       clocks = <&sd_clk 0>;
+                       reset-names = "host";
+                       resets = <&sd_rst 0>;
+                       bus-width = <4>;
+                       cap-sd-highspeed;
+                       sd-uhs-sdr12;
+                       sd-uhs-sdr25;
+                       sd-uhs-sdr50;
+               };
        };
 };
 

diff --git a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
index bed26b8..e27fd4f 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
+++ b/arch/arm/boot/dts/uniphier-pxs2-gentil.dts
@@ -76,6 +76,10 @@
        };
 };
 
+&emmc {
+       status = "okay";
+};
+
 &eth {
        status = "okay";
        phy-handle = <&ethphy>;
@@ -86,3 +90,11 @@
                reg = <1>;
        };
 };
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
index b13d2d1..23fe42b 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
+++ b/arch/arm/boot/dts/uniphier-pxs2-vodka.dts
@@ -77,6 +77,10 @@
        status = "okay";
 };
 
+&emmc {
+       status = "okay";
+};
+
 &eth {
        status = "okay";
        phy-handle = <&ethphy>;
@@ -87,3 +91,7 @@
                reg = <1>;
        };
 };
+
+&usb0 {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index e2d1a22..8d20e95 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -167,6 +167,28 @@
                        cache-level = <2>;
                };
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi1: spi@54006100 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006100 0x100>;
+                       interrupts = <0 216 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi1>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";
@@ -422,6 +444,40 @@
                        };
                };
 
+               emmc: sdhc@5a000000 {
+                       compatible = "socionext,uniphier-sd-v3.1.1";
+                       status = "disabled";
+                       reg = <0x5a000000 0x800>;
+                       interrupts = <0 78 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_emmc>;
+                       clocks = <&sd_clk 1>;
+                       reset-names = "host", "hw";
+                       resets = <&sd_rst 1>, <&sd_rst 6>;
+                       bus-width = <8>;
+                       cap-mmc-highspeed;
+                       cap-mmc-hw-reset;
+                       non-removable;
+               };
+
+               sd: sdhc@5a400000 {
+                       compatible = "socionext,uniphier-sd-v3.1.1";
+                       status = "disabled";
+                       reg = <0x5a400000 0x800>;
+                       interrupts = <0 76 4>;
+                       pinctrl-names = "default", "uhs";
+                       pinctrl-0 = <&pinctrl_sd>;
+                       pinctrl-1 = <&pinctrl_sd_uhs>;
+                       clocks = <&sd_clk 0>;
+                       reset-names = "host";
+                       resets = <&sd_rst 0>;
+                       bus-width = <4>;
+                       cap-sd-highspeed;
+                       sd-uhs-sdr12;
+                       sd-uhs-sdr25;
+                       sd-uhs-sdr50;
+               };
+
                soc_glue: soc-glue@5f800000 {
                        compatible = "socionext,uniphier-pxs2-soc-glue",
                                     "simple-mfd", "syscon";
@@ -523,6 +579,186 @@
                        };
                };
 
+               usb0: usb@65a00000 {
+                       compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+                       status = "disabled";
+                       reg = <0x65a00000 0xcd00>;
+                       interrupt-names = "host", "peripheral";
+                       interrupts = <0 134 4>, <0 135 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
+                       clock-names = "ref", "bus_early", "suspend";
+                       clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>;
+                       resets = <&usb0_rst 15>;
+                       phys = <&usb0_hsphy0>, <&usb0_hsphy1>,
+                              <&usb0_ssphy0>, <&usb0_ssphy1>;
+                       dr_mode = "host";
+               };
+
+               usb-glue@65b00000 {
+                       compatible = "socionext,uniphier-pxs2-dwc3-glue",
+                                    "simple-mfd";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x65b00000 0x400>;
+
+                       usb0_rst: reset@0 {
+                               compatible = "socionext,uniphier-pxs2-usb3-reset";
+                               reg = <0x0 0x4>;
+                               #reset-cells = <1>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 14>;
+                               reset-names = "link";
+                               resets = <&sys_rst 14>;
+                       };
+
+                       usb0_vbus0: regulator@100 {
+                               compatible = "socionext,uniphier-pxs2-usb3-regulator";
+                               reg = <0x100 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 14>;
+                               reset-names = "link";
+                               resets = <&sys_rst 14>;
+                       };
+
+                       usb0_vbus1: regulator@110 {
+                               compatible = "socionext,uniphier-pxs2-usb3-regulator";
+                               reg = <0x110 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 14>;
+                               reset-names = "link";
+                               resets = <&sys_rst 14>;
+                       };
+
+                       usb0_hsphy0: hs-phy@200 {
+                               compatible = "socionext,uniphier-pxs2-usb3-hsphy";
+                               reg = <0x200 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 16>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 16>;
+                               vbus-supply = <&usb0_vbus0>;
+                       };
+
+                       usb0_hsphy1: hs-phy@210 {
+                               compatible = "socionext,uniphier-pxs2-usb3-hsphy";
+                               reg = <0x210 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 16>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 16>;
+                               vbus-supply = <&usb0_vbus1>;
+                       };
+
+                       usb0_ssphy0: ss-phy@300 {
+                               compatible = "socionext,uniphier-pxs2-usb3-ssphy";
+                               reg = <0x300 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 17>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 17>;
+                               vbus-supply = <&usb0_vbus0>;
+                       };
+
+                       usb0_ssphy1: ss-phy@310 {
+                               compatible = "socionext,uniphier-pxs2-usb3-ssphy";
+                               reg = <0x310 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 18>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 18>;
+                               vbus-supply = <&usb0_vbus1>;
+                       };
+               };
+
+               usb1: usb@65c00000 {
+                       compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+                       status = "disabled";
+                       reg = <0x65c00000 0xcd00>;
+                       interrupt-names = "host", "peripheral";
+                       interrupts = <0 137 4>, <0 138 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
+                       clock-names = "ref", "bus_early", "suspend";
+                       clocks = <&sys_clk 15>, <&sys_clk 15>, <&sys_clk 15>;
+                       resets = <&usb1_rst 15>;
+                       phys = <&usb1_hsphy0>, <&usb1_hsphy1>, <&usb1_ssphy0>;
+                       dr_mode = "host";
+               };
+
+               usb-glue@65d00000 {
+                       compatible = "socionext,uniphier-pxs2-dwc3-glue",
+                                    "simple-mfd";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x65d00000 0x400>;
+
+                       usb1_rst: reset@0 {
+                               compatible = "socionext,uniphier-pxs2-usb3-reset";
+                               reg = <0x0 0x4>;
+                               #reset-cells = <1>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 15>;
+                               reset-names = "link";
+                               resets = <&sys_rst 15>;
+                       };
+
+                       usb1_vbus0: regulator@100 {
+                               compatible = "socionext,uniphier-pxs2-usb3-regulator";
+                               reg = <0x100 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 15>;
+                               reset-names = "link";
+                               resets = <&sys_rst 15>;
+                       };
+
+                       usb1_vbus1: regulator@110 {
+                               compatible = "socionext,uniphier-pxs2-usb3-regulator";
+                               reg = <0x110 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 15>;
+                               reset-names = "link";
+                               resets = <&sys_rst 15>;
+                       };
+
+                       usb1_hsphy0: hs-phy@200 {
+                               compatible = "socionext,uniphier-pxs2-usb3-hsphy";
+                               reg = <0x200 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 15>, <&sys_clk 20>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 15>, <&sys_rst 20>;
+                               vbus-supply = <&usb1_vbus0>;
+                       };
+
+                       usb1_hsphy1: hs-phy@210 {
+                               compatible = "socionext,uniphier-pxs2-usb3-hsphy";
+                               reg = <0x210 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 15>, <&sys_clk 20>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 15>, <&sys_rst 20>;
+                               vbus-supply = <&usb1_vbus1>;
+                       };
+
+                       usb1_ssphy0: ss-phy@300 {
+                               compatible = "socionext,uniphier-pxs2-usb3-ssphy";
+                               reg = <0x300 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 15>, <&sys_clk 21>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 15>, <&sys_rst 21>;
+                               vbus-supply = <&usb1_vbus0>;
+                       };
+               };
+
                nand: nand@68000000 {
                        compatible = "socionext,uniphier-denali-nand-v5b";
                        status = "disabled";
@@ -531,7 +767,8 @@
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand2cs>;
-                       clocks = <&sys_clk 2>;
+                       clock-names = "nand", "nand_x", "ecc";
+                       clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
                };
        };

diff --git a/arch/arm/boot/dts/uniphier-sld8-ref.dts b/arch/arm/boot/dts/uniphier-sld8-ref.dts
index fe386fa..01bf94c 100644 (file)
--- a/arch/arm/boot/dts/uniphier-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-sld8-ref.dts
@@ -63,6 +63,10 @@
        status = "okay";
 };
 
+&sd {
+       status = "okay";
+};
+
 &usb0 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi
index e9b9b4f..f7fcf6b 100644 (file)
--- a/arch/arm/boot/dts/uniphier-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-sld8.dtsi
@@ -63,6 +63,17 @@
                        cache-level = <2>;
                };
 
+               spi: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";
@@ -228,6 +239,40 @@
                        };
                };
 
+               sd: sdhc@5a400000 {
+                       compatible = "socionext,uniphier-sd-v2.91";
+                       status = "disabled";
+                       reg = <0x5a400000 0x200>;
+                       interrupts = <0 76 4>;
+                       pinctrl-names = "default", "uhs";
+                       pinctrl-0 = <&pinctrl_sd>;
+                       pinctrl-1 = <&pinctrl_sd_uhs>;
+                       clocks = <&mio_clk 0>;
+                       reset-names = "host", "bridge";
+                       resets = <&mio_rst 0>, <&mio_rst 3>;
+                       bus-width = <4>;
+                       cap-sd-highspeed;
+                       sd-uhs-sdr12;
+                       sd-uhs-sdr25;
+                       sd-uhs-sdr50;
+               };
+
+               emmc: sdhc@5a500000 {
+                       compatible = "socionext,uniphier-sd-v2.91";
+                       status = "disabled";
+                       reg = <0x5a500000 0x200>;
+                       interrupts = <0 78 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_emmc>;
+                       clocks = <&mio_clk 1>;
+                       reset-names = "host", "bridge", "hw";
+                       resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
+                       bus-width = <8>;
+                       cap-mmc-highspeed;
+                       cap-mmc-hw-reset;
+                       non-removable;
+               };
+
                usb0: usb@5a800100 {
                        compatible = "socionext,uniphier-ehci", "generic-ehci";
                        status = "disabled";
@@ -351,7 +396,8 @@
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand2cs>;
-                       clocks = <&sys_clk 2>;
+                       clock-names = "nand", "nand_x", "ecc";
+                       clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
                };
        };

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index d63b56e..31ba52b 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -116,6 +116,28 @@
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi1: spi@54006100 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006100 0x100>;
+                       interrupts = <0 216 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi1>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";
@@ -432,6 +454,8 @@
                                 <&mio_clk 12>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
                                 <&mio_rst 12>;
+                       phy-names = "usb";
+                       phys = <&usb_phy0>;
                        has-transaction-translator;
                };
 
@@ -446,6 +470,8 @@
                                 <&mio_clk 13>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
                                 <&mio_rst 13>;
+                       phy-names = "usb";
+                       phys = <&usb_phy1>;
                        has-transaction-translator;
                };
 
@@ -460,6 +486,8 @@
                                 <&mio_clk 14>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
                                 <&mio_rst 14>;
+                       phy-names = "usb";
+                       phys = <&usb_phy2>;
                        has-transaction-translator;
                };
 
@@ -488,6 +516,27 @@
                        pinctrl: pinctrl {
                                compatible = "socionext,uniphier-ld11-pinctrl";
                        };
+
+                       usb-phy {
+                               compatible = "socionext,uniphier-ld11-usb2-phy";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               usb_phy0: phy@0 {
+                                       reg = <0>;
+                                       #phy-cells = <0>;
+                               };
+
+                               usb_phy1: phy@1 {
+                                       reg = <1>;
+                                       #phy-cells = <0>;
+                               };
+
+                               usb_phy2: phy@2 {
+                                       reg = <2>;
+                                       #phy-cells = <0>;
+                               };
+                       };
                };
 
                soc-glue@5f900000 {
@@ -571,7 +620,8 @@
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;
-                       clocks = <&sys_clk 2>;
+                       clock-names = "nand", "nand_x", "ecc";
+                       clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
                };
        };

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
index 1a5e7c2..d7ae28a 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts
@@ -148,3 +148,7 @@
 &nand {
        status = "okay";
 };
+
+&usb {
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
index 440c2e6..406244a 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
@@ -75,3 +75,7 @@
                drive-strength = <9>;
        };
 };
+
+&usb {
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index caf1126..d7e2d89 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -224,6 +224,50 @@
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi1: spi@54006100 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006100 0x100>;
+                       interrupts = <0 216 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi1>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi2: spi@54006200 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006200 0x100>;
+                       interrupts = <0 229 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi2>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi3: spi@54006300 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006300 0x100>;
+                       interrupts = <0 230 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi3>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";
@@ -528,6 +572,20 @@
                        cdns,phy-dll-delay-sdclk-hsmmc = <21>;
                };
 
+               sd: sdhc@5a400000 {
+                       compatible = "socionext,uniphier-sd-v3.1.1";
+                       status = "disabled";
+                       reg = <0x5a400000 0x800>;
+                       interrupts = <0 76 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_sd>;
+                       clocks = <&sd_clk 0>;
+                       reset-names = "host";
+                       resets = <&sd_rst 0>;
+                       bus-width = <4>;
+                       cap-sd-highspeed;
+               };
+
                soc_glue: soc-glue@5f800000 {
                        compatible = "socionext,uniphier-ld20-soc-glue",
                                     "simple-mfd", "syscon";
@@ -553,6 +611,50 @@
                        efuse@200 {
                                compatible = "socionext,uniphier-efuse";
                                reg = <0x200 0x68>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               /* USB cells */
+                               usb_rterm0: trim@54,4 {
+                                       reg = <0x54 1>;
+                                       bits = <4 2>;
+                               };
+                               usb_rterm1: trim@55,4 {
+                                       reg = <0x55 1>;
+                                       bits = <4 2>;
+                               };
+                               usb_rterm2: trim@58,4 {
+                                       reg = <0x58 1>;
+                                       bits = <4 2>;
+                               };
+                               usb_rterm3: trim@59,4 {
+                                       reg = <0x59 1>;
+                                       bits = <4 2>;
+                               };
+                               usb_sel_t0: trim@54,0 {
+                                       reg = <0x54 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_sel_t1: trim@55,0 {
+                                       reg = <0x55 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_sel_t2: trim@58,0 {
+                                       reg = <0x58 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_sel_t3: trim@59,0 {
+                                       reg = <0x59 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_hs_i0: trim@56,0 {
+                                       reg = <0x56 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_hs_i2: trim@5a,0 {
+                                       reg = <0x5a 1>;
+                                       bits = <0 4>;
+                               };
                        };
                };
 
@@ -620,6 +722,156 @@
                        };
                };
 
+               usb: usb@65a00000 {
+                       compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+                       status = "disabled";
+                       reg = <0x65a00000 0xcd00>;
+                       interrupt-names = "host";
+                       interrupts = <0 134 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>,
+                                   <&pinctrl_usb2>, <&pinctrl_usb3>;
+                       clock-names = "ref", "bus_early", "suspend";
+                       clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>;
+                       resets = <&usb_rst 15>;
+                       phys = <&usb_hsphy0>, <&usb_hsphy1>,
+                              <&usb_hsphy2>, <&usb_hsphy3>,
+                              <&usb_ssphy0>, <&usb_ssphy1>;
+                       dr_mode = "host";
+               };
+
+               usb-glue@65b00000 {
+                       compatible = "socionext,uniphier-ld20-dwc3-glue",
+                                    "simple-mfd";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x65b00000 0x400>;
+
+                       usb_rst: reset@0 {
+                               compatible = "socionext,uniphier-ld20-usb3-reset";
+                               reg = <0x0 0x4>;
+                               #reset-cells = <1>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 14>;
+                               reset-names = "link";
+                               resets = <&sys_rst 14>;
+                       };
+
+                       usb_vbus0: regulator@100 {
+                               compatible = "socionext,uniphier-ld20-usb3-regulator";
+                               reg = <0x100 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 14>;
+                               reset-names = "link";
+                               resets = <&sys_rst 14>;
+                       };
+
+                       usb_vbus1: regulator@110 {
+                               compatible = "socionext,uniphier-ld20-usb3-regulator";
+                               reg = <0x110 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 14>;
+                               reset-names = "link";
+                               resets = <&sys_rst 14>;
+                       };
+
+                       usb_vbus2: regulator@120 {
+                               compatible = "socionext,uniphier-ld20-usb3-regulator";
+                               reg = <0x120 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 14>;
+                               reset-names = "link";
+                               resets = <&sys_rst 14>;
+                       };
+
+                       usb_vbus3: regulator@130 {
+                               compatible = "socionext,uniphier-ld20-usb3-regulator";
+                               reg = <0x130 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 14>;
+                               reset-names = "link";
+                               resets = <&sys_rst 14>;
+                       };
+
+                       usb_hsphy0: hs-phy@200 {
+                               compatible = "socionext,uniphier-ld20-usb3-hsphy";
+                               reg = <0x200 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 16>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 16>;
+                               vbus-supply = <&usb_vbus0>;
+                               nvmem-cell-names = "rterm", "sel_t", "hs_i";
+                               nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>,
+                                             <&usb_hs_i0>;
+                       };
+
+                       usb_hsphy1: hs-phy@210 {
+                               compatible = "socionext,uniphier-ld20-usb3-hsphy";
+                               reg = <0x210 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 16>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 16>;
+                               vbus-supply = <&usb_vbus1>;
+                               nvmem-cell-names = "rterm", "sel_t", "hs_i";
+                               nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>,
+                                             <&usb_hs_i0>;
+                       };
+
+                       usb_hsphy2: hs-phy@220 {
+                               compatible = "socionext,uniphier-ld20-usb3-hsphy";
+                               reg = <0x220 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 17>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 17>;
+                               vbus-supply = <&usb_vbus2>;
+                               nvmem-cell-names = "rterm", "sel_t", "hs_i";
+                               nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>,
+                                             <&usb_hs_i2>;
+                       };
+
+                       usb_hsphy3: hs-phy@230 {
+                               compatible = "socionext,uniphier-ld20-usb3-hsphy";
+                               reg = <0x230 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 17>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 17>;
+                               vbus-supply = <&usb_vbus3>;
+                               nvmem-cell-names = "rterm", "sel_t", "hs_i";
+                               nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>,
+                                             <&usb_hs_i2>;
+                       };
+
+                       usb_ssphy0: ss-phy@300 {
+                               compatible = "socionext,uniphier-ld20-usb3-ssphy";
+                               reg = <0x300 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 18>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 18>;
+                               vbus-supply = <&usb_vbus0>;
+                       };
+
+                       usb_ssphy1: ss-phy@310 {
+                               compatible = "socionext,uniphier-ld20-usb3-ssphy";
+                               reg = <0x310 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 14>, <&sys_clk 19>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 14>, <&sys_rst 19>;
+                               vbus-supply = <&usb_vbus1>;
+                       };
+               };
+
                nand: nand@68000000 {
                        compatible = "socionext,uniphier-denali-nand-v5b";
                        status = "disabled";
@@ -628,7 +880,8 @@
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;
-                       clocks = <&sys_clk 2>;
+                       clock-names = "nand", "nand_x", "ecc";
+                       clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
                };
        };

diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index c1bb607..a41f7ca 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -75,6 +75,10 @@
        status = "okay";
 };
 
+&sd {
+       status = "okay";
+};
+
 &eth0 {
        status = "okay";
        phy-handle = <&ethphy0>;
@@ -100,3 +104,11 @@
 &nand {
        status = "okay";
 };
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 2a4cf42..4f57c9e 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -144,6 +144,28 @@
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi1: spi@54006100 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006100 0x100>;
+                       interrupts = <0 216 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi1>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";
@@ -341,6 +363,24 @@
                        cdns,phy-dll-delay-sdclk-hsmmc = <21>;
                };
 
+               sd: sdhc@5a400000 {
+                       compatible = "socionext,uniphier-sd-v3.1.1";
+                       status = "disabled";
+                       reg = <0x5a400000 0x800>;
+                       interrupts = <0 76 4>;
+                       pinctrl-names = "default", "uhs";
+                       pinctrl-0 = <&pinctrl_sd>;
+                       pinctrl-1 = <&pinctrl_sd_uhs>;
+                       clocks = <&sd_clk 0>;
+                       reset-names = "host";
+                       resets = <&sd_rst 0>;
+                       bus-width = <4>;
+                       cap-sd-highspeed;
+                       sd-uhs-sdr12;
+                       sd-uhs-sdr25;
+                       sd-uhs-sdr50;
+               };
+
                soc_glue: soc-glue@5f800000 {
                        compatible = "socionext,uniphier-pxs3-soc-glue",
                                     "simple-mfd", "syscon";
@@ -366,6 +406,50 @@
                        efuse@200 {
                                compatible = "socionext,uniphier-efuse";
                                reg = <0x200 0x68>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+
+                               /* USB cells */
+                               usb_rterm0: trim@54,4 {
+                                       reg = <0x54 1>;
+                                       bits = <4 2>;
+                               };
+                               usb_rterm1: trim@55,4 {
+                                       reg = <0x55 1>;
+                                       bits = <4 2>;
+                               };
+                               usb_rterm2: trim@58,4 {
+                                       reg = <0x58 1>;
+                                       bits = <4 2>;
+                               };
+                               usb_rterm3: trim@59,4 {
+                                       reg = <0x59 1>;
+                                       bits = <4 2>;
+                               };
+                               usb_sel_t0: trim@54,0 {
+                                       reg = <0x54 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_sel_t1: trim@55,0 {
+                                       reg = <0x55 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_sel_t2: trim@58,0 {
+                                       reg = <0x58 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_sel_t3: trim@59,0 {
+                                       reg = <0x59 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_hs_i0: trim@56,0 {
+                                       reg = <0x56 1>;
+                                       bits = <0 4>;
+                               };
+                               usb_hs_i2: trim@5a,0 {
+                                       reg = <0x5a 1>;
+                                       bits = <0 4>;
+                               };
                        };
                };
 
@@ -447,6 +531,202 @@
                        };
                };
 
+               usb0: usb@65a00000 {
+                       compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+                       status = "disabled";
+                       reg = <0x65a00000 0xcd00>;
+                       interrupt-names = "host", "peripheral";
+                       interrupts = <0 134 4>, <0 135 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
+                       clock-names = "ref", "bus_early", "suspend";
+                       clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+                       resets = <&usb0_rst 15>;
+                       phys = <&usb0_hsphy0>, <&usb0_hsphy1>,
+                              <&usb0_ssphy0>, <&usb0_ssphy1>;
+                       dr_mode = "host";
+               };
+
+               usb-glue@65b00000 {
+                       compatible = "socionext,uniphier-pxs3-dwc3-glue",
+                                    "simple-mfd";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x65b00000 0x400>;
+
+                       usb0_rst: reset@0 {
+                               compatible = "socionext,uniphier-pxs3-usb3-reset";
+                               reg = <0x0 0x4>;
+                               #reset-cells = <1>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 12>;
+                               reset-names = "link";
+                               resets = <&sys_rst 12>;
+                       };
+
+                       usb0_vbus0: regulator@100 {
+                               compatible = "socionext,uniphier-pxs3-usb3-regulator";
+                               reg = <0x100 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 12>;
+                               reset-names = "link";
+                               resets = <&sys_rst 12>;
+                       };
+
+                       usb0_vbus1: regulator@110 {
+                               compatible = "socionext,uniphier-pxs3-usb3-regulator";
+                               reg = <0x110 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 12>;
+                               reset-names = "link";
+                               resets = <&sys_rst 12>;
+                       };
+
+                       usb0_hsphy0: hs-phy@200 {
+                               compatible = "socionext,uniphier-pxs3-usb3-hsphy";
+                               reg = <0x200 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 12>, <&sys_clk 16>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 12>, <&sys_rst 16>;
+                               vbus-supply = <&usb0_vbus0>;
+                               nvmem-cell-names = "rterm", "sel_t", "hs_i";
+                               nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>,
+                                             <&usb_hs_i0>;
+                       };
+
+                       usb0_hsphy1: hs-phy@210 {
+                               compatible = "socionext,uniphier-pxs3-usb3-hsphy";
+                               reg = <0x210 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 12>, <&sys_clk 16>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 12>, <&sys_rst 16>;
+                               vbus-supply = <&usb0_vbus1>;
+                               nvmem-cell-names = "rterm", "sel_t", "hs_i";
+                               nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>,
+                                             <&usb_hs_i0>;
+                       };
+
+                       usb0_ssphy0: ss-phy@300 {
+                               compatible = "socionext,uniphier-pxs3-usb3-ssphy";
+                               reg = <0x300 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 12>, <&sys_clk 17>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 12>, <&sys_rst 17>;
+                               vbus-supply = <&usb0_vbus0>;
+                       };
+
+                       usb0_ssphy1: ss-phy@310 {
+                               compatible = "socionext,uniphier-pxs3-usb3-ssphy";
+                               reg = <0x310 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy";
+                               clocks = <&sys_clk 12>, <&sys_clk 18>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 12>, <&sys_rst 18>;
+                               vbus-supply = <&usb0_vbus1>;
+                       };
+               };
+
+               usb1: usb@65c00000 {
+                       compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+                       status = "disabled";
+                       reg = <0x65c00000 0xcd00>;
+                       interrupt-names = "host", "peripheral";
+                       interrupts = <0 137 4>, <0 138 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
+                       clock-names = "ref", "bus_early", "suspend";
+                       clocks = <&sys_clk 13>, <&sys_clk 13>, <&sys_clk 13>;
+                       resets = <&usb1_rst 15>;
+                       phys = <&usb1_hsphy0>, <&usb1_hsphy1>,
+                              <&usb1_ssphy0>;
+                       dr_mode = "host";
+               };
+
+               usb-glue@65d00000 {
+                       compatible = "socionext,uniphier-pxs3-dwc3-glue",
+                                    "simple-mfd";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x65d00000 0x400>;
+
+                       usb1_rst: reset@0 {
+                               compatible = "socionext,uniphier-pxs3-usb3-reset";
+                               reg = <0x0 0x4>;
+                               #reset-cells = <1>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 13>;
+                               reset-names = "link";
+                               resets = <&sys_rst 13>;
+                       };
+
+                       usb1_vbus0: regulator@100 {
+                               compatible = "socionext,uniphier-pxs3-usb3-regulator";
+                               reg = <0x100 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 13>;
+                               reset-names = "link";
+                               resets = <&sys_rst 13>;
+                       };
+
+                       usb1_vbus1: regulator@110 {
+                               compatible = "socionext,uniphier-pxs3-usb3-regulator";
+                               reg = <0x110 0x10>;
+                               clock-names = "link";
+                               clocks = <&sys_clk 13>;
+                               reset-names = "link";
+                               resets = <&sys_rst 13>;
+                       };
+
+                       usb1_hsphy0: hs-phy@200 {
+                               compatible = "socionext,uniphier-pxs3-usb3-hsphy";
+                               reg = <0x200 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy", "phy-ext";
+                               clocks = <&sys_clk 13>, <&sys_clk 20>,
+                                        <&sys_clk 14>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 13>, <&sys_rst 20>;
+                               vbus-supply = <&usb1_vbus0>;
+                               nvmem-cell-names = "rterm", "sel_t", "hs_i";
+                               nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>,
+                                             <&usb_hs_i2>;
+                       };
+
+                       usb1_hsphy1: hs-phy@210 {
+                               compatible = "socionext,uniphier-pxs3-usb3-hsphy";
+                               reg = <0x210 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy", "phy-ext";
+                               clocks = <&sys_clk 13>, <&sys_clk 20>,
+                                        <&sys_clk 14>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 13>, <&sys_rst 20>;
+                               vbus-supply = <&usb1_vbus1>;
+                               nvmem-cell-names = "rterm", "sel_t", "hs_i";
+                               nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>,
+                                             <&usb_hs_i2>;
+                       };
+
+                       usb1_ssphy0: ss-phy@300 {
+                               compatible = "socionext,uniphier-pxs3-usb3-ssphy";
+                               reg = <0x300 0x10>;
+                               #phy-cells = <0>;
+                               clock-names = "link", "phy", "phy-ext";
+                               clocks = <&sys_clk 13>, <&sys_clk 21>,
+                                        <&sys_clk 14>;
+                               reset-names = "link", "phy";
+                               resets = <&sys_rst 13>, <&sys_rst 21>;
+                               vbus-supply = <&usb1_vbus0>;
+                       };
+               };
+
                nand: nand@68000000 {
                        compatible = "socionext,uniphier-denali-nand-v5b";
                        status = "disabled";
@@ -455,7 +735,8 @@
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;
-                       clocks = <&sys_clk 2>;
+                       clock-names = "nand", "nand_x", "ecc";
+                       clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
                };
        };