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drm/i915: Split drop caches into GT and i915 parts
authorTvrtko Ursulin <tvrtko.ursulin@intel.com>
Tue, 22 Oct 2019 09:47:21 +0000 (10:47 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 22 Oct 2019 11:16:42 +0000 (12:16 +0100)
Just compartmentalizes code a bit more.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191022094726.3001-8-tvrtko.ursulin@linux.intel.com
drivers/gpu/drm/i915/i915_debugfs.c

index ada57ee..1621143 100644 (file)
@@ -3648,17 +3648,11 @@ i915_drop_caches_get(void *data, u64 *val)
 
        return 0;
 }
-
 static int
-i915_drop_caches_set(void *data, u64 val)
+gt_drop_caches(struct intel_gt *gt, u64 val)
 {
-       struct drm_i915_private *i915 = data;
-       struct intel_gt *gt = &i915->gt;
        int ret;
 
-       DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
-                 val, val & DROP_ALL);
-
        if (val & DROP_RESET_ACTIVE &&
            wait_for(intel_engines_are_idle(gt), I915_IDLE_ENGINES_TIMEOUT))
                intel_gt_set_wedged(gt);
@@ -3681,6 +3675,22 @@ i915_drop_caches_set(void *data, u64 val)
        if (val & DROP_RESET_ACTIVE && intel_gt_terminally_wedged(gt))
                intel_gt_handle_error(gt, ALL_ENGINES, 0, NULL);
 
+       return 0;
+}
+
+static int
+i915_drop_caches_set(void *data, u64 val)
+{
+       struct drm_i915_private *i915 = data;
+       int ret;
+
+       DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
+                 val, val & DROP_ALL);
+
+       ret = gt_drop_caches(&i915->gt, val);
+       if (ret)
+               return ret;
+
        fs_reclaim_acquire(GFP_KERNEL);
        if (val & DROP_BOUND)
                i915_gem_shrink(i915, LONG_MAX, NULL, I915_SHRINK_BOUND);