[VM][PC9801][CPUREG][WIP] Improve around V30 SUB CPU.This still WIP.

diff --git a/source/src/vm/pc9801/cpureg.cpp b/source/src/vm/pc9801/cpureg.cpp
index 2e2418b..391fef5 100644 (file)
--- a/source/src/vm/pc9801/cpureg.cpp
+++ b/source/src/vm/pc9801/cpureg.cpp
@@ -68,10 +68,12 @@ void CPUREG::reset()
                cancel_event(this, event_wait);
                event_wait = -1;
        }
-       d_cpu->write_signal(SIG_CPU_BUSREQ, 0, 1);
+
 #if defined(HAS_I386) || defined(HAS_I486) || defined(HAS_PENTIUM) || defined(HAS_I286)
        use_v30 = ((config.cpu_type & 0x02) != 0) ? true : false;
        halt_by_use_v30();
+#else
+       d_cpu->write_signal(SIG_CPU_BUSREQ, 0, 1);
 #endif
 }
 
@@ -95,7 +97,8 @@ void CPUREG::write_signal(int ch, uint32_t data, uint32_t mask)
        } else if(ch == SIG_CPUREG_USE_V30) {
 #if defined(HAS_I386) || defined(HAS_I486) || defined(HAS_PENTIUM) || defined(HAS_I286)
                use_v30 = ((data & mask) != 0);
-               halt_by_use_v30();
+//             halt_by_use_v30();
+               out_debug_log(_T("SIG_CPUREG_USE_V30: V30=%s\n"), (use_v30) ? _T("YES") : _T("NO")); 
 #endif
        }
 }
@@ -130,13 +133,14 @@ void CPUREG::write_io8(uint32_t addr, uint32_t data)
 //                     d_pio->write_signal(SIG_I8255_PORT_C, reset_reg, 0xff);
                        // ToDo: Reflesh
                        reg_0f0 = data;
+                       d_cpu->set_address_mask(0x000fffff);
+                       d_cpu->reset();
 #if defined(HAS_I386) || defined(HAS_I486) || defined(HAS_PENTIUM) || defined(HAS_I286)
-                       use_v30 = ((data & 1) != 0);
+                       use_v30 = (((data & 1) != 0) || ((data & 2) != 0));
+                       d_cpu->set_address_mask(0x000fffff);
                        d_v30cpu->reset();
-                       // halt_by_use_v30();
+                       halt_by_use_v30();
 #endif
-                       d_cpu->set_address_mask(0x000fffff);
-                       d_cpu->reset();
                        
                }
                break;
@@ -236,7 +240,11 @@ uint32_t CPUREG::read_io8(uint32_t addr)
 //#if defined(HAS_I86) || defined(HAS_V30)
                // ToDo: Older VMs.
                //value |= ((reg_0f0 & 0x01) == 0) ? 0x00 : 0x02; // CPU mode, 1 = V30, 0 = 80286/80386
-               value |= 0x00; // CPU mode, 1 = V30, 0 = 80286/80386
+#if defined(HAS_I386) || defined(HAS_I486) || defined(HAS_PENTIUM) || defined(HAS_I286)
+               if(use_v30) {
+                       value |= 0x02; // CPU mode, 1 = V30, 0 = 80286/80386
+               }
+#endif
 //#endif
                value |= 0x01; // RAM access, 1 = Internal RAM, 0 = External-enhanced RAM
                return value;

diff --git a/source/src/vm/pc9801/pc9801.cpp b/source/src/vm/pc9801/pc9801.cpp
index 97afeda..64fdec7 100644 (file)
--- a/source/src/vm/pc9801/pc9801.cpp
+++ b/source/src/vm/pc9801/pc9801.cpp
@@ -1470,37 +1470,6 @@ void VM::reset()
        } else {
                port_b3 &= ~0x40;
        }
-#if defined(USE_CPU_TYPE)
-       switch(config.cpu_type & 1) {
-       case 0:
-       #if !defined(SUPPORT_HIRESO)
-               port_b3 &= ~0x02; // SPDSW, 1 = 10MHz, 0 = 12MHz
-       #else
-               port_b3 &= ~0x01; // SPDSW, 1 = 8/16MHz, 0 = 10/20MHz
-       #endif
-               break;
-       case 1:
-       #if !defined(SUPPORT_HIRESO)
-               port_b3 |= 0x02; // SPDSW, 1 = 10MHz, 0 = 12MHz
-       #else
-               port_b3 |= 0x01; // SPDSW, 1 = 8/16MHz, 0 = 10/20MHz
-       #endif
-               break;
-       }
-       #if defined(HAS_I286) || defined(HAS_I386) || defined(HAS_I486) || defined(HAS_PENTIUM)
-       if(config.cpu_type & 0x02) {// V30 or V33
-               port_b3 |= 0x04;
-//             v30cpu->write_signal(SIG_CPU_BUSREQ, 0, 1);
-//             cpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
-               cpureg->write_signal(SIG_CPUREG_USE_V30, 1, 1);
-       } else {
-               port_b3 &= ~0x04;
-//             v30cpu->write_signal(SIG_CPU_BUSREQ, 1, 1);
-//             cpu->write_signal(SIG_CPU_BUSREQ, 0, 1);
-               cpureg->write_signal(SIG_CPUREG_USE_V30, 0, 1);
-       }
-       #endif
-#endif
        pio_mouse->write_signal(SIG_I8255_PORT_B, port_b3, 0xff);
        set_cpu_clock_with_switch(((config.cpu_type & 1) != 0) ? 1 : 0);
        
@@ -1520,6 +1489,15 @@ void VM::reset()
 #else
        port_c3 |= 0x08; // MODSW, 1 = Normal Mode, 0 = Hirezo Mode
 #endif
+#if defined(USE_CPU_TYPE)
+       #if defined(HAS_I286) || defined(HAS_I386) || defined(HAS_I486) || defined(HAS_PENTIUM)
+               if(config.cpu_type & 0x02) {// V30 or V33
+                       port_c3 |= 0x04;
+               } else {
+                       port_c3 &= ~0x04;
+               }
+       #endif
+#endif
        pio_mouse->write_signal(SIG_I8255_PORT_C, port_c3, 0xff);
        
 #if defined(SUPPORT_320KB_FDD_IF)
@@ -1551,7 +1529,6 @@ void VM::reset()
        pc88pio->write_signal(SIG_I8255_PORT_C, 0, 0xff);
        pc88pio_sub->write_signal(SIG_I8255_PORT_C, 0, 0xff);
 #endif
-
 }
 
 void VM::run()
@@ -2025,9 +2002,39 @@ void VM::update_config()
                if((config.dipswitch & (1 << DIPSWITCH_POSITION_RAM512K)) == 0) {
                        mouse_port_b = mouse_port_b | 0x40;
                }
+#if defined(USE_CPU_TYPE)
+               switch(config.cpu_type & 1) {
+               case 0:
+       #if !defined(SUPPORT_HIRESO)
+                       mouse_port_b &= ~0x02; // SPDSW, 1 = 10MHz, 0 = 12MHz
+       #else
+                       mouse_port_b &= ~0x01; // SPDSW, 1 = 8/16MHz, 0 = 10/20MHz
+       #endif
+                       break;
+               case 1:
+       #if !defined(SUPPORT_HIRESO)
+                       mouse_port_b |= 0x02; // SPDSW, 1 = 10MHz, 0 = 12MHz
+       #else
+                       mouse_port_b |= 0x01; // SPDSW, 1 = 8/16MHz, 0 = 10/20MHz
+       #endif
+                       break;
+               }
+#endif
                pio_mouse->write_signal(SIG_I8255_PORT_B, mouse_port_b, 0xff);
        }
        {
+#if defined(USE_CPU_TYPE)
+       #if defined(HAS_I286) || defined(HAS_I386) || defined(HAS_I486) || defined(HAS_PENTIUM)
+               if(config.cpu_type & 0x02) {// V30 or V33
+                       pio_mouse->write_signal(SIG_I8255_PORT_C, 0x04, 0x04);
+               } else {
+                       pio_mouse->write_signal(SIG_I8255_PORT_C, 0x00, 0x04);
+               }
+       #endif
+#endif
+
+       }
+       {
                uint8_t sys_port_a = pio_sys->read_signal(SIG_I8255_PORT_A);
                //sys_port_a = sys_port_a & ~0x80;
                //if((config.dipswitch & (1 << DIPSWITCH_POSITION_GDC_FAST)) != 0) {