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drm/amdgpu: remove page flip work queue v3
authorChristian König <christian.koenig@amd.com>
Thu, 11 Feb 2016 16:31:37 +0000 (17:31 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 16 Feb 2016 22:25:38 +0000 (17:25 -0500)
Just use the system queue now that we don't block any more.

v2: handle DAL as well.
v3: agd: split DAL changes out

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Mykola Lysenko <mykola.lysenko@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1)
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

index edf9159..2cb53c2 100644 (file)
@@ -39,11 +39,9 @@ static void amdgpu_flip_callback(struct fence *f, struct fence_cb *cb)
 {
        struct amdgpu_flip_work *work =
                container_of(cb, struct amdgpu_flip_work, cb);
-       struct amdgpu_device *adev = work->adev;
-       struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[work->crtc_id];
 
        fence_put(f);
-       queue_work(amdgpu_crtc->pflip_queue, &work->flip_work);
+       schedule_work(&work->flip_work);
 }
 
 static bool amdgpu_flip_handle_fence(struct amdgpu_flip_work *work,
index fdc1be8..8d432e6 100644 (file)
@@ -390,7 +390,6 @@ struct amdgpu_crtc {
        struct drm_display_mode native_mode;
        u32 pll_id;
        /* page flipping */
-       struct workqueue_struct *pflip_queue;
        struct amdgpu_flip_work *pflip_works;
        enum amdgpu_flip_status pflip_status;
        int deferred_flip_completion;
index 093599a..a8ac8a3 100644 (file)
@@ -2670,7 +2670,6 @@ static void dce_v10_0_crtc_destroy(struct drm_crtc *crtc)
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
 
        drm_crtc_cleanup(crtc);
-       destroy_workqueue(amdgpu_crtc->pflip_queue);
        kfree(amdgpu_crtc);
 }
 
@@ -2890,7 +2889,6 @@ static int dce_v10_0_crtc_init(struct amdgpu_device *adev, int index)
 
        drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
        amdgpu_crtc->crtc_id = index;
-       amdgpu_crtc->pflip_queue = create_singlethread_workqueue("amdgpu-pageflip-queue");
        adev->mode_info.crtcs[index] = amdgpu_crtc;
 
        amdgpu_crtc->max_cursor_width = 128;
@@ -3366,7 +3364,7 @@ static int dce_v10_0_pageflip_irq(struct amdgpu_device *adev,
        spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
 
        drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
-       queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
+       schedule_work(&works->unpin_work);
 
        return 0;
 }
index 8e67249..a7699be 100644 (file)
@@ -2661,7 +2661,6 @@ static void dce_v11_0_crtc_destroy(struct drm_crtc *crtc)
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
 
        drm_crtc_cleanup(crtc);
-       destroy_workqueue(amdgpu_crtc->pflip_queue);
        kfree(amdgpu_crtc);
 }
 
@@ -2881,7 +2880,6 @@ static int dce_v11_0_crtc_init(struct amdgpu_device *adev, int index)
 
        drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
        amdgpu_crtc->crtc_id = index;
-       amdgpu_crtc->pflip_queue = create_singlethread_workqueue("amdgpu-pageflip-queue");
        adev->mode_info.crtcs[index] = amdgpu_crtc;
 
        amdgpu_crtc->max_cursor_width = 128;
@@ -3361,7 +3359,7 @@ static int dce_v11_0_pageflip_irq(struct amdgpu_device *adev,
        spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
 
        drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
-       queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
+       schedule_work(&works->unpin_work);
 
        return 0;
 }
index d0e128c..628d7b2 100644 (file)
@@ -2582,7 +2582,6 @@ static void dce_v8_0_crtc_destroy(struct drm_crtc *crtc)
        struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
 
        drm_crtc_cleanup(crtc);
-       destroy_workqueue(amdgpu_crtc->pflip_queue);
        kfree(amdgpu_crtc);
 }
 
@@ -2809,7 +2808,6 @@ static int dce_v8_0_crtc_init(struct amdgpu_device *adev, int index)
 
        drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
        amdgpu_crtc->crtc_id = index;
-       amdgpu_crtc->pflip_queue = create_singlethread_workqueue("amdgpu-pageflip-queue");
        adev->mode_info.crtcs[index] = amdgpu_crtc;
 
        amdgpu_crtc->max_cursor_width = CIK_CURSOR_WIDTH;
@@ -3375,7 +3373,7 @@ static int dce_v8_0_pageflip_irq(struct amdgpu_device *adev,
        spin_unlock_irqrestore(&adev->ddev->event_lock, flags);
 
        drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id);
-       queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work);
+       schedule_work(&works->unpin_work);
 
        return 0;
 }