OSDN Git Service
(root)
/
android-x86
/
external-llvm.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
15a8a6a
)
Register list operands are not allowed to contain only a single register. Alternate...
author
Owen Anderson
<resistor@mac.com>
Wed, 2 Nov 2011 17:41:23 +0000
(17:41 +0000)
committer
Stephen Hines
<srhines@google.com>
Mon, 14 Nov 2011 17:11:40 +0000
(09:11 -0800)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143552
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
patch
|
blob
|
history
diff --git
a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index
6927d2d
..
8dab153
100644
(file)
--- a/
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@
-1111,7
+1111,11
@@
static DecodeStatus DecodeRegListOperand(llvm::MCInst &Inst, unsigned Val,
}
// Empty register lists are not allowed.
- if (CountPopulation_32(Val) == 0) return MCDisassembler::Fail;
+ uint32_t popcnt = CountPopulation_32(Val);
+ if (popcnt == 0) return MCDisassembler::Fail;
+ // and one-register lists are unpredictable.
+ else if (popcnt == 1) Check(S, MCDisassembler::SoftFail);
+
for (unsigned i = 0; i < 16; ++i) {
if (Val & (1 << i)) {
if (!Check(S, DecodeGPRRegisterClass(Inst, i, Address, Decoder)))