class DIEAbbrev;
class DwarfDebug;
class GCMetadataPrinter;
+class GCStrategy;
class GlobalIndirectSymbol;
class GlobalObject;
class GlobalValue;
class GlobalVariable;
-class GCStrategy;
class MachineBasicBlock;
class MachineConstantPoolValue;
class MachineFunction;
class AsmPrinter : public MachineFunctionPass {
public:
/// Target machine description.
- ///
TargetMachine &TM;
/// Target Asm Printer information.
- ///
const MCAsmInfo *MAI;
/// This is the context for the output file that we are streaming. This owns
/// The symbol for the current function. This is recalculated at the beginning
/// of each call to runOnMachineFunction().
- ///
MCSymbol *CurrentFnSym = nullptr;
/// The symbol used to represent the start of the current function for the
void *GCMetadataPrinters = nullptr; // Really a DenseMap.
/// Emit comments in assembly output if this is true.
- ///
bool VerboseAsm;
+
static char ID;
/// If VerboseAsm is set, a pointer to the loop info for this function.
TimerDescription(TimerDescription), TimerGroupName(TimerGroupName),
TimerGroupDescription(TimerGroupDescription) {}
};
+
/// A vector of all debug/EH info emitters we should use. This vector
/// maintains ownership of the emitters.
SmallVector<HandlerInfo, 1> Handlers;
bool isPositionIndependent() const;
/// Return true if assembly output should contain comments.
- ///
bool isVerbose() const { return VerboseAsm; }
/// Return a unique ID for the current function.
- ///
unsigned getFunctionNumber() const;
MCSymbol *getFunctionBegin() const { return CurrentFnBegin; }
//===------------------------------------------------------------------===//
/// Record analysis usage.
- ///
void getAnalysisUsage(AnalysisUsage &AU) const override;
/// Set up the AsmPrinter when we are working on a new module. If your pass
/// Print to the current output stream assembly representations of the
/// constants in the constant pool MCP. This is used to print out constants
/// which have been "spilled to memory" by the code generator.
- ///
virtual void EmitConstantPool();
/// Print assembly representations of the jump tables used by the current
/// function to the current output stream.
- ///
virtual void EmitJumpTableInfo();
/// Emit the specified global variable to the .s file.
/// global value is specified, and if that global has an explicit alignment
/// requested, it will override the alignment request if required for
/// correctness.
- ///
void EmitAlignment(unsigned NumBits, const GlobalObject *GO = nullptr) const;
/// Lower the specified LLVM Constant to an MCExpr.
void printOffset(int64_t Offset, raw_ostream &OS) const;
/// Emit a byte directive and value.
- ///
void EmitInt8(int Value) const;
/// Emit a short directive and value.
- ///
void EmitInt16(int Value) const;
/// Emit a long directive and value.
- ///
void EmitInt32(int Value) const;
/// Emit something like ".long Hi-Lo" where the size in bytes of the directive
void EmitModuleIdents(Module &M);
void EmitXXStructorList(const DataLayout &DL, const Constant *List,
bool isCtor);
+
GCMetadataPrinter *GetOrCreateGCPrinter(GCStrategy &C);
/// Emit GlobalAlias or GlobalIFunc.
void emitGlobalIndirectSymbol(Module &M,
-//===-- llvm/CodeGen/MachineModuleInfoImpls.h -------------------*- C++ -*-===//
+//===- llvm/CodeGen/MachineModuleInfoImpls.h --------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
#ifndef LLVM_CODEGEN_MACHINEMODULEINFOIMPLS_H
#define LLVM_CODEGEN_MACHINEMODULEINFOIMPLS_H
-#include "llvm/BinaryFormat/Wasm.h"
+#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
-#include "llvm/CodeGen/ValueTypes.h"
+#include <cassert>
namespace llvm {
+
class MCSymbol;
/// MachineModuleInfoMachO - This is a MachineModuleInfoImpl implementation
DenseMap<MCSymbol *, StubValueTy> ThreadLocalGVStubs;
virtual void anchor(); // Out of line virtual method.
+
public:
MachineModuleInfoMachO(const MachineModuleInfo &) {}
DenseMap<MCSymbol *, StubValueTy> GVStubs;
virtual void anchor(); // Out of line virtual method.
+
public:
MachineModuleInfoELF(const MachineModuleInfo &) {}
} // end namespace llvm
-#endif
+#endif // LLVM_CODEGEN_MACHINEMODULEINFOIMPLS_H
-//===-- AsmPrinter.cpp - Common AsmPrinter code ---------------------------===//
+//===- AsmPrinter.cpp - Common AsmPrinter code ----------------------------===//
//
// The LLVM Compiler Infrastructure
//
#include "llvm/ADT/Triple.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Analysis/ConstantFolding.h"
+#include "llvm/Analysis/EHPersonalities.h"
#include "llvm/Analysis/ObjectUtils.h"
+#include "llvm/Analysis/OptimizationRemarkEmitter.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/BinaryFormat/ELF.h"
-#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/GCMetadata.h"
#include "llvm/CodeGen/GCMetadataPrinter.h"
#include "llvm/CodeGen/GCStrategy.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineMemOperand.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineModuleInfoImpls.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
#include "llvm/IR/BasicBlock.h"
+#include "llvm/IR/Comdat.h"
#include "llvm/IR/Constant.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/GlobalObject.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/IR/GlobalVariable.h"
+#include "llvm/IR/Instruction.h"
#include "llvm/IR/Mangler.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/Operator.h"
+#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDirectives.h"
+#include "llvm/MC/MCDwarf.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCSection.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/MCSymbolELF.h"
#include "llvm/MC/MCTargetOptions.h"
#include "llvm/MC/MCValue.h"
#include "llvm/MC/SectionKind.h"
#include "llvm/Pass.h"
#include "llvm/Support/Casting.h"
+#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Format.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOpcodes.h"
+#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <algorithm>
#include <cassert>
#include <cinttypes>
#include <cstdint>
+#include <iterator>
#include <limits>
#include <memory>
#include <string>
char AsmPrinter::ID = 0;
-typedef DenseMap<GCStrategy*, std::unique_ptr<GCMetadataPrinter>> gcp_map_type;
+using gcp_map_type = DenseMap<GCStrategy *, std::unique_ptr<GCMetadataPrinter>>;
+
static gcp_map_type &getGCMap(void *&P) {
if (!P)
P = new gcp_map_type();
}
/// getFunctionNumber - Return a unique ID for the current function.
-///
unsigned AsmPrinter::getFunctionNumber() const {
return MF->getFunctionNumber();
}
// Print a label for the basic block.
EmitBasicBlockStart(MBB);
for (auto &MI : MBB) {
-
// Print the assembly for the instruction.
if (!MI.isPosition() && !MI.isImplicitDef() && !MI.isKill() &&
!MI.isDebugValue()) {
case TargetOpcode::CFI_INSTRUCTION:
emitCFIInstruction(MI);
break;
-
case TargetOpcode::LOCAL_ESCAPE:
emitFrameAlloc(MI);
break;
-
case TargetOpcode::EH_LABEL:
case TargetOpcode::GC_LABEL:
OutStreamer->EmitLabel(MI.getOperand(0).getMCSymbol());
/// representations of the constants in the constant pool MCP. This is
/// used to print out constants which have been "spilled to memory" by
/// the code generator.
-///
void AsmPrinter::EmitConstantPool() {
const MachineConstantPool *MCP = MF->getConstantPool();
const std::vector<MachineConstantPoolEntry> &CP = MCP->getConstants();
/// EmitJumpTableInfo - Print assembly representations of the jump tables used
/// by the current function to the current output stream.
-///
void AsmPrinter::EmitJumpTableInfo() {
const DataLayout &DL = MF->getDataLayout();
const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
Structor() = default;
};
-} // end anonymous namespace
+} // end anonymous namespace
/// EmitXXStructorList - Emit the ctor or dtor list taking into account the init
/// priority.
}
/// EmitInt16 - Emit a short directive and value.
-///
void AsmPrinter::EmitInt16(int Value) const {
OutStreamer->EmitIntValue(Value, 2);
}
/// EmitInt32 - Emit a long directive and value.
-///
void AsmPrinter::EmitInt32(int Value) const {
OutStreamer->EmitIntValue(Value, 4);
}
// byte alignment. If a global value is specified, and if that global has
// an explicit alignment requested, it will override the alignment request
// if required for correctness.
-//
void AsmPrinter::EmitAlignment(unsigned NumBits, const GlobalObject *GV) const {
if (GV)
NumBits = getGVAlignmentLog2(GV, GV->getParent()->getDataLayout(), NumBits);
//
// cstexpr := <gotequiv> - <foo> + gotpcrelcst, where
// gotpcrelcst := <offset from @foo base> + <cst>
- //
MCValue MV;
if (!(*ME)->evaluateAsRelocatable(MV, nullptr, nullptr) || MV.isAbsolute())
return;
// If gotpcrelcst is positive it means that we can safely fold the pc rel
// displacement into the GOTPCREL. We can also can have an extra offset <cst>
// if the target knows how to encode it.
- //
int64_t GOTPCRelCst = Offset + MV.getConstant();
if (GOTPCRelCst < 0)
return;
// .long 42
// foo:
// .long bar@GOTPCREL+<gotpcrelcst>
- //
AsmPrinter::GOTEquivUsePair Result = AP.GlobalGOTEquivs[GOTEquivSym];
const GlobalVariable *GV = Result.first;
int NumUses = (int)Result.second;
<< " Depth=" << Loop->getLoopDepth() << '\n';
}
-
/// PrintChildLoopComment - Print comments about child loops within
/// the loop for this basic block, with nesting.
static void PrintChildLoopComment(raw_ostream &OS, const MachineLoop *Loop,
-//===-- CodeGen/AsmPrinter/EHStreamer.cpp - Exception Directive Streamer --===//
+//===- CodeGen/AsmPrinter/EHStreamer.cpp - Exception Directive Streamer ---===//
//
// The LLVM Compiler Infrastructure
//
//===----------------------------------------------------------------------===//
#include "EHStreamer.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/Twine.h"
+#include "llvm/ADT/iterator_range.h"
+#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/MCTargetOptions.h"
+#include "llvm/Support/Casting.h"
#include "llvm/Support/LEB128.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
+#include <algorithm>
+#include <cassert>
+#include <cstdint>
+#include <vector>
using namespace llvm;
EHStreamer::EHStreamer(AsmPrinter *A) : Asm(A), MMI(Asm->MMI) {}
-EHStreamer::~EHStreamer() {}
+EHStreamer::~EHStreamer() = default;
/// How many leading type ids two landing pads have in common.
unsigned EHStreamer::sharedTypeIDs(const LandingPadInfo *L,
computeActionsTable(const SmallVectorImpl<const LandingPadInfo*> &LandingPads,
SmallVectorImpl<ActionEntry> &Actions,
SmallVectorImpl<unsigned> &FirstActions) {
-
// The action table follows the call-site table in the LSDA. The individual
// records are of two types:
//
-//===-- EHStreamer.h - Exception Handling Directive Streamer ---*- C++ -*--===//
+//===- EHStreamer.h - Exception Handling Directive Streamer -----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
#include "AsmPrinterHandler.h"
#include "llvm/ADT/DenseMap.h"
+#include "llvm/Support/Compiler.h"
namespace llvm {
+
+class AsmPrinter;
struct LandingPadInfo;
-class MachineModuleInfo;
class MachineInstr;
-class MachineFunction;
+class MachineModuleInfo;
class MCSymbol;
-class MCSymbolRefExpr;
-
-template <typename T>
-class SmallVectorImpl;
+template <typename T> class SmallVectorImpl;
/// Emits exception handling directives.
class LLVM_LIBRARY_VISIBILITY EHStreamer : public AsmPrinterHandler {
struct PadRange {
// The index of the landing pad.
unsigned PadIndex;
+
// The index of the begin and end labels in the landing pad's label lists.
unsigned RangeIndex;
};
- typedef DenseMap<MCSymbol *, PadRange> RangeMapType;
+ using RangeMapType = DenseMap<MCSymbol *, PadRange>;
/// Structure describing an entry in the actions table.
struct ActionEntry {
// LPad contains the landing pad start labels.
const LandingPadInfo *LPad; // Null indicates that there is no landing pad.
+
unsigned Action;
};
/// `false' otherwise.
static bool callToNoUnwindFunction(const MachineInstr *MI);
};
-}
-#endif
+} // end namespace llvm
+#endif // LLVM_LIB_CODEGEN_ASMPRINTER_EHSTREAMER_H
#include "BranchFolding.h"
#include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
-#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/Analysis.h"
+#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Function.h"
+#include "llvm/MC/LaneBitmask.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Pass.h"
#include "llvm/Support/BlockFrequency.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOpcodes.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <cassert>
// TODO: This should be replaced with a target query.
static cl::opt<unsigned>
TailMergeSize("tail-merge-size",
- cl::desc("Min number of instructions to consider tail merging"),
- cl::init(3), cl::Hidden);
+ cl::desc("Min number of instructions to consider tail merging"),
+ cl::init(3), cl::Hidden);
namespace {
} // end anonymous namespace
char BranchFolderPass::ID = 0;
+
char &llvm::BranchFolderPassID = BranchFolderPass::ID;
INITIALIZE_PASS(BranchFolderPass, DEBUG_TYPE,
if (!PI->isSafeToMove(nullptr, DontMoveAcrossStore) || TII->isPredicated(*PI))
return MBB->end();
-
// Find out what registers are live. Note this routine is ignoring other live
// registers which are only used by instructions in successor blocks.
for (const MachineOperand &MO : PI->operands()) {
-//===-- BranchFolding.h - Fold machine code branch instructions -*- C++ -*-===//
+//===- BranchFolding.h - Fold machine code branch instructions --*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
#ifndef LLVM_LIB_CODEGEN_BRANCHFOLDING_H
#define LLVM_LIB_CODEGEN_BRANCHFOLDING_H
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Support/BlockFrequency.h"
+#include "llvm/Support/Compiler.h"
+#include <cstdint>
#include <vector>
namespace llvm {
- class MachineBlockFrequencyInfo;
- class MachineBranchProbabilityInfo;
- class MachineFunction;
- class MachineModuleInfo;
- class MachineLoopInfo;
- class TargetInstrInfo;
- class TargetRegisterInfo;
+
+class BasicBlock;
+class MachineBlockFrequencyInfo;
+class MachineBranchProbabilityInfo;
+class MachineFunction;
+class MachineLoopInfo;
+class MachineModuleInfo;
+class MachineRegisterInfo;
+class raw_ostream;
+class TargetInstrInfo;
+class TargetRegisterInfo;
class LLVM_LIBRARY_VISIBILITY BranchFolder {
public:
class MergePotentialsElt {
unsigned Hash;
MachineBasicBlock *Block;
+
public:
MergePotentialsElt(unsigned h, MachineBasicBlock *b)
: Hash(h), Block(b) {}
bool operator<(const MergePotentialsElt &) const;
};
- typedef std::vector<MergePotentialsElt>::iterator MPIterator;
+
+ using MPIterator = std::vector<MergePotentialsElt>::iterator;
+
std::vector<MergePotentialsElt> MergePotentials;
SmallPtrSet<const MachineBasicBlock*, 2> TriedMerging;
DenseMap<const MachineBasicBlock *, int> FuncletMembership;
class SameTailElt {
MPIterator MPIter;
MachineBasicBlock::iterator TailStartPos;
+
public:
SameTailElt(MPIterator mp, MachineBasicBlock::iterator tsp)
: MPIter(mp), TailStartPos(tsp) {}
MPIterator getMPIter() const {
return MPIter;
}
+
MergePotentialsElt &getMergePotentialsElt() const {
return *getMPIter();
}
+
MachineBasicBlock::iterator getTailStartPos() const {
return TailStartPos;
}
+
unsigned getHash() const {
return getMergePotentialsElt().getHash();
}
+
MachineBasicBlock *getBlock() const {
return getMergePotentialsElt().getBlock();
}
+
bool tailIsWholeBlock() const {
return TailStartPos == getBlock()->begin();
}
void setBlock(MachineBasicBlock *MBB) {
getMergePotentialsElt().setBlock(MBB);
}
+
void setTailStartPos(MachineBasicBlock::iterator Pos) {
TailStartPos = Pos;
}
class MBFIWrapper {
public:
MBFIWrapper(const MachineBlockFrequencyInfo &I) : MBFI(I) {}
+
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const;
void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F);
raw_ostream &printBlockFreq(raw_ostream &OS,
/// the function, move the instructions before MBB terminator if it's legal.
bool HoistCommonCodeInSuccs(MachineBasicBlock *MBB);
};
-}
-#endif /* LLVM_CODEGEN_BRANCHFOLDING_HPP */
+} // end namespace llvm
+
+#endif // LLVM_LIB_CODEGEN_BRANCHFOLDING_H
//
//===----------------------------------------------------------------------===//
-#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/StackProtector.h"
-#include "llvm/IR/Constants.h"
-#include "llvm/IR/DerivedTypes.h"
-#include "llvm/IR/Instructions.h"
-#include "llvm/IR/Intrinsics.h"
-#include "llvm/IR/LLVMContext.h"
-#include "llvm/IR/Module.h"
#include "llvm/Pass.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetFrameLowering.h"
+#include "llvm/Target/TargetOpcodes.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
+#include <algorithm>
+#include <cassert>
+#include <cstdint>
+#include <tuple>
using namespace llvm;
STATISTIC(NumReplacements, "Number of frame indices references replaced");
namespace {
+
class FrameRef {
MachineBasicBlock::iterator MI; // Instr referencing the frame
int64_t LocalOffset; // Local offset of the frame idx referenced
};
class LocalStackSlotPass: public MachineFunctionPass {
- SmallVector<int64_t,16> LocalOffsets;
+ SmallVector<int64_t, 16> LocalOffsets;
+
/// StackObjSet - A set of stack object indexes
- typedef SmallSetVector<int, 8> StackObjSet;
+ using StackObjSet = SmallSetVector<int, 8>;
void AdjustStackOffset(MachineFrameInfo &MFI, int FrameIdx, int64_t &Offset,
bool StackGrowsDown, unsigned &MaxAlign);
int64_t &Offset, unsigned &MaxAlign);
void calculateFrameObjectOffsets(MachineFunction &Fn);
bool insertFrameReferenceRegisters(MachineFunction &Fn);
+
public:
static char ID; // Pass identification, replacement for typeid
+
explicit LocalStackSlotPass() : MachineFunctionPass(ID) {
initializeLocalStackSlotPassPass(*PassRegistry::getPassRegistry());
}
+
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<StackProtector>();
MachineFunctionPass::getAnalysisUsage(AU);
}
-
- private:
};
+
} // end anonymous namespace
char LocalStackSlotPass::ID = 0;
+
char &llvm::LocalStackSlotAllocationID = LocalStackSlotPass::ID;
+
INITIALIZE_PASS_BEGIN(LocalStackSlotPass, DEBUG_TYPE,
"Local Stack Slot Allocation", false, false)
INITIALIZE_PASS_DEPENDENCY(StackProtector)
INITIALIZE_PASS_END(LocalStackSlotPass, DEBUG_TYPE,
"Local Stack Slot Allocation", false, false)
-
bool LocalStackSlotPass::runOnMachineFunction(MachineFunction &MF) {
MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
MachineFrameInfo &MFI,
bool StackGrowsDown, int64_t &Offset,
unsigned &MaxAlign) {
-
for (StackObjSet::const_iterator I = UnassignedObjs.begin(),
E = UnassignedObjs.end(); I != E; ++I) {
int i = *I;
/// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
/// abstract stack objects.
-///
void LocalStackSlotPass::calculateFrameObjectOffsets(MachineFunction &Fn) {
// Loop over all of the stack objects, assigning sequential addresses...
MachineFrameInfo &MFI = Fn.getFrameInfo();
-//===-- MachineFunction.cpp -----------------------------------------------===//
+//===- MachineFunction.cpp ------------------------------------------------===//
//
// The LLVM Compiler Infrastructure
//
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/Twine.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/Analysis/EHPersonalities.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
+#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/CodeGen/WinEHFuncInfo.h"
+#include "llvm/IR/Attributes.h"
+#include "llvm/IR/BasicBlock.h"
+#include "llvm/IR/Constant.h"
#include "llvm/IR/DataLayout.h"
-#include "llvm/IR/DebugInfo.h"
+#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
+#include "llvm/IR/GlobalValue.h"
+#include "llvm/IR/Instruction.h"
+#include "llvm/IR/Instructions.h"
+#include "llvm/IR/Metadata.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/ModuleSlotTracker.h"
-#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/IR/Value.h"
#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/SectionKind.h"
+#include "llvm/Support/Casting.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/Support/DOTGraphTraits.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GraphWriter.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
+#include <algorithm>
+#include <cassert>
+#include <cstddef>
+#include <cstdint>
+#include <iterator>
+#include <string>
+#include <utility>
+#include <vector>
+
using namespace llvm;
#define DEBUG_TYPE "codegen"
static cl::opt<unsigned>
- AlignAllFunctions("align-all-functions",
- cl::desc("Force the alignment of all functions."),
- cl::init(0), cl::Hidden);
+AlignAllFunctions("align-all-functions",
+ cl::desc("Force the alignment of all functions."),
+ cl::init(0), cl::Hidden);
static const char *getPropertyName(MachineFunctionProperties::Property Prop) {
- typedef MachineFunctionProperties::Property P;
+ using P = MachineFunctionProperties::Property;
+
switch(Prop) {
case P::FailedISel: return "FailedISel";
case P::IsSSA: return "IsSSA";
//===----------------------------------------------------------------------===//
// Out-of-line virtual method.
-MachineFunctionInfo::~MachineFunctionInfo() {}
+MachineFunctionInfo::~MachineFunctionInfo() = default;
void ilist_alloc_traits<MachineBasicBlock>::deleteNode(MachineBasicBlock *MBB) {
MBB->getParent()->DeleteMachineBasicBlock(MBB);
MachineBasicBlock::iterator InsertBefore, const MachineInstr &Orig) {
MachineInstr *FirstClone = nullptr;
MachineBasicBlock::const_instr_iterator I = Orig.getIterator();
- for (;;) {
+ while (true) {
MachineInstr *Cloned = CloneMachineInstr(&*I);
MBB.insert(InsertBefore, Cloned);
if (FirstClone == nullptr) {
}
namespace llvm {
+
template<>
struct DOTGraphTraits<const MachineFunction*> : public DefaultDOTGraphTraits {
-
- DOTGraphTraits (bool isSimple=false) : DefaultDOTGraphTraits(isSimple) {}
+ DOTGraphTraits(bool isSimple = false) : DefaultDOTGraphTraits(isSimple) {}
static std::string getGraphName(const MachineFunction *F) {
return ("CFG for '" + F->getName() + "' function").str();
return OutStr;
}
};
-}
+
+} // end namespace llvm
void MachineFunction::viewCFG() const
{
LLVM_DUMP_METHOD void MachineJumpTableInfo::dump() const { print(dbgs()); }
#endif
-
//===----------------------------------------------------------------------===//
// MachineConstantPool implementation
//===----------------------------------------------------------------------===//
-void MachineConstantPoolValue::anchor() { }
+void MachineConstantPoolValue::anchor() {}
Type *MachineConstantPoolEntry::getType() const {
if (isMachineConstantPoolEntry())
-//===-- llvm/CodeGen/MachineModuleInfoImpls.cpp ---------------------------===//
+//===- llvm/CodeGen/MachineModuleInfoImpls.cpp ----------------------------===//
//
// The LLVM Compiler Infrastructure
//
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MachineModuleInfoImpls.h"
+#include "llvm/ADT/DenseMap.h"
#include "llvm/MC/MCSymbol.h"
+#include <cstdlib>
+#include <utility>
+
using namespace llvm;
//===----------------------------------------------------------------------===//
void MachineModuleInfoELF::anchor() {}
static int SortSymbolPair(const void *LHS, const void *RHS) {
- typedef std::pair<MCSymbol*, MachineModuleInfoImpl::StubValueTy> PairTy;
+ using PairTy = std::pair<MCSymbol *, MachineModuleInfoImpl::StubValueTy>;
+
const MCSymbol *LHSS = ((const PairTy *)LHS)->first;
const MCSymbol *RHSS = ((const PairTy *)RHS)->first;
return LHSS->getName().compare(RHSS->getName());
Map.clear();
return List;
}
-
-//===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===//
+//===- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function ---===//
//
// The LLVM Compiler Infrastructure
//
//
//===----------------------------------------------------------------------===//
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SetVector.h"
+#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/Analysis/OptimizationRemarkEmitter.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/CodeGen/StackProtector.h"
#include "llvm/CodeGen/WinEHFuncInfo.h"
+#include "llvm/IR/Attributes.h"
+#include "llvm/IR/CallingConv.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DiagnosticInfo.h"
+#include "llvm/IR/Function.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/IR/LLVMContext.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOpcodes.h"
+#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
-#include <climits>
+#include <algorithm>
+#include <cassert>
+#include <cstdint>
+#include <functional>
+#include <limits>
+#include <utility>
+#include <vector>
using namespace llvm;
#define DEBUG_TYPE "prologepilog"
-typedef SmallVector<MachineBasicBlock *, 4> MBBVector;
+using MBBVector = SmallVector<MachineBasicBlock *, 4>;
+
static void spillCalleeSavedRegs(MachineFunction &MF, RegScavenger *RS,
unsigned &MinCSFrameIndex,
unsigned &MaxCXFrameIndex,
const MBBVector &RestoreBlocks);
namespace {
+
class PEI : public MachineFunctionPass {
public:
static char ID;
+
PEI() : MachineFunctionPass(ID) {
initializePEIPass(*PassRegistry::getPassRegistry());
}
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
/// frame indexes with appropriate references.
- ///
bool runOnMachineFunction(MachineFunction &Fn) override;
private:
int &SPAdj);
void insertPrologEpilogCode(MachineFunction &Fn);
};
-} // namespace
+
+} // end anonymous namespace
char PEI::ID = 0;
+
char &llvm::PrologEpilogCodeInserterID = PEI::ID;
static cl::opt<unsigned>
MachineFunctionPass::getAnalysisUsage(AU);
}
-
/// StackObjSet - A set of stack object indexes
-typedef SmallSetVector<int, 8> StackObjSet;
+using StackObjSet = SmallSetVector<int, 8>;
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
/// frame indexes with appropriate references.
-///
bool PEI::runOnMachineFunction(MachineFunction &Fn) {
const Function* F = Fn.getFunction();
const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
/// Compute which bytes of fixed and callee-save stack area are unused and keep
/// track of them in StackBytesFree.
-///
static inline void
computeFreeStackSlots(MachineFrameInfo &MFI, bool StackGrowsDown,
unsigned MinCSFrameIndex, unsigned MaxCSFrameIndex,
/// Assign frame object to an unused portion of the stack in the fixed stack
/// object range. Return true if the allocation was successful.
-///
static inline bool scavengeStackSlot(MachineFrameInfo &MFI, int FrameIdx,
bool StackGrowsDown, unsigned MaxAlign,
BitVector &StackBytesFree) {
/// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
/// abstract stack objects.
-///
void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering();
StackProtector *SP = &getAnalysis<StackProtector>();
}
// Retrieve the Exception Handler registration node.
- int EHRegNodeFrameIndex = INT_MAX;
+ int EHRegNodeFrameIndex = std::numeric_limits<int>::max();
if (const WinEHFuncInfo *FuncInfo = Fn.getWinEHFuncInfo())
EHRegNodeFrameIndex = FuncInfo->EHRegNodeFrameIndex;
}
// Allocate the EH registration node first if one is present.
- if (EHRegNodeFrameIndex != INT_MAX)
+ if (EHRegNodeFrameIndex != std::numeric_limits<int>::max())
AdjustStackOffset(MFI, EHRegNodeFrameIndex, StackGrowsDown, Offset,
MaxAlign, Skew);
/// insertPrologEpilogCode - Scan the function for modified callee saved
/// registers, insert spill code for these callee saved registers, then add
/// prolog and epilog code to the function.
-///
void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering();
/// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
/// register references and actual offsets.
-///
void PEI::replaceFrameIndices(MachineFunction &Fn) {
const TargetFrameLowering &TFI = *Fn.getSubtarget().getFrameLowering();
if (!TFI.needsFrameIndexResolution(Fn)) return;
bool InsideCallSequence = false;
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
-
if (TII.isFrameInstr(*I)) {
InsideCallSequence = TII.isFrameSetup(*I);
SPAdj += TII.getSPAdjust(*I);
-//===-- SafeStackColoring.cpp - SafeStack frame coloring -------*- C++ -*--===//
+//===- SafeStackColoring.cpp - SafeStack frame coloring -------------------===//
//
// The LLVM Compiler Infrastructure
//
//===----------------------------------------------------------------------===//
#include "SafeStackColoring.h"
-
+#include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DepthFirstIterator.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/CFG.h"
+#include "llvm/IR/Instruction.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IntrinsicInst.h"
+#include "llvm/IR/Intrinsics.h"
+#include "llvm/IR/User.h"
+#include "llvm/Support/Casting.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
+#include <cassert>
+#include <tuple>
+#include <utility>
using namespace llvm;
using namespace llvm::safestack;
-//===-- SafeStackColoring.h - SafeStack frame coloring ---------*- C++ -*--===//
+//===- SafeStackColoring.h - SafeStack frame coloring ----------*- C++ -*--===//
//
// The LLVM Compiler Infrastructure
//
#ifndef LLVM_LIB_CODEGEN_SAFESTACKCOLORING_H
#define LLVM_LIB_CODEGEN_SAFESTACKCOLORING_H
+#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
-#include "llvm/IR/Function.h"
-#include "llvm/Support/raw_os_ostream.h"
+#include "llvm/IR/Instructions.h"
+#include "llvm/Support/raw_ostream.h"
+#include <cassert>
+#include <utility>
namespace llvm {
-class AllocaInst;
+
+class BasicBlock;
+class Function;
+class Instruction;
namespace safestack {
+
/// Compute live ranges of allocas.
/// Live ranges are represented as sets of "interesting" instructions, which are
/// defined as instructions that may start or end an alloca's lifetime. These
struct BlockLifetimeInfo {
/// Which slots BEGINs in each basic block.
BitVector Begin;
+
/// Which slots ENDs in each basic block.
BitVector End;
+
/// Which slots are marked as LIVE_IN, coming into each basic block.
BitVector LiveIn;
+
/// Which slots are marked as LIVE_OUT, coming out of each basic block.
BitVector LiveOut;
};
/// live.
struct LiveRange {
BitVector bv;
+
void SetMaximum(int size) { bv.resize(size); }
void AddRange(unsigned start, unsigned end) { bv.set(start, end); }
+
bool Overlaps(const LiveRange &Other) const {
return bv.anyCommon(Other.bv);
}
+
void Join(const LiveRange &Other) { bv |= Other.bv; }
};
Function &F;
/// Maps active slots (per bit) for each basic block.
- typedef DenseMap<BasicBlock *, BlockLifetimeInfo> LivenessMap;
+ using LivenessMap = DenseMap<BasicBlock *, BlockLifetimeInfo>;
LivenessMap BlockLiveness;
/// Number of interesting instructions.
- int NumInst;
+ int NumInst = -1;
+
/// Numeric ids for interesting instructions.
DenseMap<Instruction *, unsigned> InstructionNumbering;
+
/// A range [Start, End) of instruction ids for each basic block.
/// Instructions inside each BB have monotonic and consecutive ids.
DenseMap<const BasicBlock *, std::pair<unsigned, unsigned>> BlockInstRange;
ArrayRef<AllocaInst *> Allocas;
unsigned NumAllocas;
DenseMap<AllocaInst *, unsigned> AllocaNumbering;
+
/// LiveRange for allocas.
SmallVector<LiveRange, 8> LiveRanges;
public:
StackColoring(Function &F, ArrayRef<AllocaInst *> Allocas)
- : F(F), NumInst(-1), Allocas(Allocas), NumAllocas(Allocas.size()) {}
+ : F(F), Allocas(Allocas), NumAllocas(Allocas.size()) {}
void run();
void removeAllMarkers();
return OS << R.bv;
}
-} // namespace safestack
-} // namespace llvm
+} // end namespace safestack
+
+} // end namespace llvm
#endif // LLVM_LIB_CODEGEN_SAFESTACKCOLORING_H
-//===-- SafeStackLayout.cpp - SafeStack frame layout -----------*- C++ -*--===//
+//===- SafeStackLayout.cpp - SafeStack frame layout -----------------------===//
//
// The LLVM Compiler Infrastructure
//
//===----------------------------------------------------------------------===//
#include "SafeStackLayout.h"
-
-#include "llvm/IR/Instructions.h"
+#include "SafeStackColoring.h"
+#include "llvm/IR/Value.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/raw_ostream.h"
+#include <algorithm>
+#include <cassert>
using namespace llvm;
using namespace llvm::safestack;
-//===-- SafeStackLayout.h - SafeStack frame layout -------------*- C++ -*--===//
+//===- SafeStackLayout.h - SafeStack frame layout --------------*- C++ -*--===//
//
// The LLVM Compiler Infrastructure
//
#define LLVM_LIB_CODEGEN_SAFESTACKLAYOUT_H
#include "SafeStackColoring.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallVector.h"
namespace llvm {
+
+class raw_ostream;
+class Value;
+
namespace safestack {
/// Compute the layout of an unsafe stack frame.
unsigned Start;
unsigned End;
StackColoring::LiveRange Range;
+
StackRegion(unsigned Start, unsigned End,
const StackColoring::LiveRange &Range)
: Start(Start), End(End), Range(Range) {}
};
+
/// The list of current stack regions, sorted by StackRegion::Start.
SmallVector<StackRegion, 16> Regions;
unsigned Size, Alignment;
StackColoring::LiveRange Range;
};
+
SmallVector<StackObject, 8> StackObjects;
DenseMap<const Value *, unsigned> ObjectOffsets;
public:
StackLayout(unsigned StackAlignment) : MaxAlignment(StackAlignment) {}
+
/// Add an object to the stack frame. Value pointer is opaque and used as a
/// handle to retrieve the object's offset in the frame later.
void addObject(const Value *V, unsigned Size, unsigned Alignment,
/// Returns the alignment of the frame.
unsigned getFrameAlignment() { return MaxAlignment; }
+
void print(raw_ostream &OS);
};
-} // namespace safestack
-} // namespace llvm
+} // end namespace safestack
+
+} // end namespace llvm
#endif // LLVM_LIB_CODEGEN_SAFESTACKLAYOUT_H
-//===----- ScheduleDAGRRList.cpp - Reg pressure reduction list scheduler --===//
+//===- ScheduleDAGRRList.cpp - Reg pressure reduction list scheduler ------===//
//
// The LLVM Compiler Infrastructure
//
//===----------------------------------------------------------------------===//
#include "ScheduleDAGSDNodes.h"
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/CodeGen/ISDOpcodes.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/MachineValueType.h"
+#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
-#include "llvm/IR/DataLayout.h"
+#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/IR/InlineAsm.h"
+#include "llvm/MC/MCInstrDesc.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/Support/Casting.h"
+#include "llvm/Support/CodeGen.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetLowering.h"
+#include "llvm/Target/TargetOpcodes.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
-#include <climits>
+#include <algorithm>
+#include <cassert>
+#include <cstdint>
+#include <cstdlib>
+#include <iterator>
+#include <limits>
+#include <memory>
+#include <utility>
+#include <vector>
+
using namespace llvm;
#define DEBUG_TYPE "pre-RA-sched"
burrListDAGScheduler("list-burr",
"Bottom-up register reduction list scheduling",
createBURRListDAGScheduler);
+
static RegisterScheduler
sourceListDAGScheduler("source",
"Similar to list-burr but schedules in source "
cl::desc("Average inst/cycle whan no target itinerary exists."));
namespace {
+
//===----------------------------------------------------------------------===//
/// ScheduleDAGRRList - The actual register reduction list scheduler
/// implementation. This supports both top-down and bottom-up scheduling.
class ScheduleDAGRRList : public ScheduleDAGSDNodes {
private:
/// NeedLatency - True if the scheduler will make use of latency information.
- ///
bool NeedLatency;
/// AvailableQueue - The priority queue to use for the available SUnits.
/// been issued, but their results are not ready yet (due to the latency of
/// the operation). Once the operands becomes available, the instruction is
/// added to the AvailableQueue.
- std::vector<SUnit*> PendingQueue;
+ std::vector<SUnit *> PendingQueue;
/// HazardRec - The hazard recognizer to use.
ScheduleHazardRecognizer *HazardRec;
/// CurCycle - The current scheduler state corresponds to this cycle.
- unsigned CurCycle;
+ unsigned CurCycle = 0;
/// MinAvailableCycle - Cycle of the soonest available instruction.
unsigned MinAvailableCycle;
// Collect interferences between physical register use/defs.
// Each interference is an SUnit and set of physical registers.
SmallVector<SUnit*, 4> Interferences;
- typedef DenseMap<SUnit*, SmallVector<unsigned, 4> > LRegsMapT;
+
+ using LRegsMapT = DenseMap<SUnit *, SmallVector<unsigned, 4>>;
+
LRegsMapT LRegsMap;
/// Topo - A topological ordering for SUnits which permits fast IsReachable
SchedulingPriorityQueue *availqueue,
CodeGenOpt::Level OptLevel)
: ScheduleDAGSDNodes(mf),
- NeedLatency(needlatency), AvailableQueue(availqueue), CurCycle(0),
+ NeedLatency(needlatency), AvailableQueue(availqueue),
Topo(SUnits, nullptr) {
-
const TargetSubtargetInfo &STI = mf.getSubtarget();
if (DisableSchedCycles || !NeedLatency)
HazardRec = new ScheduleHazardRecognizer();
return !NeedLatency;
}
};
+
} // end anonymous namespace
/// GetCostForDef - Looks up the register class and cost for a given definition.
CurCycle = 0;
IssueCount = 0;
- MinAvailableCycle = DisableSchedCycles ? 0 : UINT_MAX;
+ MinAvailableCycle =
+ DisableSchedCycles ? 0 : std::numeric_limits<unsigned>::max();
NumLiveRegs = 0;
// Allocate slots for each physical register, plus one for a special register
// to track the virtual resource of a calling sequence.
unsigned NestLevel,
const TargetInstrInfo *TII) {
SDNode *N = Outer;
- for (;;) {
+ while (true) {
if (N == Inner)
return true;
// For a TokenFactor, examine each operand. There may be multiple ways
static SDNode *
FindCallSeqStart(SDNode *N, unsigned &NestLevel, unsigned &MaxNest,
const TargetInstrInfo *TII) {
- for (;;) {
+ while (true) {
// For a TokenFactor, examine each operand. There may be multiple ways
// to get to the CALLSEQ_BEGIN, but we need to find the path with the
// most nesting in order to ensure that we find the corresponding match.
// If the available queue is empty, it is safe to reset MinAvailableCycle.
if (AvailableQueue->empty())
- MinAvailableCycle = UINT_MAX;
+ MinAvailableCycle = std::numeric_limits<unsigned>::max();
// Check to see if any of the pending instructions are ready to issue. If
// so, add them to the available queue.
AvailableQueue->remove(PredSU);
}
- assert(PredSU->NumSuccsLeft < UINT_MAX && "NumSuccsLeft will overflow!");
+ assert(PredSU->NumSuccsLeft < std::numeric_limits<unsigned>::max() &&
+ "NumSuccsLeft will overflow!");
++PredSU->NumSuccsLeft;
}
if (LookAhead == 0)
return;
- std::vector<SUnit*>::const_iterator I = (Sequence.end() - LookAhead);
+ std::vector<SUnit *>::const_iterator I = (Sequence.end() - LookAhead);
unsigned HazardCycle = (*I)->getHeight();
for (auto E = Sequence.end(); I != E; ++I) {
SUnit *SU = *I;
// Try unscheduling up to the point where it's safe to schedule
// this node.
SUnit *BtSU = nullptr;
- unsigned LiveCycle = UINT_MAX;
+ unsigned LiveCycle = std::numeric_limits<unsigned>::max();
for (unsigned Reg : LRegs) {
if (LiveRegGens[Reg]->getHeight() < LiveCycle) {
BtSU = LiveRegGens[Reg];
while (AvailableQueue->empty() && !PendingQueue.empty()) {
// Advance the cycle to free resources. Skip ahead to the next ready SU.
- assert(MinAvailableCycle < UINT_MAX && "MinAvailableCycle uninitialized");
+ assert(MinAvailableCycle < std::numeric_limits<unsigned>::max() &&
+ "MinAvailableCycle uninitialized");
AdvanceToCycle(std::max(CurCycle + 1, MinAvailableCycle));
}
}
#endif
}
-//===----------------------------------------------------------------------===//
-// RegReductionPriorityQueue Definition
-//===----------------------------------------------------------------------===//
-//
-// This is a SchedulingPriorityQueue that schedules using Sethi Ullman numbers
-// to reduce register pressure.
-//
namespace {
+
class RegReductionPQBase;
struct queue_sort {
template<class SF>
struct reverse_sort : public queue_sort {
SF &SortFunc;
+
reverse_sort(SF &sf) : SortFunc(sf) {}
bool operator()(SUnit* left, SUnit* right) const {
};
RegReductionPQBase *SPQ;
+
bu_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {}
bool operator()(SUnit* left, SUnit* right) const;
};
RegReductionPQBase *SPQ;
- src_ls_rr_sort(RegReductionPQBase *spq)
- : SPQ(spq) {}
+
+ src_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {}
bool operator()(SUnit* left, SUnit* right) const;
};
};
RegReductionPQBase *SPQ;
- hybrid_ls_rr_sort(RegReductionPQBase *spq)
- : SPQ(spq) {}
+
+ hybrid_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {}
bool isReady(SUnit *SU, unsigned CurCycle) const;
};
RegReductionPQBase *SPQ;
- ilp_ls_rr_sort(RegReductionPQBase *spq)
- : SPQ(spq) {}
+
+ ilp_ls_rr_sort(RegReductionPQBase *spq) : SPQ(spq) {}
bool isReady(SUnit *SU, unsigned CurCycle) const;
class RegReductionPQBase : public SchedulingPriorityQueue {
protected:
- std::vector<SUnit*> Queue;
- unsigned CurQueueId;
+ std::vector<SUnit *> Queue;
+ unsigned CurQueueId = 0;
bool TracksRegPressure;
bool SrcOrder;
const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI;
const TargetLowering *TLI;
- ScheduleDAGRRList *scheduleDAG;
+ ScheduleDAGRRList *scheduleDAG = nullptr;
// SethiUllmanNumbers - The SethiUllman number for each node.
std::vector<unsigned> SethiUllmanNumbers;
/// RegPressure - Tracking current reg pressure per register class.
- ///
std::vector<unsigned> RegPressure;
/// RegLimit - Tracking the number of allocatable registers per register
const TargetInstrInfo *tii,
const TargetRegisterInfo *tri,
const TargetLowering *tli)
- : SchedulingPriorityQueue(hasReadyFilter),
- CurQueueId(0), TracksRegPressure(tracksrp), SrcOrder(srcorder),
- MF(mf), TII(tii), TRI(tri), TLI(tli), scheduleDAG(nullptr) {
+ : SchedulingPriorityQueue(hasReadyFilter), TracksRegPressure(tracksrp),
+ SrcOrder(srcorder), MF(mf), TII(tii), TRI(tri), TLI(tli) {
if (TracksRegPressure) {
unsigned NumRC = TRI->getNumRegClasses();
RegLimit.resize(NumRC);
void remove(SUnit *SU) override {
assert(!Queue.empty() && "Queue is empty!");
assert(SU->NodeQueueId != 0 && "Not in queue!");
- std::vector<SUnit *>::iterator I = find(Queue, SU);
+ std::vector<SUnit *>::iterator I = llvm::find(Queue, SU);
if (I != std::prev(Queue.end()))
std::swap(*I, Queue.back());
Queue.pop_back();
};
template<class SF>
-static SUnit *popFromQueueImpl(std::vector<SUnit*> &Q, SF &Picker) {
+static SUnit *popFromQueueImpl(std::vector<SUnit *> &Q, SF &Picker) {
std::vector<SUnit *>::iterator Best = Q.begin();
for (auto I = std::next(Q.begin()), E = Q.end(); I != E; ++I)
if (Picker(*Best, *I))
}
template<class SF>
-SUnit *popFromQueue(std::vector<SUnit*> &Q, SF &Picker, ScheduleDAG *DAG) {
+SUnit *popFromQueue(std::vector<SUnit *> &Q, SF &Picker, ScheduleDAG *DAG) {
#ifndef NDEBUG
if (DAG->StressSched) {
reverse_sort<SF> RPicker(Picker);
return popFromQueueImpl(Q, Picker);
}
+//===----------------------------------------------------------------------===//
+// RegReductionPriorityQueue Definition
+//===----------------------------------------------------------------------===//
+//
+// This is a SchedulingPriorityQueue that schedules using Sethi Ullman numbers
+// to reduce register pressure.
+//
template<class SF>
class RegReductionPriorityQueue : public RegReductionPQBase {
SF Picker;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump(ScheduleDAG *DAG) const override {
// Emulate pop() without clobbering NodeQueueIds.
- std::vector<SUnit*> DumpQueue = Queue;
+ std::vector<SUnit *> DumpQueue = Queue;
SF DumpPicker = Picker;
while (!DumpQueue.empty()) {
SUnit *SU = popFromQueue(DumpQueue, DumpPicker, scheduleDAG);
#endif
};
-typedef RegReductionPriorityQueue<bu_ls_rr_sort>
-BURegReductionPriorityQueue;
-
-typedef RegReductionPriorityQueue<src_ls_rr_sort>
-SrcRegReductionPriorityQueue;
+using BURegReductionPriorityQueue = RegReductionPriorityQueue<bu_ls_rr_sort>;
+using SrcRegReductionPriorityQueue = RegReductionPriorityQueue<src_ls_rr_sort>;
+using HybridBURRPriorityQueue = RegReductionPriorityQueue<hybrid_ls_rr_sort>;
+using ILPBURRPriorityQueue = RegReductionPriorityQueue<ilp_ls_rr_sort>;
-typedef RegReductionPriorityQueue<hybrid_ls_rr_sort>
-HybridBURRPriorityQueue;
-
-typedef RegReductionPriorityQueue<ilp_ls_rr_sort>
-ILPBURRPriorityQueue;
} // end anonymous namespace
//===----------------------------------------------------------------------===//
/// This results in the store being scheduled immediately
/// after N, which shortens the U->N live range, reducing
/// register pressure.
-///
void RegReductionPQBase::PrescheduleNodesWithMultipleUses() {
// Visit all the nodes in topological order, working top-down.
for (SUnit &SU : *SUnits) {
// Public Constructor Functions
//===----------------------------------------------------------------------===//
-llvm::ScheduleDAGSDNodes *
+ScheduleDAGSDNodes *
llvm::createBURRListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel) {
const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
return SD;
}
-llvm::ScheduleDAGSDNodes *
+ScheduleDAGSDNodes *
llvm::createSourceListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel) {
const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
return SD;
}
-llvm::ScheduleDAGSDNodes *
+ScheduleDAGSDNodes *
llvm::createHybridListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel) {
const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
return SD;
}
-llvm::ScheduleDAGSDNodes *
+ScheduleDAGSDNodes *
llvm::createILPListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel) {
const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
-//===-- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() -----------===//
+//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
//
// The LLVM Compiler Infrastructure
//
//
//===----------------------------------------------------------------------===//
-#include "ScheduleDAGSDNodes.h"
+#include "llvm/ADT/APFloat.h"
+#include "llvm/ADT/APInt.h"
+#include "llvm/ADT/None.h"
+#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/StringExtras.h"
+#include "llvm/CodeGen/ISDOpcodes.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineConstantPool.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineMemOperand.h"
+#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/SelectionDAG.h"
-#include "llvm/IR/DebugInfo.h"
+#include "llvm/CodeGen/SelectionDAGNodes.h"
+#include "llvm/CodeGen/ValueTypes.h"
+#include "llvm/IR/BasicBlock.h"
+#include "llvm/IR/Constants.h"
+#include "llvm/IR/DebugInfoMetadata.h"
+#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/Intrinsics.h"
+#include "llvm/IR/Value.h"
+#include "llvm/Support/Casting.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
-#include "llvm/Support/GraphWriter.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Printable.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetIntrinsicInfo.h"
+#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
+#include <cstdint>
+#include <iterator>
+
using namespace llvm;
static cl::opt<bool>
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
+
LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
print(dbgs(), G);
dbgs() << '\n';
} else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
OS << '<' << CSDN->getAPIntValue() << '>';
} else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
- if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle())
+ if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
- else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble())
+ else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
else {
OS << "<APFloat(";
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-typedef SmallPtrSet<const SDNode *, 32> VisitedSDNodeSet;
+using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
+
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
const SelectionDAG *G, VisitedSDNodeSet &once) {
if (!once.insert(N).second) // If we've been here before, return now.
-//===-- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ---===//
+//===- ShrinkWrap.cpp - Compute safe point for prolog/epilog insertion ----===//
//
// The LLVM Compiler Infrastructure
//
//
// If this pass found points matching all these properties, then
// MachineFrameInfo is updated with this information.
+//
//===----------------------------------------------------------------------===//
+
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/SetVector.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
-// To check for profitability.
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
-// For property #1 for Save.
#include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
-// To record the result of the analysis.
#include "llvm/CodeGen/MachineFrameInfo.h"
-// For property #2.
+#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
-// For property #1 for Restore.
+#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachinePostDominators.h"
-#include "llvm/CodeGen/Passes.h"
-// To know about callee-saved.
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
+#include "llvm/IR/Attributes.h"
+#include "llvm/IR/Function.h"
#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
-// To query the target about frame lowering.
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetFrameLowering.h"
-// To know about frame setup operation.
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
-// To access TargetInstrInfo.
+#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
-
-#define DEBUG_TYPE "shrink-wrap"
+#include <cassert>
+#include <cstdint>
+#include <memory>
using namespace llvm;
+#define DEBUG_TYPE "shrink-wrap"
+
STATISTIC(NumFunc, "Number of functions");
STATISTIC(NumCandidates, "Number of shrink-wrapping candidates");
STATISTIC(NumCandidatesDropped,
"Number of shrink-wrapping candidates dropped because of frequency");
static cl::opt<cl::boolOrDefault>
- EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden,
- cl::desc("enable the shrink-wrapping pass"));
+EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden,
+ cl::desc("enable the shrink-wrapping pass"));
namespace {
+
/// \brief Class to determine where the safe point to insert the
/// prologue and epilogue are.
/// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the
RegisterClassInfo RCI;
MachineDominatorTree *MDT;
MachinePostDominatorTree *MPDT;
+
/// Current safe point found for the prologue.
/// The prologue will be inserted before the first instruction
/// in this basic block.
MachineBasicBlock *Save;
+
/// Current safe point found for the epilogue.
/// The epilogue will be inserted before the first terminator instruction
/// in this basic block.
MachineBasicBlock *Restore;
+
/// Hold the information of the basic block frequency.
/// Use to check the profitability of the new points.
MachineBlockFrequencyInfo *MBFI;
+
/// Hold the loop information. Used to determine if Save and Restore
/// are in the same loop.
MachineLoopInfo *MLI;
+
/// Frequency of the Entry block.
uint64_t EntryFreq;
+
/// Current opcode for frame setup.
unsigned FrameSetupOpcode;
+
/// Current opcode for frame destroy.
unsigned FrameDestroyOpcode;
+
/// Entry block.
const MachineBasicBlock *Entry;
- typedef SmallSetVector<unsigned, 16> SetOfRegs;
+
+ using SetOfRegs = SmallSetVector<unsigned, 16>;
+
/// Registers that need to be saved for the current function.
mutable SetOfRegs CurrentCSRs;
+
/// Current MachineFunction.
MachineFunction *MachineFunc;
/// the MachineFrameInfo attached to \p MF with the results.
bool runOnMachineFunction(MachineFunction &MF) override;
};
-} // End anonymous namespace.
+
+} // end anonymous namespace
char ShrinkWrap::ID = 0;
+
char &llvm::ShrinkWrapID = ShrinkWrap::ID;
INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)