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dmaengine: idxd: add halt interrupt support
authorDave Jiang <dave.jiang@intel.com>
Wed, 8 Sep 2021 23:04:03 +0000 (16:04 -0700)
committerVinod Koul <vkoul@kernel.org>
Mon, 25 Oct 2021 06:39:15 +0000 (12:09 +0530)
Add halt interrupt support. Given that the misc interrupt handler already
check halt state, the driver just need to run the halt handling code when
receiving the halt interrupt.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/163114224352.846654.14334468363464318828.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/idxd/irq.c
drivers/dma/idxd/registers.h

index 79fcfc4..17f2f8a 100644 (file)
@@ -63,6 +63,9 @@ static int process_misc_interrupts(struct idxd_device *idxd, u32 cause)
        int i;
        bool err = false;
 
+       if (cause & IDXD_INTC_HALT_STATE)
+               goto halt;
+
        if (cause & IDXD_INTC_ERR) {
                spin_lock(&idxd->dev_lock);
                for (i = 0; i < 4; i++)
@@ -121,6 +124,7 @@ static int process_misc_interrupts(struct idxd_device *idxd, u32 cause)
        if (!err)
                return 0;
 
+halt:
        gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);
        if (gensts.state == IDXD_DEVICE_STATE_HALT) {
                idxd->state = IDXD_DEV_HALTED;
@@ -134,6 +138,7 @@ static int process_misc_interrupts(struct idxd_device *idxd, u32 cause)
                        queue_work(idxd->wq, &idxd->work);
                } else {
                        spin_lock(&idxd->dev_lock);
+                       idxd->state = IDXD_DEV_HALTED;
                        idxd_wqs_quiesce(idxd);
                        idxd_wqs_unmap_portal(idxd);
                        idxd_device_clear_state(idxd);
index eeb11e6..262c822 100644 (file)
@@ -157,6 +157,7 @@ enum idxd_device_reset_type {
 #define IDXD_INTC_CMD                  0x02
 #define IDXD_INTC_OCCUPY                       0x04
 #define IDXD_INTC_PERFMON_OVFL         0x08
+#define IDXD_INTC_HALT_STATE           0x10
 
 #define IDXD_CMD_OFFSET                        0xa0
 union idxd_command_reg {