[X86] Regenerate RDTSC codegen tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320042 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/rdtsc.ll b/test/CodeGen/X86/rdtsc.ll
index 7b885a6..96ad1ab 100644 (file)
--- a/test/CodeGen/X86/rdtsc.ll
+++ b/test/CodeGen/X86/rdtsc.ll
@@ -1,47 +1,67 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X64
 
 ; Verify that we correctly lower ISD::READCYCLECOUNTER.
 
 
 define i64 @test_builtin_readcyclecounter() {
+; X86-LABEL: test_builtin_readcyclecounter:
+; X86:       # %bb.0:
+; X86-NEXT:    rdtsc
+; X86-NEXT:    retl
+;
+; X64-LABEL: test_builtin_readcyclecounter:
+; X64:       # %bb.0:
+; X64-NEXT:    rdtsc
+; X64-NEXT:    shlq $32, %rdx
+; X64-NEXT:    orq %rdx, %rax
+; X64-NEXT:    retq
   %1 = tail call i64 @llvm.readcyclecounter()
   ret i64 %1
 }
-; CHECK-LABEL: test_builtin_readcyclecounter
-; CHECK: rdtsc
-; X86-NOT: shlq
-; X86-NOT: or
-; CHECK-NOT: mov
-; CHECK: ret
-
 
 ; Verify that we correctly lower the Read Cycle Counter GCC x86 builtins
 ; (i.e. RDTSC and RDTSCP).
 
 define i64 @test_builtin_rdtsc() {
+; X86-LABEL: test_builtin_rdtsc:
+; X86:       # %bb.0:
+; X86-NEXT:    rdtsc
+; X86-NEXT:    retl
+;
+; X64-LABEL: test_builtin_rdtsc:
+; X64:       # %bb.0:
+; X64-NEXT:    rdtsc
+; X64-NEXT:    shlq $32, %rdx
+; X64-NEXT:    orq %rdx, %rax
+; X64-NEXT:    retq
   %1 = tail call i64 @llvm.x86.rdtsc()
   ret i64 %1
 }
-; CHECK-LABEL: test_builtin_rdtsc
-; CHECK: rdtsc
-; X86-NOT: shlq
-; X86-NOT: or
-; CHECK-NOT: mov
-; CHECK: ret
-
 
 define i64 @test_builtin_rdtscp(i8* %A) {
+; X86-LABEL: test_builtin_rdtscp:
+; X86:       # %bb.0:
+; X86-NEXT:    pushl %esi
+; X86-NEXT:    .cfi_def_cfa_offset 8
+; X86-NEXT:    .cfi_offset %esi, -8
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:    rdtscp
+; X86-NEXT:    movl %ecx, (%esi)
+; X86-NEXT:    popl %esi
+; X86-NEXT:    retl
+;
+; X64-LABEL: test_builtin_rdtscp:
+; X64:       # %bb.0:
+; X64-NEXT:    rdtscp
+; X64-NEXT:    movl %ecx, (%rdi)
+; X64-NEXT:    shlq $32, %rdx
+; X64-NEXT:    orq %rdx, %rax
+; X64-NEXT:    retq
   %1 = tail call i64 @llvm.x86.rdtscp(i8* %A)
   ret i64 %1
 }
-; CHECK-LABEL: test_builtin_rdtscp
-; CHECK: rdtscp
-; X86-NOT: shlq
-; CHECK:   movl        %ecx, (%{{[a-z0-9]+}})
-; X86-NOT: shlq
-; CHECK: ret
-
 
 declare i64 @llvm.readcyclecounter()
 declare i64 @llvm.x86.rdtscp(i8*)