ARM: 9199/1: spectre-bhb: use local DSB and elide ISB in loop8 sequence

The loop8 mitigation for Spectre-BHB only requires a CPU local DSB
rather than a systemwide one, which is much more costly. And by the same
reasoning as why it is justified to omit the ISB after BPIALL, we can
also elide the ISB and rely on the exception return for the context
synchronization.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 87cb063..43ab775 100644 (file)
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -1131,8 +1131,9 @@ vector_bhb_loop8_\name:
 3:     W(b)    . + 4
        subs    r0, r0, #1
        bne     3b
-       dsb
-       isb
+       dsb     nsh
+       @ isb not needed due to "movs pc, lr" in the vector stub
+       @ which gives a "context synchronisation".
        b       2b
 ENDPROC(vector_bhb_loop8_\name)
        .previous

diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index ad3210e..7aa3ded 100644 (file)
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -164,7 +164,7 @@ ENTRY(vector_bhb_loop8_swi)
 1:     b       2f
 2:     subs    r8, r8, #1
        bne     1b
-       dsb
+       dsb     nsh
        isb
        b       3f
 ENDPROC(vector_bhb_loop8_swi)